diff --git a/SOURCES/0001-Prevent-compiler-from-optimizing-mmio_read64-to-sing.patch b/SOURCES/0001-Prevent-compiler-from-optimizing-mmio_read64-to-sing.patch
new file mode 100644
index 0000000..57b888a
--- /dev/null
+++ b/SOURCES/0001-Prevent-compiler-from-optimizing-mmio_read64-to-sing.patch
@@ -0,0 +1,33 @@
+From 33e60ff64a043b189d2661543b417b21b6f3667b Mon Sep 17 00:00:00 2001
+From: Adam Judge <ajudge@iol.unh.edu>
+Date: Tue, 9 Jun 2020 15:58:49 -0400
+Subject: [PATCH] Prevent compiler from optimizing mmio_read64 to single 64b
+ read
+
+---
+ nvme-print.c | 8 ++++++--
+ 1 file changed, 6 insertions(+), 2 deletions(-)
+
+diff --git a/nvme-print.c b/nvme-print.c
+index fc8f99d..c0de928 100644
+--- a/nvme-print.c
++++ b/nvme-print.c
+@@ -1311,9 +1311,13 @@ static inline uint32_t mmio_read32(void *addr)
+ /* Access 64-bit registers as 2 32-bit; Some devices fail 64-bit MMIO. */
+ static inline __u64 mmio_read64(void *addr)
+ {
+- __le32 *p = addr;
++ const volatile __u32 *p = addr;
++ __u32 low, high;
++
++ low = le32_to_cpu(*p);
++ high = le32_to_cpu(*(p + 1));
+
+- return le32_to_cpu(*p) | ((uint64_t)le32_to_cpu(*(p + 1)) << 32);
++ return ((__u64) high << 32) | low;
+ }
+
+ static void json_ctrl_registers(void *bar)
+--
+2.31.1
+
diff --git a/SOURCES/0002-nvme-print-split-pmrmsc-into-pmrmscl-and-pmrmscu.patch b/SOURCES/0002-nvme-print-split-pmrmsc-into-pmrmscl-and-pmrmscu.patch
new file mode 100644
index 0000000..f53033b
--- /dev/null
+++ b/SOURCES/0002-nvme-print-split-pmrmsc-into-pmrmscl-and-pmrmscu.patch
@@ -0,0 +1,122 @@
+diff --git a/linux/nvme.h b/linux/nvme.h
+index f2c4fdb..9e7a108 100644
+--- a/linux/nvme.h
++++ b/linux/nvme.h
+@@ -172,7 +172,8 @@ enum {
+ NVME_REG_PMRSTS = 0x0e08, /* Persistent Memory Region Status */
+ NVME_REG_PMREBS = 0x0e0c, /* Persistent Memory Region Elasticity Buffer Size */
+ NVME_REG_PMRSWTP= 0x0e10, /* Persistent Memory Region Sustained Write Throughput */
+- NVME_REG_PMRMSC = 0x0e14, /* Persistent Memory Region Controller Memory Space Control */
++ NVME_REG_PMRMSCL= 0x0e14, /* Persistent Memory Region Controller Memory Space Control Lower */
++ NVME_REG_PMRMSCU= 0x0e18, /* Persistent Memory Region Controller Memory Space Control Upper*/
+ NVME_REG_DBS = 0x1000, /* SQ 0 Tail Doorbell */
+ };
+
+diff --git a/nvme-print.c b/nvme-print.c
+index 30fca29..93f0e5a 100644
+--- a/nvme-print.c
++++ b/nvme-print.c
+@@ -1293,12 +1293,18 @@ static void nvme_show_registers_pmrswtp(__u32 pmrswtp)
+ nvme_register_pmr_pmrszu_to_string(pmrswtp & 0x0000000f));
+ }
+
+-static void nvme_show_registers_pmrmsc(uint64_t pmrmsc)
++static void nvme_show_registers_pmrmscl(uint32_t pmrmscl)
+ {
+- printf("\tController Base Address (CBA) : %" PRIx64 "\n",
+- (pmrmsc & 0xfffffffffffff000) >> 12);
+- printf("\tController Memory Space Enable (CMSE) : %" PRIx64 "\n\n",
+- (pmrmsc & 0x0000000000000002) >> 1);
++ printf("\tController Base Address (CBA): %#x\n",
++ (pmrmscl & 0xfffff000) >> 12);
++ printf("\tController Memory Space Enable (CMSE): %#x\n\n",
++ (pmrmscl & 0x00000002) >> 1);
++}
++
++static void nvme_show_registers_pmrmscu(uint32_t pmrmscu)
++{
++ printf("\tController Base Address (CBA): %#x\n",
++ pmrmscu);
+ }
+
+ static inline uint32_t mmio_read32(void *addr)
+@@ -1318,9 +1324,10 @@ static inline __u64 mmio_read64(void *addr)
+
+ static void json_ctrl_registers(void *bar)
+ {
+- uint64_t cap, asq, acq, bpmbl, cmbmsc, pmrmsc;
++ uint64_t cap, asq, acq, bpmbl, cmbmsc;
+ uint32_t vs, intms, intmc, cc, csts, nssr, aqa, cmbsz, cmbloc,
+- bpinfo, bprsel, cmbsts, pmrcap, pmrctl, pmrsts, pmrebs, pmrswtp;
++ bpinfo, bprsel, cmbsts, pmrcap, pmrctl, pmrsts, pmrebs, pmrswtp,
++ pmrmscl, pmrmscu;
+ struct json_object *root;
+
+ cap = mmio_read64(bar + NVME_REG_CAP);
+@@ -1345,7 +1352,8 @@ static void json_ctrl_registers(void *bar)
+ pmrsts = mmio_read32(bar + NVME_REG_PMRSTS);
+ pmrebs = mmio_read32(bar + NVME_REG_PMREBS);
+ pmrswtp = mmio_read32(bar + NVME_REG_PMRSWTP);
+- pmrmsc = mmio_read64(bar + NVME_REG_PMRMSC);
++ pmrmscl = mmio_read32(bar + NVME_REG_PMRMSCL);
++ pmrmscu = mmio_read32(bar + NVME_REG_PMRMSCU);
+
+ root = json_create_object();
+ json_object_add_value_uint(root, "cap", cap);
+@@ -1370,7 +1378,8 @@ static void json_ctrl_registers(void *bar)
+ json_object_add_value_int(root, "pmrsts", pmrsts);
+ json_object_add_value_int(root, "pmrebs", pmrebs);
+ json_object_add_value_int(root, "pmrswtp", pmrswtp);
+- json_object_add_value_uint(root, "pmrmsc", pmrmsc);
++ json_object_add_value_uint(root, "pmrmscl", pmrmscl);
++ json_object_add_value_uint(root, "pmrmscu", pmrmscu);
+ json_print_object(root, NULL);
+ printf("\n");
+ json_free_object(root);
+@@ -1379,9 +1388,10 @@ static void json_ctrl_registers(void *bar)
+ void nvme_show_ctrl_registers(void *bar, bool fabrics, enum nvme_print_flags flags)
+ {
+ const unsigned int reg_size = 0x50; /* 00h to 4Fh */
+- uint64_t cap, asq, acq, bpmbl, cmbmsc, pmrmsc;
++ uint64_t cap, asq, acq, bpmbl, cmbmsc;
+ uint32_t vs, intms, intmc, cc, csts, nssr, aqa, cmbsz, cmbloc, bpinfo,
+- bprsel, cmbsts, pmrcap, pmrctl, pmrsts, pmrebs, pmrswtp;
++ bprsel, cmbsts, pmrcap, pmrctl, pmrsts, pmrebs, pmrswtp,
++ pmrmscl, pmrmscu;
+ int human = flags & VERBOSE;
+
+ if (flags & BINARY)
+@@ -1411,7 +1421,8 @@ void nvme_show_ctrl_registers(void *bar, bool fabrics, enum nvme_print_flags fla
+ pmrsts = mmio_read32(bar + NVME_REG_PMRSTS);
+ pmrebs = mmio_read32(bar + NVME_REG_PMREBS);
+ pmrswtp = mmio_read32(bar + NVME_REG_PMRSWTP);
+- pmrmsc = mmio_read64(bar + NVME_REG_PMRMSC);
++ pmrmscl = mmio_read32(bar + NVME_REG_PMRMSCL);
++ pmrmscu = mmio_read32(bar + NVME_REG_PMRMSCU);
+
+ if (human) {
+ if (cap != 0xffffffff) {
+@@ -1490,8 +1501,11 @@ void nvme_show_ctrl_registers(void *bar, bool fabrics, enum nvme_print_flags fla
+ printf("pmrswtp : %x\n", pmrswtp);
+ nvme_show_registers_pmrswtp(pmrswtp);
+
+- printf("pmrmsc : %"PRIx64"\n", pmrmsc);
+- nvme_show_registers_pmrmsc(pmrmsc);
++ printf("pmrmscl : %#x\n", pmrmscl);
++ nvme_show_registers_pmrmscl(pmrmscl);
++
++ printf("pmrmscu : %#x\n", pmrmscu);
++ nvme_show_registers_pmrmscu(pmrmscu);
+ }
+ } else {
+ if (cap != 0xffffffff)
+@@ -1522,7 +1536,8 @@ void nvme_show_ctrl_registers(void *bar, bool fabrics, enum nvme_print_flags fla
+ printf("pmrsts : %x\n", pmrsts);
+ printf("pmrebs : %x\n", pmrebs);
+ printf("pmrswtp : %x\n", pmrswtp);
+- printf("pmrmsc : %"PRIx64"\n", pmrmsc);
++ printf("pmrmscl : %#x\n", pmrmscl);
++ printf("pmrmscu : %#x\n", pmrmscu);
+ }
+ }
+ }
diff --git a/SPECS/nvme-cli.spec b/SPECS/nvme-cli.spec
index ec082ee..37895d4 100644
--- a/SPECS/nvme-cli.spec
+++ b/SPECS/nvme-cli.spec
@@ -3,7 +3,7 @@
Name: nvme-cli
Version: 1.12
-Release: 3%{?dist}
+Release: 4%{?dist}
Summary: NVMe management command line interface
License: GPLv2+
@@ -12,6 +12,8 @@ URL: https://github.com/linux-nvme/nvme-cli
Source0: https://github.com/linux-nvme/%{name}/archive/v%{version}.tar.gz
Patch0: nvme-cli-makefile-dont-install-host-params-patch
+Patch1: 0001-Prevent-compiler-from-optimizing-mmio_read64-to-sing.patch
+Patch2: 0002-nvme-print-split-pmrmsc-into-pmrmscl-and-pmrmscu.patch
BuildRequires: libuuid-devel
BuildRequires: gcc
@@ -25,6 +27,8 @@ nvme-cli provides NVM-Express user space tooling for Linux.
#%%setup -qn %%{name}-%%{commit0}
%setup -q
%patch0 -p1
+%patch1 -p1
+%patch2 -p1
%build
@@ -82,6 +86,9 @@ if [ $1 -eq 1 ] || [ $1 -eq 2 ]; then
fi
%changelog
+* Wed Jun 09 2021 Maurizio Lombardi <mlombard@redhat.com> - 1.12-4
+- Fix for bz1970382
+
* Wed Mar 24 2021 Maurizio Lombardi <mlombard@redhat.com> - 1.12-3
- Added the dependency to util-linux and exit with error code 0 from the post install script