diff --git a/linux/nvme.h b/linux/nvme.h

index f2c4fdb..9e7a108 100644

--- a/linux/nvme.h

+++ b/linux/nvme.h

@@ -172,7 +172,8 @@ enum {

 	NVME_REG_PMRSTS = 0x0e08,	/* Persistent Memory Region Status */

 	NVME_REG_PMREBS = 0x0e0c,	/* Persistent Memory Region Elasticity Buffer Size */

 	NVME_REG_PMRSWTP= 0x0e10,	/* Persistent Memory Region Sustained Write Throughput */

-	NVME_REG_PMRMSC = 0x0e14,	/* Persistent Memory Region Controller Memory Space Control */

+	NVME_REG_PMRMSCL= 0x0e14,	/* Persistent Memory Region Controller Memory Space Control Lower */

+	NVME_REG_PMRMSCU= 0x0e18,	/* Persistent Memory Region Controller Memory Space Control Upper*/

 	NVME_REG_DBS	= 0x1000,	/* SQ 0 Tail Doorbell */

 };

diff --git a/nvme-print.c b/nvme-print.c

index 30fca29..93f0e5a 100644

--- a/nvme-print.c

+++ b/nvme-print.c

@@ -1293,12 +1293,18 @@ static void nvme_show_registers_pmrswtp(__u32 pmrswtp)

 		nvme_register_pmr_pmrszu_to_string(pmrswtp & 0x0000000f));

 }

-static void nvme_show_registers_pmrmsc(uint64_t pmrmsc)

+static void nvme_show_registers_pmrmscl(uint32_t pmrmscl)

 {

-	printf("\tController Base Address (CBA)		: %" PRIx64 "\n",

-		(pmrmsc & 0xfffffffffffff000) >> 12);

-	printf("\tController Memory Space Enable (CMSE)	: %" PRIx64 "\n\n",

-		(pmrmsc & 0x0000000000000002) >> 1);

+	printf("\tController Base Address         (CBA): %#x\n",

+		(pmrmscl & 0xfffff000) >> 12);

+	printf("\tController Memory Space Enable (CMSE): %#x\n\n",

+		(pmrmscl & 0x00000002) >> 1);

+}

+

+static void nvme_show_registers_pmrmscu(uint32_t pmrmscu)

+{

+	printf("\tController Base Address         (CBA): %#x\n",

+		pmrmscu);

 }

 static inline uint32_t mmio_read32(void *addr)

@@ -1318,9 +1324,10 @@ static inline __u64 mmio_read64(void *addr)

 static void json_ctrl_registers(void *bar)

 {

-	uint64_t cap, asq, acq, bpmbl, cmbmsc, pmrmsc;

+	uint64_t cap, asq, acq, bpmbl, cmbmsc;

 	uint32_t vs, intms, intmc, cc, csts, nssr, aqa, cmbsz, cmbloc,

-		bpinfo, bprsel, cmbsts, pmrcap, pmrctl, pmrsts, pmrebs, pmrswtp;

+		bpinfo, bprsel, cmbsts, pmrcap, pmrctl, pmrsts, pmrebs, pmrswtp,

+		pmrmscl, pmrmscu;

 	struct json_object *root;

 	cap = mmio_read64(bar + NVME_REG_CAP);

@@ -1345,7 +1352,8 @@ static void json_ctrl_registers(void *bar)

 	pmrsts = mmio_read32(bar + NVME_REG_PMRSTS);

 	pmrebs = mmio_read32(bar + NVME_REG_PMREBS);

 	pmrswtp = mmio_read32(bar + NVME_REG_PMRSWTP);

-	pmrmsc = mmio_read64(bar + NVME_REG_PMRMSC);

+	pmrmscl = mmio_read32(bar + NVME_REG_PMRMSCL);

+	pmrmscu = mmio_read32(bar + NVME_REG_PMRMSCU);

 	root = json_create_object();

 	json_object_add_value_uint(root, "cap", cap);

@@ -1370,7 +1378,8 @@ static void json_ctrl_registers(void *bar)

 	json_object_add_value_int(root, "pmrsts", pmrsts);

 	json_object_add_value_int(root, "pmrebs", pmrebs);

 	json_object_add_value_int(root, "pmrswtp", pmrswtp);

-	json_object_add_value_uint(root, "pmrmsc", pmrmsc);

+	json_object_add_value_uint(root, "pmrmscl", pmrmscl);

+	json_object_add_value_uint(root, "pmrmscu", pmrmscu);

 	json_print_object(root, NULL);

 	printf("\n");

 	json_free_object(root);

@@ -1379,9 +1388,10 @@ static void json_ctrl_registers(void *bar)

 void nvme_show_ctrl_registers(void *bar, bool fabrics, enum nvme_print_flags flags)

 {

 	const unsigned int reg_size = 0x50;  /* 00h to 4Fh */

-	uint64_t cap, asq, acq, bpmbl, cmbmsc, pmrmsc;

+	uint64_t cap, asq, acq, bpmbl, cmbmsc;

 	uint32_t vs, intms, intmc, cc, csts, nssr, aqa, cmbsz, cmbloc, bpinfo,

-		 bprsel, cmbsts, pmrcap, pmrctl, pmrsts, pmrebs, pmrswtp;

+		 bprsel, cmbsts, pmrcap, pmrctl, pmrsts, pmrebs, pmrswtp,

+		 pmrmscl, pmrmscu;

 	int human = flags & VERBOSE;

 	if (flags & BINARY)

@@ -1411,7 +1421,8 @@ void nvme_show_ctrl_registers(void *bar, bool fabrics, enum nvme_print_flags fla

 	pmrsts = mmio_read32(bar + NVME_REG_PMRSTS);

 	pmrebs = mmio_read32(bar + NVME_REG_PMREBS);

 	pmrswtp = mmio_read32(bar + NVME_REG_PMRSWTP);

-	pmrmsc = mmio_read64(bar + NVME_REG_PMRMSC);

+	pmrmscl = mmio_read32(bar + NVME_REG_PMRMSCL);

+	pmrmscu = mmio_read32(bar + NVME_REG_PMRMSCU);

 	if (human) {

 		if (cap != 0xffffffff) {

@@ -1490,8 +1501,11 @@ void nvme_show_ctrl_registers(void *bar, bool fabrics, enum nvme_print_flags fla

 			printf("pmrswtp : %x\n", pmrswtp);

 			nvme_show_registers_pmrswtp(pmrswtp);

-			printf("pmrmsc	: %"PRIx64"\n", pmrmsc);

-			nvme_show_registers_pmrmsc(pmrmsc);

+			printf("pmrmscl	: %#x\n", pmrmscl);

+			nvme_show_registers_pmrmscl(pmrmscl);

+

+			printf("pmrmscu	: %#x\n", pmrmscu);

+			nvme_show_registers_pmrmscu(pmrmscu);

 		}

 	} else {

 		if (cap != 0xffffffff)

@@ -1522,7 +1536,8 @@ void nvme_show_ctrl_registers(void *bar, bool fabrics, enum nvme_print_flags fla

 			printf("pmrsts  : %x\n", pmrsts);

 			printf("pmrebs  : %x\n", pmrebs);

 			printf("pmrswtp : %x\n", pmrswtp);

-			printf("pmrmsc	: %"PRIx64"\n", pmrmsc);

+			printf("pmrmscl	: %#x\n", pmrmscl);

+			printf("pmrmscu	: %#x\n", pmrmscu);

 		}

 	}

 }