diff --git a/.gitignore b/.gitignore index c7836ef..073fe13 100644 --- a/.gitignore +++ b/.gitignore @@ -2,5 +2,5 @@ SOURCES/06-2d-07 SOURCES/06-4e-03 SOURCES/06-55-04 SOURCES/06-5e-03 -SOURCES/microcode-20220207.tar.gz +SOURCES/microcode-20220510.tar.gz SOURCES/microcode_ctl-2.1-18.tar.xz diff --git a/.microcode_ctl.metadata b/.microcode_ctl.metadata index f11bba5..5517c69 100644 --- a/.microcode_ctl.metadata +++ b/.microcode_ctl.metadata @@ -2,5 +2,5 @@ bcf2173cd3dd499c37defbc2533703cfa6ec2430 SOURCES/06-2d-07 06432a25053c823b0e2a6b8e84e2e2023ee3d43e SOURCES/06-4e-03 2e405644a145de0f55517b6a9de118eec8ec1e5a SOURCES/06-55-04 86c60ee7d5d0d7115a4962c1c61ceecb0fd3a95a SOURCES/06-5e-03 -a2a0e662d463e1d826ae74406379557a12469eb5 SOURCES/microcode-20220207.tar.gz +0aeb386e2f4650e04bb748a75ecec10f4642e4a5 SOURCES/microcode-20220510.tar.gz 3959afc5d69a916a730131ce0f768db263e9e4f1 SOURCES/microcode_ctl-2.1-18.tar.xz diff --git a/SOURCES/0001-releasenote.md-changes-summary-fixes-for-microcode-2.patch b/SOURCES/0001-releasenote.md-changes-summary-fixes-for-microcode-2.patch new file mode 100644 index 0000000..938e31b --- /dev/null +++ b/SOURCES/0001-releasenote.md-changes-summary-fixes-for-microcode-2.patch @@ -0,0 +1,47 @@ +From 6ff5aa24a9460441cf2f1008792af134aeca0931 Mon Sep 17 00:00:00 2001 +From: Eugene Syromiatnikov +Date: Tue, 10 May 2022 20:48:31 +0200 +Subject: [PATCH] releasenote.md: changes summary fixes for microcode-20220510 + +* releasenote.md (New Platforms): Change the second 06-bf-02/03 entry +to 06-bf-05/03. +(Updated Platforms): Change the case to lower in PF of 06-37-09/0f; +change "GKL-R" to "GLK-R" (stands for Gemini Lake Refresh). + +Signed-off-by: Eugene Syromiatnikov +--- + releasenote.md | 6 +++--- + 1 file changed, 3 insertions(+), 3 deletions(-) + +diff --git a/releasenote.md b/releasenote.md +index 7fac640..c4a1ba7 100644 +--- a/releasenote.md ++++ b/releasenote.md +@@ -18,13 +18,13 @@ + | ADL | L0 | 06-9a-03/80 | | 0000041c | Core Gen12 + | ADL | L0 | 06-9a-04/80 | | 0000041c | Core Gen12 + | ADL | C0 | 06-bf-02/03 | | 0000001f | Core Gen12 +-| ADL | C0 | 06-bf-02/03 | | 0000001f | Core Gen12 ++| ADL | C0 | 06-bf-05/03 | | 0000001f | Core Gen12 + + ### Updated Platforms + + | Processor | Stepping | F-M-S/PI | Old Ver | New Ver | Products + |:---------------|:---------|:------------|:---------|:---------|:--------- +-| VLV | D0 | 06-37-09/0F | 0000090c | 0000090d | Atom E38xx ++| VLV | D0 | 06-37-09/0f | 0000090c | 0000090d | Atom E38xx + | SKL-U/Y | D0 | 06-4e-03/c0 | 000000ec | 000000f0 | Core Gen6 Mobile + | SKX-SP | B1 | 06-55-03/97 | 0100015c | 0100015d | Xeon Scalable + | SKX-SP | H0/M0/U0 | 06-55-04/b7 | 02006c0a | 02006d05 | Xeon Scalable +@@ -38,7 +38,7 @@ + | DNV | B0 | 06-5f-01/01 | 00000036 | 00000038 | Atom C Series + | ICX-SP | D0 | 06-6a-06/87 | 0d000331 | 0d000363 | Xeon Scalable Gen3 + | GLK | B0 | 06-7a-01/01 | 00000038 | 0000003a | Pentium Silver N/J5xxx, Celeron N/J4xxx +-| GKL-R | R0 | 06-7a-08/01 | 0000001c | 0000001e | Pentium J5040/N5030, Celeron J4125/J4025/N4020/N4120 ++| GLK-R | R0 | 06-7a-08/01 | 0000001c | 0000001e | Pentium J5040/N5030, Celeron J4125/J4025/N4020/N4120 + | ICL-U/Y | D1 | 06-7e-05/80 | 000000a8 | 000000b0 | Core Gen10 Mobile + | LKF | B2/B3 | 06-8a-01/10 | 0000002d | 00000031 | Core w/Hybrid Technology + | TGL | B1 | 06-8c-01/80 | 0000009a | 000000a4 | Core Gen11 Mobile +-- +2.13.6 + diff --git a/SOURCES/06-4e-03_readme b/SOURCES/06-4e-03_readme index 3eceda2..e27b0d9 100644 --- a/SOURCES/06-4e-03_readme +++ b/SOURCES/06-4e-03_readme @@ -15,6 +15,7 @@ microcode revisions in question are listed below: * 06-4e-03, revision 0xe2: 41f4513cf563605bc85db38056ac430dec948366 * 06-4e-03, revision 0xea: 5a54cab9f22f69b819d663e5747ed6ea2a326c55 * 06-4e-03, revision 0xec: d949a8543d2464d955f5dc4b0777cac863f48729 + * 06-4e-03, revision 0xf0: 37475bac70457ba8df2c1a32bba81bd7bd27d5e8 Please contact your system vendor for a BIOS/firmware update that contains the latest microcode version. For the information regarding microcode versions @@ -49,6 +50,13 @@ to the following knowledge base articles: https://access.redhat.com/articles/6101171 * CVE-2021-0127 (Intel Processor Breakpoint Control Flow): https://access.redhat.com/articles/6716541 + * CVE-2022-0005 (Informational disclosure via JTAG), + CVE-2022-21123 (Shared Buffers Data Read), + CVE-2022-21125 (Shared Buffers Data Sampling), + CVE-2022-21127 (Update to Special Register Buffer Data Sampling), + CVE-2022-21151 (Optimization Removal-Induced Informational Disclosure), + CVE-2022-21166 (Device Register Partial Write): + https://access.redhat.com/articles/6963124 The information regarding enforcing microcode update is provided below. diff --git a/SOURCES/06-55-04_readme b/SOURCES/06-55-04_readme index 76dfb48..7ebd3e4 100644 --- a/SOURCES/06-55-04_readme +++ b/SOURCES/06-55-04_readme @@ -21,6 +21,7 @@ microcode revisions in question are listed below: * 06-55-04, revision 0x2006a0a: 7ec27025329c82de9553c14a78733ad1013e5462 * 06-55-04, revision 0x2006b06: cb5bec976cb9754e3a22ab6828b3262a8f9eccf7 * 06-55-04, revision 0x2006c0a: 76b641375d136c08f5feb46aacebee40468ac085 + * 06-55-04, revision 0x2006d05: dc4207cf4eb916ff34acbdddc474db0df781234f Please contact your system vendor for a BIOS/firmware update that contains the latest microcode version. For the information regarding microcode versions @@ -55,6 +56,15 @@ to the following knowledge base articles: https://access.redhat.com/articles/6101171 * CVE-2021-0127 (Intel Processor Breakpoint Control Flow): https://access.redhat.com/articles/6716541 + * CVE-2022-0005 (Informational disclosure via JTAG), + CVE-2022-21123 (Shared Buffers Data Read), + CVE-2022-21125 (Shared Buffers Data Sampling), + CVE-2022-21127 (Update to Special Register Buffer Data Sampling), + CVE-2022-21131 (Protected Processor Inventory Number (PPIN) access protection), + CVE-2022-21136 (Overclocking service access protection), + CVE-2022-21151 (Optimization Removal-Induced Informational Disclosure), + CVE-2022-21166 (Device Register Partial Write): + https://access.redhat.com/articles/6963124 The information regarding disabling microcode update is provided below. diff --git a/SOURCES/06-5e-03_readme b/SOURCES/06-5e-03_readme index 9161617..f809f3e 100644 --- a/SOURCES/06-5e-03_readme +++ b/SOURCES/06-5e-03_readme @@ -18,6 +18,7 @@ microcode revisions in question are listed below: * 06-5e-03, revision 0xe2: 031e6e148b590d1c9cfdb6677539eeb4899e831c * 06-5e-03, revision 0xea: e6c37056a849fd281f2fdb975361a914e07b86c8 * 06-5e-03, revision 0xec: 6458bf25da4906479a01ffdcaa6d466e22722e01 + * 06-5e-03, revision 0xf0: 0683706bbbf470abbdad4b9923aa9647bfec9616 Please contact your system vendor for a BIOS/firmware update that contains the latest microcode version. For the information regarding microcode versions @@ -52,6 +53,13 @@ to the following knowledge base articles: https://access.redhat.com/articles/6101171 * CVE-2021-0127 (Intel Processor Breakpoint Control Flow): https://access.redhat.com/articles/6716541 + * CVE-2022-0005 (Informational disclosure via JTAG), + CVE-2022-21123 (Shared Buffers Data Read), + CVE-2022-21125 (Shared Buffers Data Sampling), + CVE-2022-21127 (Update to Special Register Buffer Data Sampling), + CVE-2022-21151 (Optimization Removal-Induced Informational Disclosure), + CVE-2022-21166 (Device Register Partial Write): + https://access.redhat.com/articles/6963124 The information regarding disabling microcode update is provided below. diff --git a/SOURCES/06-8c-01_readme b/SOURCES/06-8c-01_readme index 5185d20..7f0c33a 100644 --- a/SOURCES/06-8c-01_readme +++ b/SOURCES/06-8c-01_readme @@ -12,6 +12,7 @@ microcode revisions in question are listed below: * 06-8c-01, revision 0x68: 2204a6dee1688980cd228268fdf4b6ed5904fe04 * 06-8c-01, revision 0x88: 61b6590feb2769046d5b0c394179beaf2df51290 * 06-8c-01, revision 0x9a: 48b3ae8d27d8138b5b47052d2f8184bf555ad18e + * 06-8c-01, revision 0xa4: 70753f54f5be84376bdebeb710595e4dc2f6d92f Please contact your system vendor for a BIOS/firmware update that contains the latest microcode version. For the information regarding microcode versions @@ -28,6 +29,8 @@ to the following knowledge base articles: https://access.redhat.com/articles/6101171 * CVE-2021-0145 (Fast store forward predictor - Cross Domain Training): https://access.redhat.com/articles/6716541 + * CVE-2022-21123 (Shared Buffers Data Read): + https://access.redhat.com/articles/6963124 The information regarding disabling microcode update is provided below. diff --git a/SOURCES/README.caveats b/SOURCES/README.caveats index 0d308ee..b4b0e62 100644 --- a/SOURCES/README.caveats +++ b/SOURCES/README.caveats @@ -826,3 +826,12 @@ Intel CPU vulnerabilities is available in the following knowledge base articles: CVE-2021-0146 (VT-d-related Privilege Escalation), CVE-2021-33120 (Out of bounds read for some Intel Atom processors): https://access.redhat.com/articles/6716541 + * CVE-2022-0005 (Informational disclosure via JTAG), + CVE-2022-21123 (Shared Buffers Data Read), + CVE-2022-21125 (Shared Buffers Data Sampling), + CVE-2022-21127 (Update to Special Register Buffer Data Sampling), + CVE-2022-21131 (Protected Processor Inventory Number (PPIN) access protection), + CVE-2022-21136 (Overclocking service access protection), + CVE-2022-21151 (Optimization Removal-Induced Informational Disclosure), + CVE-2022-21166 (Device Register Partial Write): + https://access.redhat.com/articles/6963124 diff --git a/SOURCES/codenames.list b/SOURCES/codenames.list index f957dc6..a48b6da 100644 --- a/SOURCES/codenames.list +++ b/SOURCES/codenames.list @@ -272,6 +272,7 @@ Server;;Knights Mill;A0;08;80650;KNM;;Xeon Phi 72x5;Xeon Phi 7235, 7285, 7295 SOC;;Snow Ridge;B0;01;80664;SNR;;Atom P59xxB; SOC;;Snow Ridge;B1;01;80665;SNR;;Atom P59xxB; SOC;;Snow Ridge;C0;01;80667;SNR;;Atom P59xxB; +SOC;;Lakefield;B2,B3;10;806a1;LKF;;Core w/Hybrid Technology; Mobile;;Tiger Lake;B1;80;806c1;TGL;UP3,UP4;Core Gen11 Mobile; Mobile;;Tiger Lake Refresh;C0;80;806c2;TGL;R;Core Gen11 Mobile; Mobile;;Tiger Lake;R0;c2;806d1;TGL;H;Core Gen11 Mobile; @@ -286,6 +287,12 @@ Mobile;;Whiskey Lake;W0;d0;806eb;WHL;U;Core Gen8 Mobile; Mobile;;Whiskey Lake;V0;94;806ec;WHL;U;Core Gen8 Mobile; Mobile;;Whiskey Lake;V0;94;806ed;WHL;U;Core Gen8 Mobile; SOC;;Elkhart Rate;B1;01;90661;EHL;;Pentium J6426/N6415, Celeron J6412/J6413/N6210/N6211, Atom x6000E; +Desktop;;Alder Lake;C0;02;90672;ADL;S 8+8;Core Gen12; +Mobile;;Alder Lake;C0;03;90672;ADL;HX;Core Gen12 Mobile; +Desktop;;Alder Lake;K0;01;90675;ADL;S 6+0;Core Gen12; +Mobile;;Alder Lake;L0;82;906a3;ADL;P 6+8;Core Gen12 Mobile; +Mobile;;Alder Lake;R0;80;906a3;ADL;U 9W;Core Gen12 Mobile; +Mobile;;Alder Lake;R0;82;906a4;ADL;P 2+8;Core Gen12 Mobile; Desktop;;Kaby Lake;B0;2a;906e9;KBL;S,X;Core Gen7; Mobile;;Kaby Lake;B0;2a;906e9;KBL;G,H;Core Gen7 Mobile; Server;;Kaby Lake;B0;2a;906e9;KBL;Xeon E3;Xeon E3 v6; @@ -308,7 +315,8 @@ Desktop;;Comet Lake;Q0;22;a0655;CML;S 10+2;Core Gen10 Desktop; Mobile;;Comet Lake;A0;80;a0660;CML;U 6+2;Core Gen10 Mobile; Mobile;;Comet Lake;K1;80;a0661;CML;U 6+2 v2;Core Gen10 Mobile; Desktop;;Rocket Lake;B0;02;a0671;RKL;S;Core Gen11; -SOC;;Lakefield;B2,B3;10;806a1;LKF;;Core w/Hybrid Technology; +Desktop;;Alder Lake;C0;03;b06f2;ADL;;Core Gen12; +Desktop;;Alder Lake;C0;03;b06f5;ADL;;Core Gen12; # sources: # https://en.wikichip.org/wiki/intel/cpuid diff --git a/SOURCES/microcode_ctl-use-microcode-20220207-tgz.patch b/SOURCES/microcode_ctl-use-microcode-20220207-tgz.patch deleted file mode 100644 index 7d2dcc9..0000000 --- a/SOURCES/microcode_ctl-use-microcode-20220207-tgz.patch +++ /dev/null @@ -1,13 +0,0 @@ -Index: microcode_ctl-2.1-18/Makefile -=================================================================== ---- microcode_ctl-2.1-18.orig/Makefile 2018-07-24 09:15:12.463115045 +0200 -+++ microcode_ctl-2.1-18/Makefile 2018-08-09 06:18:45.524503945 +0200 -@@ -8,7 +8,7 @@ - # 2 of the License, or (at your option) any later version. - - PROGRAM = intel-microcode2ucode --MICROCODE_INTEL = microcode-20180703.tgz -+MICROCODE_INTEL = microcode-20220207.tar.gz - - INS = install - CC = gcc diff --git a/SOURCES/microcode_ctl-use-microcode-20220510-tgz.patch b/SOURCES/microcode_ctl-use-microcode-20220510-tgz.patch new file mode 100644 index 0000000..fcf52bc --- /dev/null +++ b/SOURCES/microcode_ctl-use-microcode-20220510-tgz.patch @@ -0,0 +1,13 @@ +Index: microcode_ctl-2.1-18/Makefile +=================================================================== +--- microcode_ctl-2.1-18.orig/Makefile 2018-07-24 09:15:12.463115045 +0200 ++++ microcode_ctl-2.1-18/Makefile 2018-08-09 06:18:45.524503945 +0200 +@@ -8,7 +8,7 @@ + # 2 of the License, or (at your option) any later version. + + PROGRAM = intel-microcode2ucode +-MICROCODE_INTEL = microcode-20180703.tgz ++MICROCODE_INTEL = microcode-20220510.tar.gz + + INS = install + CC = gcc diff --git a/SPECS/microcode_ctl.spec b/SPECS/microcode_ctl.spec index 3a7b0f3..26ae5c0 100644 --- a/SPECS/microcode_ctl.spec +++ b/SPECS/microcode_ctl.spec @@ -1,5 +1,5 @@ %define upstream_version 2.1-18 -%define intel_ucode_version 20220207 +%define intel_ucode_version 20220510 %define caveat_dir %{_datarootdir}/microcode_ctl/ucode_with_caveats %define microcode_ctl_libexec %{_libexecdir}/microcode_ctl @@ -21,7 +21,7 @@ Summary: Tool to transform and deploy CPU microcode update for x86. Name: microcode_ctl Version: 2.1 -Release: 73.13%{?dist} +Release: 73.14%{?dist} Epoch: 2 Group: System Environment/Base License: GPLv2+ and Redistributable, no modification permitted @@ -116,6 +116,9 @@ Patch4: microcode_ctl-do-not-install-intel-ucode.patch Patch5: microcode_ctl-intel-microcode2ucode-buf-handling.patch Patch6: microcode_ctl-ignore-first-directory-level-in-archive.patch +# microcode-20220510-1-g6ff5aa2 "releasenote.md: changes summary fixes for microcode-20220510" +Patch1001: 0001-releasenote.md-changes-summary-fixes-for-microcode-2.patch + Buildroot: %{_tmppath}/%{name}-%{version}-root ExclusiveArch: %{ix86} x86_64 @@ -163,6 +166,8 @@ cp "%{SOURCE1}" . # strip it. %patch6 -p1 +%patch1001 -p1 + %build make CFLAGS="$RPM_OPT_FLAGS" %{?_smp_mflags} @@ -553,6 +558,131 @@ rm -rf %{buildroot} %changelog +* Tue May 10 2022 Eugene Syromiatnikov - 2:2.1-73.14 +- Update Intel CPU microcode to microcode-20220510 release, addresses + CVE-2022-0005, CVE-2022-21131, CVE-2022-21136, CVE-2022-21151 (#2090246, + #2090259, #2086748): + - Addition of 06-97-02/0x03 (ADL-HX C0) microcode at revision 0x1f; + - Addition of 06-97-05/0x03 (ADL-S 6+0 K0) microcode (in + intel-ucode/06-97-02) at revision 0x1f; + - Addition of 06-bf-02/0x03 (ADL C0) microcode (in intel-ucode/06-97-02) + at revision 0x1f; + - Addition of 06-bf-05/0x03 (ADL C0) microcode (in intel-ucode/06-97-02) + at revision 0x1f; + - Addition of 06-97-02/0x03 (ADL-HX C0) microcode (in + intel-ucode/06-97-05) at revision 0x1f; + - Addition of 06-97-05/0x03 (ADL-S 6+0 K0) microcode at revision 0x1f; + - Addition of 06-bf-02/0x03 (ADL C0) microcode (in intel-ucode/06-97-05) + at revision 0x1f; + - Addition of 06-bf-05/0x03 (ADL C0) microcode (in intel-ucode/06-97-05) + at revision 0x1f; + - Addition of 06-9a-03/0x80 (ADL-P 6+8/U 9W L0/R0) microcode at + revision 0x41c; + - Addition of 06-9a-04/0x80 (ADL-P 2+8 R0) microcode (in + intel-ucode/06-9a-03) at revision 0x41c; + - Addition of 06-9a-03/0x80 (ADL-P 6+8/U 9W L0/R0) microcode (in + intel-ucode/06-9a-04) at revision 0x41c; + - Addition of 06-9a-04/0x80 (ADL-P 2+8 R0) microcode at revision 0x41c; + - Addition of 06-97-02/0x03 (ADL-HX C0) microcode (in + intel-ucode/06-bf-02) at revision 0x1f; + - Addition of 06-97-05/0x03 (ADL-S 6+0 K0) microcode (in + intel-ucode/06-bf-02) at revision 0x1f; + - Addition of 06-bf-02/0x03 (ADL C0) microcode at revision 0x1f; + - Addition of 06-bf-05/0x03 (ADL C0) microcode (in intel-ucode/06-bf-02) + at revision 0x1f; + - Addition of 06-97-02/0x03 (ADL-HX C0) microcode (in + intel-ucode/06-bf-05) at revision 0x1f; + - Addition of 06-97-05/0x03 (ADL-S 6+0 K0) microcode (in + intel-ucode/06-bf-05) at revision 0x1f; + - Addition of 06-bf-02/0x03 (ADL C0) microcode (in intel-ucode/06-bf-05) + at revision 0x1f; + - Addition of 06-bf-05/0x03 (ADL C0) microcode at revision 0x1f; + - Update of 06-4e-03/0xc0 (SKL-U/U 2+3e/Y D0/K1) microcode (in + intel-06-4e-03/intel-ucode/06-4e-03) from revision 0xec up to 0xf0; + - Update of 06-55-04/0xb7 (SKX-D/SP/W/X H0/M0/M1/U0) microcode (in + intel-06-55-04/intel-ucode/06-55-04) from revision 0x2006c0a up + to 0x2006d05; + - Update of 06-5e-03/0x36 (SKL-H/S/Xeon E3 N0/R0/S0) microcode (in + intel-06-5e-03/intel-ucode/06-5e-03) from revision 0xec up to 0xf0; + - Update of 06-8c-01/0x80 (TGL-UP3/UP4 B1) microcode (in + intel-06-8c-01/intel-ucode/06-8c-01) from revision 0x9a up to 0xa4; + - Update of 06-8e-09/0x10 (AML-Y 2+2 H0) microcode (in + intel-06-8e-9e-0x-dell/intel-ucode/06-8e-09) from revision 0xec up + to 0xf0; + - Update of 06-8e-09/0xc0 (KBL-U/U 2+3e/Y H0/J1) microcode (in + intel-06-8e-9e-0x-dell/intel-ucode/06-8e-09) from revision 0xec up + to 0xf0; + - Update of 06-8e-0a/0xc0 (CFL-U 4+3e D0, KBL-R Y0) microcode (in + intel-06-8e-9e-0x-dell/intel-ucode/06-8e-0a) from revision 0xec up + to 0xf0; + - Update of 06-8e-0b/0xd0 (WHL-U W0) microcode (in + intel-06-8e-9e-0x-dell/intel-ucode/06-8e-0b) from revision 0xec up + to 0xf0; + - Update of 06-8e-0c/0x94 (AML-Y 4+2 V0, CML-U 4+2 V0, WHL-U V0) + microcode (in intel-06-8e-9e-0x-dell/intel-ucode/06-8e-0c) from + revision 0xec up to 0xf0; + - Update of 06-9e-09/0x2a (KBL-G/H/S/X/Xeon E3 B0) microcode (in + intel-06-8e-9e-0x-dell/intel-ucode/06-9e-09) from revision 0xec up + to 0xf0; + - Update of 06-9e-0a/0x22 (CFL-H/S/Xeon E U0) microcode (in + intel-06-8e-9e-0x-dell/intel-ucode/06-9e-0a) from revision 0xec up + to 0xf0; + - Update of 06-9e-0b/0x02 (CFL-E/H/S B0) microcode (in + intel-06-8e-9e-0x-dell/intel-ucode/06-9e-0b) from revision 0xec up + to 0xf0; + - Update of 06-9e-0c/0x22 (CFL-H/S/Xeon E P0) microcode (in + intel-06-8e-9e-0x-dell/intel-ucode/06-9e-0c) from revision 0xec up + to 0xf0; + - Update of 06-9e-0d/0x22 (CFL-H/S/Xeon E R0) microcode (in + intel-06-8e-9e-0x-dell/intel-ucode/06-9e-0d) from revision 0xec up + to 0xf0; + - Update of 06-37-09/0x0f (VLV D0) microcode from revision 0x90c up + to 0x90d; + - Update of 06-55-03/0x97 (SKX-SP B1) microcode from revision 0x100015c + up to 0x100015d; + - Update of 06-55-06/0xbf (CLX-SP B0) microcode from revision 0x400320a + up to 0x4003302; + - Update of 06-55-07/0xbf (CLX-SP/W/X B1/L1) microcode from revision + 0x500320a up to 0x5003302; + - Update of 06-55-0b/0xbf (CPX-SP A1) microcode from revision 0x7002402 + up to 0x7002501; + - Update of 06-5c-09/0x03 (APL D0) microcode from revision 0x46 up + to 0x48; + - Update of 06-5c-0a/0x03 (APL B1/F1) microcode from revision 0x24 up + to 0x28; + - Update of 06-5f-01/0x01 (DNV B0) microcode from revision 0x36 up + to 0x38; + - Update of 06-6a-06/0x87 (ICX-SP D0) microcode from revision 0xd000331 + up to 0xd000363; + - Update of 06-7a-01/0x01 (GLK B0) microcode from revision 0x38 up + to 0x3a; + - Update of 06-7a-08/0x01 (GLK-R R0) microcode from revision 0x1c up + to 0x1e; + - Update of 06-7e-05/0x80 (ICL-U/Y D1) microcode from revision 0xa8 + up to 0xb0; + - Update of 06-8a-01/0x10 (LKF B2/B3) microcode from revision 0x2d up + to 0x31; + - Update of 06-8c-02/0xc2 (TGL-R C0) microcode from revision 0x22 up + to 0x26; + - Update of 06-8d-01/0xc2 (TGL-H R0) microcode from revision 0x3c up + to 0x3e; + - Update of 06-96-01/0x01 (EHL B1) microcode from revision 0x15 up + to 0x16; + - Update of 06-9c-00/0x01 (JSL A0/A1) microcode from revision 0x2400001f + up to 0x24000023; + - Update of 06-a5-02/0x20 (CML-H R1) microcode from revision 0xec up + to 0xf0; + - Update of 06-a5-03/0x22 (CML-S 6+2 G1) microcode from revision 0xec + up to 0xf0; + - Update of 06-a5-05/0x22 (CML-S 10+2 Q0) microcode from revision 0xee + up to 0xf0; + - Update of 06-a6-00/0x80 (CML-U 6+2 A0) microcode from revision 0xea + up to 0xf0; + - Update of 06-a6-01/0x80 (CML-U 6+2 v2 K1) microcode from revision + 0xec up to 0xf0; + - Update of 06-a7-01/0x02 (RKL-S B0) microcode from revision 0x50 up + to 0x53. + * Thu Feb 10 2022 Eugene Syromiatnikov - 2:2.1-73.13 - Update Intel CPU microcode to microcode-20220207 release: - Fixes in releasenote.md file.