From c0f1955150469f5f857d7bc1010feada2ce00e90 Mon Sep 17 00:00:00 2001 From: CentOS Sources Date: Feb 22 2021 10:01:09 +0000 Subject: import microcode_ctl-20200609-2.20210216.1.el8_3 --- diff --git a/.gitignore b/.gitignore index 5eb5de5..2db0108 100644 --- a/.gitignore +++ b/.gitignore @@ -2,6 +2,7 @@ SOURCES/06-2d-07 SOURCES/06-4e-03 SOURCES/06-55-04 SOURCES/06-5e-03 +SOURCES/06-8c-01 SOURCES/microcode-20190918.tar.gz SOURCES/microcode-20191115.tar.gz -SOURCES/microcode-20201112.tar.gz +SOURCES/microcode-20210216.tar.gz diff --git a/.microcode_ctl.metadata b/.microcode_ctl.metadata index 0367497..46dfad3 100644 --- a/.microcode_ctl.metadata +++ b/.microcode_ctl.metadata @@ -2,6 +2,7 @@ bcf2173cd3dd499c37defbc2533703cfa6ec2430 SOURCES/06-2d-07 06432a25053c823b0e2a6b8e84e2e2023ee3d43e SOURCES/06-4e-03 2e405644a145de0f55517b6a9de118eec8ec1e5a SOURCES/06-55-04 86c60ee7d5d0d7115a4962c1c61ceecb0fd3a95a SOURCES/06-5e-03 +2204a6dee1688980cd228268fdf4b6ed5904fe04 SOURCES/06-8c-01 bc20d6789e6614b9d9f88ee321ab82bed220f26f SOURCES/microcode-20190918.tar.gz 774636f4d440623b0ee6a2dad65260e81208074d SOURCES/microcode-20191115.tar.gz -010507b8a7ca0b5c4a01cd1f8a6adae5f0fd316d SOURCES/microcode-20201112.tar.gz +26608161d98c3d0c965fc41856520434b14c000d SOURCES/microcode-20210216.tar.gz diff --git a/SOURCES/06-55-04_readme b/SOURCES/06-55-04_readme index 5df5775..cdec2c2 100644 --- a/SOURCES/06-55-04_readme +++ b/SOURCES/06-55-04_readme @@ -18,6 +18,7 @@ microcode revisions in question are listed below: * 06-55-04, revision 0x2000065: f27f12b9d53f492c297afd856cdbc596786fad23 * 06-55-04, revision 0x2006906: 5f18f985f6d5ad369b5f6549b7f3ee55acaef967 * 06-55-04, revision 0x2006a08: 4059fb1f60370297454177f63cd7cc20b3fa1212 + * 06-55-04, revision 0x2006a0a: 7ec27025329c82de9553c14a78733ad1013e5462 Please contact your system vendor for a BIOS/firmware update that contains the latest microcode version. For the information regarding microcode versions diff --git a/SOURCES/check_caveats b/SOURCES/check_caveats index ab02a02..ee8db57 100755 --- a/SOURCES/check_caveats +++ b/SOURCES/check_caveats @@ -628,10 +628,9 @@ for cfg in $(echo "${configs}"); do cfg_mc_present=0 for p in $(printf "%s" "$cfg_path"); do - { /usr/bin/find "$MC_CAVEATS_DATA_DIR/$cfg" \ - -path "$MC_CAVEATS_DATA_DIR/$cfg/$p" -print0; - /bin/true; } \ - | /bin/grep -zFxq "$cpu_mc_path" \ + /usr/bin/find "$MC_CAVEATS_DATA_DIR/$cfg" \ + -path "$MC_CAVEATS_DATA_DIR/$cfg/$p" -print0 \ + | /bin/grep -zFxc "$cpu_mc_path" > /dev/null \ || continue cfg_mc_present=1 diff --git a/SPECS/microcode_ctl.spec b/SPECS/microcode_ctl.spec index 826f1d7..bff2626 100644 --- a/SPECS/microcode_ctl.spec +++ b/SPECS/microcode_ctl.spec @@ -1,4 +1,4 @@ -%define intel_ucode_version 20201112 +%define intel_ucode_version 20210216 %global debug_package %{nil} %define caveat_dir %{_datarootdir}/microcode_ctl/ucode_with_caveats @@ -33,6 +33,11 @@ Source5: https://github.com/intel/Intel-Linux-Processor-Microcode-Data-Fi Source6: https://github.com/intel/Intel-Linux-Processor-Microcode-Data-Files/archive/microcode-20190918.tar.gz # microcode-20191115 release,containing revision 0xca of 06-[89]e-0X microcode Source7: https://github.com/intel/Intel-Linux-Processor-Microcode-Data-Files/archive/microcode-20191115.tar.gz +# microcode-20201118 has removed 06-8c-01/0x80 (TGL-UP3/UP4 B1) microcode update +# at revision 0x68; it is, however, may still be useful for some[1], so it is +# to be preserved in a caveat. +# [1] https://github.com/intel/Intel-Linux-Processor-Microcode-Data-Files/issues/39 +Source8: https://github.com/intel/Intel-Linux-Processor-Microcode-Data-Files/raw/microcode-20201112/intel-ucode/06-8c-01 # systemd unit @@ -117,9 +122,9 @@ Source181: 06-8c-01_config Source182: 06-8c-01_disclaimer # "Provides:" RPM tags generator -Source200: gen_provides.sh -Source201: codenames.list -Source202: gen_updates2.py +Source1000: gen_provides.sh +Source1001: codenames.list +Source1002: gen_updates2.py ExclusiveArch: %{ix86} x86_64 BuildRequires: systemd-units @@ -132,7 +137,7 @@ Requires(postun): systemd coreutils Requires(posttrans): dracut coreutils %global _use_internal_dependency_generator 0 -%define __find_provides "%{SOURCE200}" "%{SOURCE201}" +%define __find_provides "%{SOURCE1000}" "%{SOURCE1001}" %description This package provides microcode update files for Intel x86 and x86_64 CPUs. @@ -177,7 +182,7 @@ tar xvvf "%{SOURCE7}" --wildcards --strip-components=2 \ popd # Moving 06-8c-01 microcode to intel-ucode-with-caveats -mv intel-ucode/06-8c-01 intel-ucode-with-caveats/ +cp "%{SOURCE8}" intel-ucode-with-caveats/ : @@ -309,7 +314,7 @@ install -m 644 "%{SOURCE182}" "%{tgl_inst_dir}/disclaimer" # SUMMARY.intel-ucode generation # It is to be done only after file population, so, it is here, # at the end of the install stage -/usr/libexec/platform-python "%{SOURCE202}" -C "%{SOURCE201}" \ +/usr/libexec/platform-python "%{SOURCE1002}" -C "%{SOURCE1001}" \ summary -A "%{buildroot}" \ > "%{buildroot}/%{_pkgdocdir}/SUMMARY.intel-ucode" @@ -543,6 +548,19 @@ rm -rf %{buildroot} %changelog +* Wed Feb 17 2021 Eugene Syromiatnikov - 4:20200609-2.20210216.1 +- Update Intel CPU microcode to microcode-20210216 release (#1907898): + - Update of 06-55-04/0xb7 (SKX-D/SP/W/X H0/M0/M1/U0) microcode (in + intel-06-55-04/intel-ucode/06-55-04) from revision 0x2006a08 up + to 0x2006a0a; + - Update of 06-55-06/0xbf (CLX-SP B0) microcode from revision 0x4003003 + up to 0x4003006; + - Update of 06-55-07/0xbf (CLX-SP/W/X B1/L1) microcode from revision + 0x5003003 up to 0x5003006. + +* Wed Feb 17 2021 Eugene Syromiatnikov - 4:20200609-2.20201112.2 +- Do not use "grep -q" in a pipe in check_caveats (#1902021). + * Fri Nov 13 2020 Eugene Syromiatnikov - 4:20200609-2.20201112.1 - Update Intel CPU microcode to microcode-20201112 release (#1897187): - Addition of 06-8a-01/0x10 (LKF B2/B3) microcode at revision 0x28;