From aa2db5e31f5ee8dae4a2ffc7c742577e8451d19b Mon Sep 17 00:00:00 2001 From: CentOS Sources Date: May 18 2021 06:36:19 +0000 Subject: import microcode_ctl-20210216-1.el8 --- diff --git a/SPECS/microcode_ctl.spec b/SPECS/microcode_ctl.spec index bff2626..09226d7 100644 --- a/SPECS/microcode_ctl.spec +++ b/SPECS/microcode_ctl.spec @@ -12,8 +12,8 @@ Summary: CPU microcode updates for Intel x86 processors Name: microcode_ctl -Version: 20200609 -Release: 2.%{intel_ucode_version}.1%{?dist} +Version: %{intel_ucode_version} +Release: 1%{?dist} Epoch: 4 License: CC0 and Redistributable, no modification permitted URL: https://github.com/intel/Intel-Linux-Processor-Microcode-Data-Files @@ -548,8 +548,8 @@ rm -rf %{buildroot} %changelog -* Wed Feb 17 2021 Eugene Syromiatnikov - 4:20200609-2.20210216.1 -- Update Intel CPU microcode to microcode-20210216 release (#1907898): +* Wed Feb 17 2021 Eugene Syromiatnikov - 4:20210216-1 +- Update Intel CPU microcode to microcode-20210216 release (#1902884): - Update of 06-55-04/0xb7 (SKX-D/SP/W/X H0/M0/M1/U0) microcode (in intel-06-55-04/intel-ucode/06-55-04) from revision 0x2006a08 up to 0x2006a0a; @@ -558,23 +558,28 @@ rm -rf %{buildroot} - Update of 06-55-07/0xbf (CLX-SP/W/X B1/L1) microcode from revision 0x5003003 up to 0x5003006. -* Wed Feb 17 2021 Eugene Syromiatnikov - 4:20200609-2.20201112.2 +* Wed Feb 17 2021 Eugene Syromiatnikov - 4:20201112-3 +- Remove 06-55-04/06-55-06/06-55-07 (SKX-SP/CLX-SP) microcode-20201110 caveats. + +* Tue Dec 01 2020 Eugene Syromiatnikov - 4:20201112-2 - Do not use "grep -q" in a pipe in check_caveats (#1902021). +- Add 06-55-04/06-55-06/06-55-07 (SKX-SP/CLX-SP) microcode-20201110 caveats + (#1902884). -* Fri Nov 13 2020 Eugene Syromiatnikov - 4:20200609-2.20201112.1 -- Update Intel CPU microcode to microcode-20201112 release (#1897187): +* Fri Nov 13 2020 Eugene Syromiatnikov - 4:20201112-1 +- Update Intel CPU microcode to microcode-20201112 release (#1896912): - Addition of 06-8a-01/0x10 (LKF B2/B3) microcode at revision 0x28; - Update of 06-7a-01/0x01 (GLK B0) microcode from revision 0x32 up to 0x34; - Updated releasenote file. -* Fri Nov 13 2020 Eugene Syromiatnikov - 4:20200609-2.20201027.2 -- Disable 06-8c-01 (TGL-UP3/UP4 B1) microcode update by default. +* Fri Nov 13 2020 Eugene Syromiatnikov - 4:20201027-2 +- Disable 06-8c-01 (TGL-UP3/UP4 B1) microcode update by default (#1897534). -* Thu Oct 29 2020 Eugene Syromiatnikov - 4:20200609-2.20201027.1 +* Thu Oct 29 2020 Eugene Syromiatnikov - 4:20201027-1 - Update Intel CPU microcode to microcode-20201027 release, addresses CVE-2020-8694, CVE-2020-8695, CVE-2020-8696, CVE-2020-8698 - (#1893265, #1893253, #1893233): + (#1893266, #1893254, #1893234): - Addition of 06-55-0b/0xbf (CPX-SP A1) microcode at revision 0x700001e; - Addition of 06-8c-01/0x80 (TGL-UP3/UP4 B1) microcode at revision 0x68; - Addition of 06-a5-02/0x20 (CML-H R1) microcode at revision 0xe0; @@ -638,7 +643,7 @@ rm -rf %{buildroot} - Update of 06-a6-00/0x80 (CML-U 6+2 A0) microcode from revision 0xca up to 0xe0. -* Fri Aug 21 2020 Eugene Syromiatnikov - 4:20200609-2.20200609.3 +* Fri Aug 21 2020 Eugene Syromiatnikov - 4:20200609-3 - Add README file to the documentation directory. - Add publicly-sourced codenames list to supply to gen_provides.sh; update the latter to handle the somewhat different format.