From fa677be73a6edee7ebecea3131635fe796f7c121 Mon Sep 17 00:00:00 2001 From: CentOS Sources Date: Nov 03 2016 06:11:00 +0000 Subject: import mesa-11.2.2-2.20160614.el7 --- diff --git a/.gitignore b/.gitignore index 9c4c77b..d0c81e0 100644 --- a/.gitignore +++ b/.gitignore @@ -1 +1 @@ -SOURCES/mesa-20150824.tar.xz +SOURCES/mesa-20160614.tar.xz diff --git a/.mesa.metadata b/.mesa.metadata index 1f1b7ab..e228522 100644 --- a/.mesa.metadata +++ b/.mesa.metadata @@ -1 +1 @@ -0c2905f0618a45791a1a7dadd52256631d3dee7a SOURCES/mesa-20150824.tar.xz +ae86032256fffb939bf1400eded554c077b522ea SOURCES/mesa-20160614.tar.xz diff --git a/SOURCES/0001-i956-Add-more-Kabylake-PCI-IDs.patch b/SOURCES/0001-i956-Add-more-Kabylake-PCI-IDs.patch new file mode 100644 index 0000000..caaaf2d --- /dev/null +++ b/SOURCES/0001-i956-Add-more-Kabylake-PCI-IDs.patch @@ -0,0 +1,39 @@ +From 958e3df72c1ff440babfc3f875a6aa3d9bb13f4c Mon Sep 17 00:00:00 2001 +From: Rodrigo Vivi +Date: Thu, 23 Jun 2016 14:35:09 -0700 +Subject: [PATCH 1/2] i956: Add more Kabylake PCI IDs. + +The spec has been updated adding new PCI IDs. + +Reviewed-by: Dhinakaran Pandiyan +Acked-by: Kenneth Graunke +Signed-off-by: Rodrigo Vivi +--- + include/pci_ids/i965_pci_ids.h | 3 +++ + 1 file changed, 3 insertions(+) + +diff --git a/include/pci_ids/i965_pci_ids.h b/include/pci_ids/i965_pci_ids.h +index bdfbefe..02031ed 100644 +--- a/include/pci_ids/i965_pci_ids.h ++++ b/include/pci_ids/i965_pci_ids.h +@@ -137,6 +137,7 @@ CHIPSET(0x193D, skl_gt4, "Intel(R) Iris Pro Graphics P580 (Skylake GT4e)") + CHIPSET(0x5902, kbl_gt1, "Intel(R) Kabylake GT1") + CHIPSET(0x5906, kbl_gt1, "Intel(R) Kabylake GT1") + CHIPSET(0x590A, kbl_gt1, "Intel(R) Kabylake GT1") ++CHIPSET(0x5908, kbl_gt1, "Intel(R) Kabylake GT1") + CHIPSET(0x590B, kbl_gt1, "Intel(R) Kabylake GT1") + CHIPSET(0x590E, kbl_gt1, "Intel(R) Kabylake GT1") + CHIPSET(0x5913, kbl_gt1_5, "Intel(R) Kabylake GT1.5") +@@ -149,7 +150,9 @@ CHIPSET(0x591B, kbl_gt2, "Intel(R) Kabylake GT2") + CHIPSET(0x591D, kbl_gt2, "Intel(R) Kabylake GT2") + CHIPSET(0x591E, kbl_gt2, "Intel(R) Kabylake GT2") + CHIPSET(0x5921, kbl_gt2, "Intel(R) Kabylake GT2F") ++CHIPSET(0x5923, kbl_gt3, "Intel(R) Kabylake GT3") + CHIPSET(0x5926, kbl_gt3, "Intel(R) Kabylake GT3") ++CHIPSET(0x5927, kbl_gt3, "Intel(R) Kabylake GT3") + CHIPSET(0x592A, kbl_gt3, "Intel(R) Kabylake GT3") + CHIPSET(0x592B, kbl_gt3, "Intel(R) Kabylake GT3") + CHIPSET(0x5932, kbl_gt4, "Intel(R) Kabylake GT4") +-- +2.7.4 + diff --git a/SOURCES/0001-virgl-fix-checking-fences.patch b/SOURCES/0001-virgl-fix-checking-fences.patch new file mode 100644 index 0000000..eee5d99 --- /dev/null +++ b/SOURCES/0001-virgl-fix-checking-fences.patch @@ -0,0 +1,53 @@ +From dc81b3ad43dde0815baf957e7cf4c633d6f350f8 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= +Date: Tue, 7 Jun 2016 14:54:34 +0200 +Subject: [PATCH] virgl: fix checking fences +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +When calling virgl_fence_wait() with timeout=0, +virgl_{drm,vtest}_resource_is_busy() is called. However, it returns TRUE +for a busy resource, whereace virgl_fence_wait() should return TRUE for +a completed (non-busy) resource. + +This fixes running supertuxkart in a VM (I could not reproduce locally +with vtest though there is a similar fix) + +Signed-off-by: Marc-André Lureau +Cc: "11.1 11.2 12.0" +Signed-off-by: Dave Airlie +--- + src/gallium/winsys/virgl/drm/virgl_drm_winsys.c | 2 +- + src/gallium/winsys/virgl/vtest/virgl_vtest_winsys.c | 2 +- + 2 files changed, 2 insertions(+), 2 deletions(-) + +diff --git a/src/gallium/winsys/virgl/drm/virgl_drm_winsys.c b/src/gallium/winsys/virgl/drm/virgl_drm_winsys.c +index c77b899..81afa84 100644 +--- a/src/gallium/winsys/virgl/drm/virgl_drm_winsys.c ++++ b/src/gallium/winsys/virgl/drm/virgl_drm_winsys.c +@@ -734,7 +734,7 @@ static bool virgl_fence_wait(struct virgl_winsys *vws, + struct virgl_hw_res *res = virgl_hw_res(fence); + + if (timeout == 0) +- return virgl_drm_resource_is_busy(vdws, res); ++ return !virgl_drm_resource_is_busy(vdws, res); + + if (timeout != PIPE_TIMEOUT_INFINITE) { + int64_t start_time = os_time_get(); +diff --git a/src/gallium/winsys/virgl/vtest/virgl_vtest_winsys.c b/src/gallium/winsys/virgl/vtest/virgl_vtest_winsys.c +index 9c9ec04..ce8ac97 100644 +--- a/src/gallium/winsys/virgl/vtest/virgl_vtest_winsys.c ++++ b/src/gallium/winsys/virgl/vtest/virgl_vtest_winsys.c +@@ -544,7 +544,7 @@ static bool virgl_fence_wait(struct virgl_winsys *vws, + struct virgl_hw_res *res = virgl_hw_res(fence); + + if (timeout == 0) +- return virgl_vtest_resource_is_busy(vdws, res); ++ return !virgl_vtest_resource_is_busy(vdws, res); + + if (timeout != PIPE_TIMEOUT_INFINITE) { + int64_t start_time = os_time_get(); +-- +2.5.5 + diff --git a/SOURCES/0002-i965-Removing-PCI-IDs-that-are-no-longer-listed-as-K.patch b/SOURCES/0002-i965-Removing-PCI-IDs-that-are-no-longer-listed-as-K.patch new file mode 100644 index 0000000..680ef7a --- /dev/null +++ b/SOURCES/0002-i965-Removing-PCI-IDs-that-are-no-longer-listed-as-K.patch @@ -0,0 +1,43 @@ +From 900068c8108607b025c990857580a4e5923b94d4 Mon Sep 17 00:00:00 2001 +From: Rodrigo Vivi +Date: Thu, 23 Jun 2016 14:38:18 -0700 +Subject: [PATCH 2/2] i965: Removing PCI IDs that are no longer listed as + Kabylake. + +This is unusual. Usually IDs listed on early stages of platform +definition are kept there as reserved for later use. + +However these IDs here are not listed anymore in any of steppings +and devices IDs tables for Kabylake on configurations overview +section of BSpec. + +So it is better removing them before they become used in any +other future platform. + +Reviewed-by: Dhinakaran Pandiyan +Acked-by: Kenneth Graunke +Signed-off-by: Rodrigo Vivi +--- + include/pci_ids/i965_pci_ids.h | 5 ----- + 1 file changed, 5 deletions(-) + +diff --git a/include/pci_ids/i965_pci_ids.h b/include/pci_ids/i965_pci_ids.h +index 02031ed..189a1c7 100644 +--- a/include/pci_ids/i965_pci_ids.h ++++ b/include/pci_ids/i965_pci_ids.h +@@ -153,12 +153,7 @@ CHIPSET(0x5921, kbl_gt2, "Intel(R) Kabylake GT2F") + CHIPSET(0x5923, kbl_gt3, "Intel(R) Kabylake GT3") + CHIPSET(0x5926, kbl_gt3, "Intel(R) Kabylake GT3") + CHIPSET(0x5927, kbl_gt3, "Intel(R) Kabylake GT3") +-CHIPSET(0x592A, kbl_gt3, "Intel(R) Kabylake GT3") +-CHIPSET(0x592B, kbl_gt3, "Intel(R) Kabylake GT3") +-CHIPSET(0x5932, kbl_gt4, "Intel(R) Kabylake GT4") +-CHIPSET(0x593A, kbl_gt4, "Intel(R) Kabylake GT4") + CHIPSET(0x593B, kbl_gt4, "Intel(R) Kabylake GT4") +-CHIPSET(0x593D, kbl_gt4, "Intel(R) Kabylake GT4") + CHIPSET(0x22B0, chv, "Intel(R) HD Graphics (Cherryview)") + CHIPSET(0x22B1, chv, "Intel(R) HD Graphics (Cherryview)") + CHIPSET(0x22B2, chv, "Intel(R) HD Graphics (Cherryview)") +-- +2.7.4 + diff --git a/SOURCES/make-git-snapshot.sh b/SOURCES/make-git-snapshot.sh index 16777cc..54a8b16 100755 --- a/SOURCES/make-git-snapshot.sh +++ b/SOURCES/make-git-snapshot.sh @@ -15,11 +15,11 @@ DIRNAME=mesa-$( date +%Y%m%d ) echo REF ${REF:+--reference $REF} echo DIRNAME $DIRNAME -echo HEAD ${1:-10.6} +echo HEAD ${1:-11.2} rm -rf $DIRNAME -git clone --depth 1 ${REF:+--reference $REF} --branch 10.6 \ +git clone --depth 1 ${REF:+--reference $REF} --branch 11.2 \ git://git.freedesktop.org/git/mesa/mesa $DIRNAME GIT_DIR=$DIRNAME/.git git archive --format=tar --prefix=$DIRNAME/ ${1:-HEAD} \ diff --git a/SOURCES/mesa-10.2-evergreen-big-endian.patch b/SOURCES/mesa-10.2-evergreen-big-endian.patch index 227f120..ab67078 100644 --- a/SOURCES/mesa-10.2-evergreen-big-endian.patch +++ b/SOURCES/mesa-10.2-evergreen-big-endian.patch @@ -1,8 +1,7 @@ -diff --git a/src/gallium/drivers/r600/evergreen_state.c b/src/gallium/drivers/r600/evergreen_state.c -index f0d4503..c617425 100644 ---- a/src/gallium/drivers/r600/evergreen_state.c -+++ b/src/gallium/drivers/r600/evergreen_state.c -@@ -219,7 +219,7 @@ static bool r600_is_sampler_format_supported(struct pipe_screen *screen, enum pi +diff -up mesa-20160225/src/gallium/drivers/r600/evergreen_state.c.egbe mesa-20160225/src/gallium/drivers/r600/evergreen_state.c +--- mesa-20160225/src/gallium/drivers/r600/evergreen_state.c.egbe 2016-02-22 21:42:41.000000000 +1000 ++++ mesa-20160225/src/gallium/drivers/r600/evergreen_state.c 2016-02-25 13:06:47.351154059 +1000 +@@ -219,7 +219,7 @@ static bool r600_is_sampler_format_suppo static bool r600_is_colorbuffer_format_supported(enum chip_class chip, enum pipe_format format) { return r600_translate_colorformat(chip, format) != ~0U && @@ -11,7 +10,7 @@ index f0d4503..c617425 100644 } static bool r600_is_zs_format_supported(enum pipe_format format) -@@ -918,7 +918,8 @@ void evergreen_init_color_surface_rat(struct r600_context *rctx, +@@ -982,7 +982,8 @@ void evergreen_init_color_surface_rat(st unsigned format = r600_translate_colorformat(rctx->b.chip_class, surf->base.format); unsigned endian = r600_colorformat_endian_swap(format); @@ -21,7 +20,7 @@ index f0d4503..c617425 100644 unsigned block_size = align(util_format_get_blocksize(pipe_buffer->format), 4); unsigned pitch_alignment = -@@ -1078,7 +1079,7 @@ void evergreen_init_color_surface(struct r600_context *rctx, +@@ -1143,7 +1144,7 @@ void evergreen_init_color_surface(struct format = r600_translate_colorformat(rctx->b.chip_class, surf->base.format); assert(format != ~0); @@ -30,11 +29,10 @@ index f0d4503..c617425 100644 assert(swap != ~0); if (rtex->resource.b.b.usage == PIPE_USAGE_STAGING) { -diff --git a/src/gallium/drivers/r600/r600_state.c b/src/gallium/drivers/r600/r600_state.c -index dd2e423..190fdfc 100644 ---- a/src/gallium/drivers/r600/r600_state.c -+++ b/src/gallium/drivers/r600/r600_state.c -@@ -149,7 +149,7 @@ static bool r600_is_sampler_format_supported(struct pipe_screen *screen, enum pi +diff -up mesa-20160225/src/gallium/drivers/r600/r600_state.c.egbe mesa-20160225/src/gallium/drivers/r600/r600_state.c +--- mesa-20160225/src/gallium/drivers/r600/r600_state.c.egbe 2016-02-22 21:42:41.000000000 +1000 ++++ mesa-20160225/src/gallium/drivers/r600/r600_state.c 2016-02-25 13:06:47.351154059 +1000 +@@ -149,7 +149,7 @@ static bool r600_is_sampler_format_suppo static bool r600_is_colorbuffer_format_supported(enum chip_class chip, enum pipe_format format) { return r600_translate_colorformat(chip, format) != ~0U && @@ -43,7 +41,7 @@ index dd2e423..190fdfc 100644 } static bool r600_is_zs_format_supported(enum pipe_format format) -@@ -899,7 +899,7 @@ static void r600_init_color_surface(struct r600_context *rctx, +@@ -927,7 +927,7 @@ static void r600_init_color_surface(stru format = r600_translate_colorformat(rctx->b.chip_class, surf->base.format); assert(format != ~0); @@ -52,11 +50,10 @@ index dd2e423..190fdfc 100644 assert(swap != ~0); if (rtex->resource.b.b.usage == PIPE_USAGE_STAGING) { -diff --git a/src/gallium/drivers/r600/r600_state_common.c b/src/gallium/drivers/r600/r600_state_common.c -index fabc52c..c276016 100644 ---- a/src/gallium/drivers/r600/r600_state_common.c -+++ b/src/gallium/drivers/r600/r600_state_common.c -@@ -2258,7 +2258,7 @@ uint32_t r600_translate_colorformat(enum chip_class chip, enum pipe_format forma +diff -up mesa-20160225/src/gallium/drivers/r600/r600_state_common.c.egbe mesa-20160225/src/gallium/drivers/r600/r600_state_common.c +--- mesa-20160225/src/gallium/drivers/r600/r600_state_common.c.egbe 2016-02-22 21:42:41.000000000 +1000 ++++ mesa-20160225/src/gallium/drivers/r600/r600_state_common.c 2016-02-25 13:06:47.352154086 +1000 +@@ -2704,7 +2704,7 @@ uint32_t r600_translate_colorformat(enum uint32_t r600_colorformat_endian_swap(uint32_t colorformat) { @@ -65,11 +62,10 @@ index fabc52c..c276016 100644 switch(colorformat) { /* 8-bit buffers. */ case V_0280A0_COLOR_4_4: -diff --git a/src/gallium/drivers/radeon/r600_pipe_common.h b/src/gallium/drivers/radeon/r600_pipe_common.h -index e7f410d..9bb471a 100644 ---- a/src/gallium/drivers/radeon/r600_pipe_common.h -+++ b/src/gallium/drivers/radeon/r600_pipe_common.h -@@ -457,7 +457,7 @@ struct pipe_surface *r600_create_surface_custom(struct pipe_context *pipe, +diff -up mesa-20160225/src/gallium/drivers/radeon/r600_pipe_common.h.egbe mesa-20160225/src/gallium/drivers/radeon/r600_pipe_common.h +--- mesa-20160225/src/gallium/drivers/radeon/r600_pipe_common.h.egbe 2016-02-22 21:42:41.000000000 +1000 ++++ mesa-20160225/src/gallium/drivers/radeon/r600_pipe_common.h 2016-02-25 13:06:47.352154086 +1000 +@@ -576,7 +576,7 @@ struct pipe_surface *r600_create_surface struct pipe_resource *texture, const struct pipe_surface *templ, unsigned width, unsigned height); @@ -78,11 +74,10 @@ index e7f410d..9bb471a 100644 void evergreen_do_fast_color_clear(struct r600_common_context *rctx, struct pipe_framebuffer_state *fb, struct r600_atom *fb_state, -diff --git a/src/gallium/drivers/radeon/r600_texture.c b/src/gallium/drivers/radeon/r600_texture.c -index 9a46c53..5022666 100644 ---- a/src/gallium/drivers/radeon/r600_texture.c -+++ b/src/gallium/drivers/radeon/r600_texture.c -@@ -1157,10 +1157,215 @@ static void r600_surface_destroy(struct pipe_context *pipe, +diff -up mesa-20160225/src/gallium/drivers/radeon/r600_texture.c.egbe mesa-20160225/src/gallium/drivers/radeon/r600_texture.c +--- mesa-20160225/src/gallium/drivers/radeon/r600_texture.c.egbe 2016-02-22 21:42:41.000000000 +1000 ++++ mesa-20160225/src/gallium/drivers/radeon/r600_texture.c 2016-02-25 13:07:22.903127421 +1000 +@@ -1252,10 +1252,215 @@ static void r600_surface_destroy(struct FREE(surface); } @@ -299,22 +294,21 @@ index 9a46c53..5022666 100644 #define HAS_SWIZZLE(chan,swz) (desc->swizzle[chan] == UTIL_FORMAT_SWIZZLE_##swz) if (format == PIPE_FORMAT_R11G11B10_FLOAT) /* isn't plain */ -@@ -1238,6 +1443,10 @@ void evergreen_do_fast_color_clear(struct r600_common_context *rctx, - { - int i; +@@ -1411,6 +1616,10 @@ void evergreen_do_fast_color_clear(struc + if (rctx->render_cond) + return; +#ifdef PIPE_ARCH_BIG_ENDIAN + return false; /* broken; overkill to just disable them, but */ +#endif + - if (rctx->current_render_cond) - return; - -diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c -index 7f65c47..f3976eb 100644 ---- a/src/gallium/drivers/radeonsi/si_state.c -+++ b/src/gallium/drivers/radeonsi/si_state.c -@@ -1447,7 +1447,7 @@ static bool si_is_vertex_format_supported(struct pipe_screen *screen, enum pipe_ + for (i = 0; i < fb->nr_cbufs; i++) { + struct r600_texture *tex; + unsigned clear_bit = PIPE_CLEAR_COLOR0 << i; +diff -up mesa-20160225/src/gallium/drivers/radeonsi/si_state.c.egbe mesa-20160225/src/gallium/drivers/radeonsi/si_state.c +--- mesa-20160225/src/gallium/drivers/radeonsi/si_state.c.egbe 2016-02-22 21:42:41.000000000 +1000 ++++ mesa-20160225/src/gallium/drivers/radeonsi/si_state.c 2016-02-25 13:06:47.353154114 +1000 +@@ -1966,7 +1966,7 @@ static bool si_is_vertex_format_supporte static bool si_is_colorbuffer_format_supported(enum pipe_format format) { return si_translate_colorformat(format) != V_028C70_COLOR_INVALID && @@ -323,7 +317,7 @@ index 7f65c47..f3976eb 100644 } static bool si_is_zs_format_supported(enum pipe_format format) -@@ -1615,7 +1615,7 @@ static void si_initialize_color_surface(struct si_context *sctx, +@@ -2249,7 +2249,7 @@ static void si_initialize_color_surface( R600_ERR("Invalid CB format: %d, disabling CB.\n", surf->base.format); } assert(format != V_028C70_COLOR_INVALID); diff --git a/SOURCES/mesa-10.6-fix-texcompress-big-endian.patch b/SOURCES/mesa-10.6-fix-texcompress-big-endian.patch deleted file mode 100644 index c1befe1..0000000 --- a/SOURCES/mesa-10.6-fix-texcompress-big-endian.patch +++ /dev/null @@ -1,115 +0,0 @@ -From bd016a2601a741799bc76734deae0cb9ebcb2b8f Mon Sep 17 00:00:00 2001 -From: Ulrich Weigand -Date: Tue, 15 Sep 2015 15:23:26 +0200 -Subject: [PATCH] mesa: Fix texture compression on big-endian systems - -Various pieces of code to create compressed textures will first -generate an uncompressed RGBA texture into a temporary buffer, -and then read from that buffer while creating the final compressed -texture in the requested format. - -The code reading from the temporary buffer assumes the buffer is -formatted as an array of bytes in RGBA order. However, the buffer -is filled using a _mesa_texstore call with MESA_FORMAT_R8G8B8A8_UNORM -format -- this is defined as an array of *integers* holding the -RGBA values in packed format (least-significant to most-significant). -This means incorrect bytes are accessed on big-endian systems. - -This patch fixes this by using the MESA_FORMAT_A8B8G8R8_UNORM format -instead on big-endian systems when filling the buffer. This fixes -about 100 piglit test case failures on s390x for me. - -Signed-off-by: Ulrich Weigand -Tested-by: Oded Gabbay -Cc: "10.6" "11.0" -Signed-off-by: Dave Airlie ---- - src/mesa/main/texcompress_bptc.c | 3 ++- - src/mesa/main/texcompress_fxt1.c | 3 ++- - src/mesa/main/texcompress_rgtc.c | 6 ++++-- - src/mesa/main/texcompress_s3tc.c | 9 ++++++--- - 4 files changed, 14 insertions(+), 7 deletions(-) - -diff --git a/src/mesa/main/texcompress_bptc.c b/src/mesa/main/texcompress_bptc.c -index a600180..f0f6553 100644 ---- a/src/mesa/main/texcompress_bptc.c -+++ b/src/mesa/main/texcompress_bptc.c -@@ -1291,7 +1291,8 @@ _mesa_texstore_bptc_rgba_unorm(TEXSTORE_PARAMS) - tempImageSlices[0] = (GLubyte *) tempImage; - _mesa_texstore(ctx, dims, - baseInternalFormat, -- MESA_FORMAT_R8G8B8A8_UNORM, -+ _mesa_little_endian() ? MESA_FORMAT_R8G8B8A8_UNORM -+ : MESA_FORMAT_A8B8G8R8_UNORM, - rgbaRowStride, tempImageSlices, - srcWidth, srcHeight, srcDepth, - srcFormat, srcType, srcAddr, -diff --git a/src/mesa/main/texcompress_fxt1.c b/src/mesa/main/texcompress_fxt1.c -index d605e25..ae339e1 100644 ---- a/src/mesa/main/texcompress_fxt1.c -+++ b/src/mesa/main/texcompress_fxt1.c -@@ -130,7 +130,8 @@ _mesa_texstore_rgba_fxt1(TEXSTORE_PARAMS) - tempImageSlices[0] = (GLubyte *) tempImage; - _mesa_texstore(ctx, dims, - baseInternalFormat, -- MESA_FORMAT_R8G8B8A8_UNORM, -+ _mesa_little_endian() ? MESA_FORMAT_R8G8B8A8_UNORM -+ : MESA_FORMAT_A8B8G8R8_UNORM, - rgbaRowStride, tempImageSlices, - srcWidth, srcHeight, srcDepth, - srcFormat, srcType, srcAddr, -diff --git a/src/mesa/main/texcompress_rgtc.c b/src/mesa/main/texcompress_rgtc.c -index 66de1f1..8cab7a5 100644 ---- a/src/mesa/main/texcompress_rgtc.c -+++ b/src/mesa/main/texcompress_rgtc.c -@@ -196,9 +196,11 @@ _mesa_texstore_rg_rgtc2(TEXSTORE_PARAMS) - dstFormat == MESA_FORMAT_LA_LATC2_UNORM); - - if (baseInternalFormat == GL_RG) -- tempFormat = MESA_FORMAT_R8G8_UNORM; -+ tempFormat = _mesa_little_endian() ? MESA_FORMAT_R8G8_UNORM -+ : MESA_FORMAT_G8R8_UNORM; - else -- tempFormat = MESA_FORMAT_L8A8_UNORM; -+ tempFormat = _mesa_little_endian() ? MESA_FORMAT_L8A8_UNORM -+ : MESA_FORMAT_A8L8_UNORM; - - rgRowStride = 2 * srcWidth * sizeof(GLubyte); - tempImage = malloc(srcWidth * srcHeight * 2 * sizeof(GLubyte)); -diff --git a/src/mesa/main/texcompress_s3tc.c b/src/mesa/main/texcompress_s3tc.c -index 6cfe06a..7ddb0ed 100644 ---- a/src/mesa/main/texcompress_s3tc.c -+++ b/src/mesa/main/texcompress_s3tc.c -@@ -198,7 +198,8 @@ _mesa_texstore_rgba_dxt1(TEXSTORE_PARAMS) - tempImageSlices[0] = (GLubyte *) tempImage; - _mesa_texstore(ctx, dims, - baseInternalFormat, -- MESA_FORMAT_R8G8B8A8_UNORM, -+ _mesa_little_endian() ? MESA_FORMAT_R8G8B8A8_UNORM -+ : MESA_FORMAT_A8B8G8R8_UNORM, - rgbaRowStride, tempImageSlices, - srcWidth, srcHeight, srcDepth, - srcFormat, srcType, srcAddr, -@@ -255,7 +256,8 @@ _mesa_texstore_rgba_dxt3(TEXSTORE_PARAMS) - tempImageSlices[0] = (GLubyte *) tempImage; - _mesa_texstore(ctx, dims, - baseInternalFormat, -- MESA_FORMAT_R8G8B8A8_UNORM, -+ _mesa_little_endian() ? MESA_FORMAT_R8G8B8A8_UNORM -+ : MESA_FORMAT_A8B8G8R8_UNORM, - rgbaRowStride, tempImageSlices, - srcWidth, srcHeight, srcDepth, - srcFormat, srcType, srcAddr, -@@ -311,7 +313,8 @@ _mesa_texstore_rgba_dxt5(TEXSTORE_PARAMS) - tempImageSlices[0] = (GLubyte *) tempImage; - _mesa_texstore(ctx, dims, - baseInternalFormat, -- MESA_FORMAT_R8G8B8A8_UNORM, -+ _mesa_little_endian() ? MESA_FORMAT_R8G8B8A8_UNORM -+ : MESA_FORMAT_A8B8G8R8_UNORM, - rgbaRowStride, tempImageSlices, - srcWidth, srcHeight, srcDepth, - srcFormat, srcType, srcAddr, --- -2.4.3 - diff --git a/SOURCES/mesa-10.6-llvmpipe-imm-fix-power.patch b/SOURCES/mesa-10.6-llvmpipe-imm-fix-power.patch deleted file mode 100644 index ca8c514..0000000 --- a/SOURCES/mesa-10.6-llvmpipe-imm-fix-power.patch +++ /dev/null @@ -1,41 +0,0 @@ -From 8e45b5eecce4233389bb2a50a142d37e2676c71f Mon Sep 17 00:00:00 2001 -From: Oded Gabbay -Date: Thu, 3 Sep 2015 19:00:26 +0300 -Subject: [PATCH] llvmpipe: convert double to long long instead of unsigned - long long - -round(val*dscale) produces a double result, as val and dscale are double. -However, LLVMConstInt receives unsigned long long, so there is an -implicit conversion from double to unsigned long long. -This is an undefined behavior. Therefore, we need to first explicitly -convert the round result to long long, and then let the compiler handle -conversion from that to unsigned long long. - -This bug manifests itself in POWER, where all IMM values of -1 are being -converted to 0 implicitly, causing a wrong LLVM IR output. - -Signed-off-by: Oded Gabbay -CC: "10.6 11.0" -Reviewed-by: Tom Stellard -Reviewed-by: Roland Scheidegger -(cherry picked from commit 4f2290d1612569686284609059d29a85c9de67cf) ---- - src/gallium/auxiliary/gallivm/lp_bld_const.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/src/gallium/auxiliary/gallivm/lp_bld_const.c b/src/gallium/auxiliary/gallivm/lp_bld_const.c -index 0f5a8f8..9cd7c55 100644 ---- a/src/gallium/auxiliary/gallivm/lp_bld_const.c -+++ b/src/gallium/auxiliary/gallivm/lp_bld_const.c -@@ -311,7 +311,7 @@ lp_build_const_elem(struct gallivm_state *gallivm, - else { - double dscale = lp_const_scale(type); - -- elem = LLVMConstInt(elem_type, round(val*dscale), 0); -+ elem = LLVMConstInt(elem_type, (long long) round(val*dscale), 0); - } - - return elem; --- -2.4.3 - diff --git a/SPECS/mesa.spec b/SPECS/mesa.spec index 7ad8c48..ba6f923 100644 --- a/SPECS/mesa.spec +++ b/SPECS/mesa.spec @@ -42,13 +42,13 @@ %define _default_patch_fuzz 2 -%define gitdate 20150824 +%define gitdate 20160614 #% define snapshot Summary: Mesa graphics libraries Name: mesa -Version: 10.6.5 -Release: 3.%{gitdate}%{?dist} +Version: 11.2.2 +Release: 2.%{gitdate}%{?dist} License: MIT Group: System Environment/Libraries URL: http://www.mesa3d.org @@ -69,8 +69,11 @@ Patch9: mesa-8.0-llvmpipe-shmget.patch Patch12: mesa-8.0.1-fix-16bpp.patch Patch15: mesa-9.2-hardware-float.patch Patch20: mesa-10.2-evergreen-big-endian.patch -Patch25: mesa-10.6-llvmpipe-imm-fix-power.patch -Patch26: mesa-10.6-fix-texcompress-big-endian.patch + +Patch30: 0001-virgl-fix-checking-fences.patch + +Patch40: 0001-i956-Add-more-Kabylake-PCI-IDs.patch +Patch41: 0002-i965-Removing-PCI-IDs-that-are-no-longer-listed-as-K.patch BuildRequires: pkgconfig autoconf automake libtool %if %{with_hardware} @@ -302,9 +305,10 @@ grep -q ^/ src/gallium/auxiliary/vl/vl_decoder.c && exit 1 #patch12 -p1 -b .16bpp %patch15 -p1 -b .hwfloat -%patch20 -p1 -b .egbe -%patch25 -p1 -b .llvmimm -%patch26 -p1 -b .texcmprs +#patch20 -p1 -b .egbe +%patch30 -p1 -b .virglfix +%patch40 -p1 -b .kblid1 +%patch41 -p1 -b .kblid2 %if 0%{with_private_llvm} sed -i 's/\[llvm-config\]/\[mesa-private-llvm-config-%{__isa_bits}\]/g' configure.ac @@ -357,7 +361,7 @@ export CXXFLAGS="$RPM_OPT_FLAGS -fno-rtti -fno-exceptions" --enable-dri \ %if %{with_hardware} %{?with_vmware:--enable-xa} \ - --with-gallium-drivers=%{?with_vmware:svga,}%{?with_radeonsi:radeonsi,}%{?with_llvm:swrast,r600,}%{?with_freedreno:freedreno,}r300,nouveau \ + --with-gallium-drivers=%{?with_vmware:svga,}%{?with_radeonsi:radeonsi,}%{?with_llvm:swrast,r600,}%{?with_freedreno:freedreno,}r300,nouveau,virgl \ %else --with-gallium-drivers=%{?with_llvm:swrast} \ %endif @@ -482,6 +486,7 @@ rm -rf $RPM_BUILD_ROOT %{_libdir}/dri/kgsl_dri.so %endif %{_libdir}/dri/nouveau_dri.so +%{_libdir}/dri/virtio_gpu_dri.so %if 0%{?with_vmware} %{_libdir}/dri/vmwgfx_dri.so %endif @@ -607,6 +612,18 @@ rm -rf $RPM_BUILD_ROOT %endif %changelog +* Tue Aug 09 2016 Rob Clark - 11.2.2-2.20160614 +- update kbl pci ids. + +* Tue Jun 14 2016 Dave Airlie - 11.2.2-1.20160614 +- mesa 11.2.2 release + +* Tue Apr 05 2016 Dave Airlie 11.2.0-1.20160405 +- mesa 11.2.0 final release + +* Thu Mar 10 2016 Dave Airlie 11.2.0-0.2.20160310 +- mesa 11.2.0-rc2 release + enable virgl + * Thu Sep 17 2015 Oded Gabbay 10.6.5-3.20150824 - Fix texture compression for big-endian (#1250168)