diff --git a/.gitignore b/.gitignore
index 500b912..06c0fa6 100644
--- a/.gitignore
+++ b/.gitignore
@@ -1 +1,2 @@
-SOURCES/llvm-11.0.0rc2.src.tar.xz
+SOURCES/hans-gpg-key.asc
+SOURCES/llvm-11.0.0.src.tar.xz
diff --git a/.llvm.metadata b/.llvm.metadata
index e72831b..10f8833 100644
--- a/.llvm.metadata
+++ b/.llvm.metadata
@@ -1 +1,2 @@
-18d3831e22c0059a31b82c2c571d2aaec5a194e2 SOURCES/llvm-11.0.0rc2.src.tar.xz
+32fa4b0193960f05064f2ab31b5a89c7cf48a0b9 SOURCES/hans-gpg-key.asc
+5723ae20d1e6e9ccfda208cb9a8cf2f87c3a6107 SOURCES/llvm-11.0.0.src.tar.xz
diff --git a/SOURCES/0001-PowerPC-PPCBoolRetToInt-Don-t-translate-Constant-s-o.patch b/SOURCES/0001-PowerPC-PPCBoolRetToInt-Don-t-translate-Constant-s-o.patch
deleted file mode 100644
index 07b96b8..0000000
--- a/SOURCES/0001-PowerPC-PPCBoolRetToInt-Don-t-translate-Constant-s-o.patch
+++ /dev/null
@@ -1,99 +0,0 @@
-From cbea17568f4301582c1d5d43990f089ca6cff522 Mon Sep 17 00:00:00 2001
-From: Kai Luo <lkail@cn.ibm.com>
-Date: Fri, 28 Aug 2020 01:56:12 +0000
-Subject: [PATCH] [PowerPC] PPCBoolRetToInt: Don't translate Constant's
- operands
-
-When collecting `i1` values via `findAllDefs`, ignore Constant's
-operands, since Constant's operands might not be `i1`.
-
-Fixes https://bugs.llvm.org/show_bug.cgi?id=46923 which causes ICE
-```
-llvm-project/llvm/lib/IR/Constants.cpp:1924: static llvm::Constant *llvm::ConstantExpr::getZExt(llvm::Constant *, llvm::Type *, bool): Assertion `C->getType()->getScalarSizeInBits() < Ty->getScalarSizeInBits()&& "SrcTy must be smaller than DestTy for ZExt!"' failed.
-```
-
-Differential Revision: https://reviews.llvm.org/D85007
----
- llvm/lib/Target/PowerPC/PPCBoolRetToInt.cpp | 15 ++++++-----
- llvm/test/CodeGen/PowerPC/pr46923.ll        | 29 +++++++++++++++++++++
- 2 files changed, 38 insertions(+), 6 deletions(-)
- create mode 100644 llvm/test/CodeGen/PowerPC/pr46923.ll
-
-diff --git a/llvm/lib/Target/PowerPC/PPCBoolRetToInt.cpp b/llvm/lib/Target/PowerPC/PPCBoolRetToInt.cpp
-index acc8b317a22..172f1346c50 100644
---- a/llvm/lib/Target/PowerPC/PPCBoolRetToInt.cpp
-+++ b/llvm/lib/Target/PowerPC/PPCBoolRetToInt.cpp
-@@ -78,9 +78,9 @@ class PPCBoolRetToInt : public FunctionPass {
-       Value *Curr = WorkList.back();
-       WorkList.pop_back();
-       auto *CurrUser = dyn_cast<User>(Curr);
--      // Operands of CallInst are skipped because they may not be Bool type,
--      // and their positions are defined by ABI.
--      if (CurrUser && !isa<CallInst>(Curr))
-+      // Operands of CallInst/Constant are skipped because they may not be Bool
-+      // type. For CallInst, their positions are defined by ABI.
-+      if (CurrUser && !isa<CallInst>(Curr) && !isa<Constant>(Curr))
-         for (auto &Op : CurrUser->operands())
-           if (Defs.insert(Op).second)
-             WorkList.push_back(Op);
-@@ -90,6 +90,9 @@ class PPCBoolRetToInt : public FunctionPass {
- 
-   // Translate a i1 value to an equivalent i32/i64 value:
-   Value *translate(Value *V) {
-+    assert(V->getType() == Type::getInt1Ty(V->getContext()) &&
-+           "Expect an i1 value");
-+
-     Type *IntTy = ST->isPPC64() ? Type::getInt64Ty(V->getContext())
-                                 : Type::getInt32Ty(V->getContext());
- 
-@@ -252,9 +255,9 @@ class PPCBoolRetToInt : public FunctionPass {
-       auto *First = dyn_cast<User>(Pair.first);
-       auto *Second = dyn_cast<User>(Pair.second);
-       assert((!First || Second) && "translated from user to non-user!?");
--      // Operands of CallInst are skipped because they may not be Bool type,
--      // and their positions are defined by ABI.
--      if (First && !isa<CallInst>(First))
-+      // Operands of CallInst/Constant are skipped because they may not be Bool
-+      // type. For CallInst, their positions are defined by ABI.
-+      if (First && !isa<CallInst>(First) && !isa<Constant>(First))
-         for (unsigned i = 0; i < First->getNumOperands(); ++i)
-           Second->setOperand(i, BoolToIntMap[First->getOperand(i)]);
-     }
-diff --git a/llvm/test/CodeGen/PowerPC/pr46923.ll b/llvm/test/CodeGen/PowerPC/pr46923.ll
-new file mode 100644
-index 00000000000..3e9faa60422
---- /dev/null
-+++ b/llvm/test/CodeGen/PowerPC/pr46923.ll
-@@ -0,0 +1,29 @@
-+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-+; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-unknown \
-+; RUN:   -ppc-asm-full-reg-names < %s | FileCheck %s
-+
-+@bar = external constant i64, align 8
-+
-+define i1 @foo() {
-+; CHECK-LABEL: foo:
-+; CHECK:       # %bb.0: # %entry
-+; CHECK-NEXT:    li r3, 0
-+; CHECK-NEXT:    isel r3, 0, r3, 4*cr5+lt
-+; CHECK-NEXT:    blr
-+entry:
-+  br label %next
-+
-+next:
-+  br i1 undef, label %true, label %false
-+
-+true:
-+  br label %end
-+
-+false:
-+  br label %end
-+
-+end:
-+  %a = phi i1 [ icmp ugt (i64 0, i64 ptrtoint (i64* @bar to i64)), %true ],
-+              [ icmp ugt (i64 0, i64 2), %false ]
-+  ret i1 %a
-+}
--- 
-2.25.2
-
diff --git a/SOURCES/0001-SystemZ-Use-LA-instead-of-AGR-in-eliminateFrameIndex.patch b/SOURCES/0001-SystemZ-Use-LA-instead-of-AGR-in-eliminateFrameIndex.patch
new file mode 100644
index 0000000..80d6a1e
--- /dev/null
+++ b/SOURCES/0001-SystemZ-Use-LA-instead-of-AGR-in-eliminateFrameIndex.patch
@@ -0,0 +1,166 @@
+From d851495f2fe614c4c860bda1bd3c80bfbe48360b Mon Sep 17 00:00:00 2001
+From: Jonas Paulsson <paulsson@linux.vnet.ibm.com>
+Date: Thu, 8 Oct 2020 13:18:29 +0200
+Subject: [PATCH] [SystemZ] Use LA instead of AGR in eliminateFrameIndex().
+
+Since AGR clobbers CC it should not be used here.
+
+Fixes https://bugs.llvm.org/show_bug.cgi?id=47736.
+
+Review: Ulrich Weigand
+Differential Revision: https://reviews.llvm.org/D89034
+---
+ .../Target/SystemZ/SystemZRegisterInfo.cpp    |  4 +--
+ llvm/test/CodeGen/SystemZ/frame-14.ll         | 26 +++++++++----------
+ llvm/test/CodeGen/SystemZ/frame-16.ll         |  4 +--
+ 3 files changed, 17 insertions(+), 17 deletions(-)
+
+diff --git a/llvm/lib/Target/SystemZ/SystemZRegisterInfo.cpp b/llvm/lib/Target/SystemZ/SystemZRegisterInfo.cpp
+index 53b06c6e7e6d..88212e52460f 100644
+--- a/llvm/lib/Target/SystemZ/SystemZRegisterInfo.cpp
++++ b/llvm/lib/Target/SystemZ/SystemZRegisterInfo.cpp
+@@ -322,8 +322,8 @@ SystemZRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator MI,
+         // Load the high offset into the scratch register and use it as
+         // an index.
+         TII->loadImmediate(MBB, MI, ScratchReg, HighOffset);
+-        BuildMI(MBB, MI, DL, TII->get(SystemZ::AGR),ScratchReg)
+-          .addReg(ScratchReg, RegState::Kill).addReg(BasePtr);
++        BuildMI(MBB, MI, DL, TII->get(SystemZ::LA), ScratchReg)
++          .addReg(BasePtr, RegState::Kill).addImm(0).addReg(ScratchReg);
+       }
+ 
+       // Use the scratch register as the base.  It then dies here.
+diff --git a/llvm/test/CodeGen/SystemZ/frame-14.ll b/llvm/test/CodeGen/SystemZ/frame-14.ll
+index e70731249b42..193ff81123c5 100644
+--- a/llvm/test/CodeGen/SystemZ/frame-14.ll
++++ b/llvm/test/CodeGen/SystemZ/frame-14.ll
+@@ -85,13 +85,13 @@ define void @f3() {
+ define void @f4() {
+ ; CHECK-NOFP-LABEL: f4:
+ ; CHECK-NOFP: llilh %r1, 8
+-; CHECK-NOFP: agr %r1, %r15
++; CHECK-NOFP: la %r1, 0(%r1,%r15)
+ ; CHECK-NOFP: mvi 0(%r1), 42
+ ; CHECK-NOFP: br %r14
+ ;
+ ; CHECK-FP-LABEL: f4:
+ ; CHECK-FP: llilh %r1, 8
+-; CHECK-FP: agr %r1, %r11
++; CHECK-FP: la %r1, 0(%r1,%r11)
+ ; CHECK-FP: mvi 0(%r1), 42
+ ; CHECK-FP: br %r14
+   %region1 = alloca [524104 x i8], align 8
+@@ -108,13 +108,13 @@ define void @f4() {
+ define void @f5() {
+ ; CHECK-NOFP-LABEL: f5:
+ ; CHECK-NOFP: llilh %r1, 8
+-; CHECK-NOFP: agr %r1, %r15
++; CHECK-NOFP: la %r1, 0(%r1,%r15)
+ ; CHECK-NOFP: mvi 4095(%r1), 42
+ ; CHECK-NOFP: br %r14
+ ;
+ ; CHECK-FP-LABEL: f5:
+ ; CHECK-FP: llilh %r1, 8
+-; CHECK-FP: agr %r1, %r11
++; CHECK-FP: la %r1, 0(%r1,%r11)
+ ; CHECK-FP: mvi 4095(%r1), 42
+ ; CHECK-FP: br %r14
+   %region1 = alloca [524104 x i8], align 8
+@@ -130,13 +130,13 @@ define void @f5() {
+ define void @f6() {
+ ; CHECK-NOFP-LABEL: f6:
+ ; CHECK-NOFP: llilh %r1, 8
+-; CHECK-NOFP: agr %r1, %r15
++; CHECK-NOFP: la %r1, 0(%r1,%r15)
+ ; CHECK-NOFP: mviy 4096(%r1), 42
+ ; CHECK-NOFP: br %r14
+ ;
+ ; CHECK-FP-LABEL: f6:
+ ; CHECK-FP: llilh %r1, 8
+-; CHECK-FP: agr %r1, %r11
++; CHECK-FP: la %r1, 0(%r1,%r11)
+ ; CHECK-FP: mviy 4096(%r1), 42
+ ; CHECK-FP: br %r14
+   %region1 = alloca [524104 x i8], align 8
+@@ -155,13 +155,13 @@ define void @f6() {
+ define void @f7() {
+ ; CHECK-NOFP-LABEL: f7:
+ ; CHECK-NOFP: llilh %r1, 23
+-; CHECK-NOFP: agr %r1, %r15
++; CHECK-NOFP: la %r1, 0(%r1,%r15)
+ ; CHECK-NOFP: mviy 65535(%r1), 42
+ ; CHECK-NOFP: br %r14
+ ;
+ ; CHECK-FP-LABEL: f7:
+ ; CHECK-FP: llilh %r1, 23
+-; CHECK-FP: agr %r1, %r11
++; CHECK-FP: la %r1, 0(%r1,%r11)
+ ; CHECK-FP: mviy 65535(%r1), 42
+ ; CHECK-FP: br %r14
+   %region1 = alloca [1048400 x i8], align 8
+@@ -178,13 +178,13 @@ define void @f7() {
+ define void @f8() {
+ ; CHECK-NOFP-LABEL: f8:
+ ; CHECK-NOFP: llilh %r1, 24
+-; CHECK-NOFP: agr %r1, %r15
++; CHECK-NOFP: la %r1, 0(%r1,%r15)
+ ; CHECK-NOFP: mvi 7(%r1), 42
+ ; CHECK-NOFP: br %r14
+ ;
+ ; CHECK-FP-LABEL: f8:
+ ; CHECK-FP: llilh %r1, 24
+-; CHECK-FP: agr %r1, %r11
++; CHECK-FP: la %r1, 0(%r1,%r11)
+ ; CHECK-FP: mvi 7(%r1), 42
+ ; CHECK-FP: br %r14
+   %region1 = alloca [1048408 x i8], align 8
+@@ -233,7 +233,7 @@ define void @f10(i32 *%vptr) {
+ ; CHECK-NOFP-LABEL: f10:
+ ; CHECK-NOFP: stg [[REGISTER:%r[1-9][0-4]?]], [[OFFSET:160|168]](%r15)
+ ; CHECK-NOFP: llilh [[REGISTER]], 8
+-; CHECK-NOFP: agr [[REGISTER]], %r15
++; CHECK-NOFP: la [[REGISTER]], 0([[REGISTER]],%r15)
+ ; CHECK-NOFP: mvi 0([[REGISTER]]), 42
+ ; CHECK-NOFP: lg [[REGISTER]], [[OFFSET]](%r15)
+ ; CHECK-NOFP: br %r14
+@@ -241,7 +241,7 @@ define void @f10(i32 *%vptr) {
+ ; CHECK-FP-LABEL: f10:
+ ; CHECK-FP: stg [[REGISTER:%r[1-9][0-4]?]], [[OFFSET:160|168]](%r11)
+ ; CHECK-FP: llilh [[REGISTER]], 8
+-; CHECK-FP: agr [[REGISTER]], %r11
++; CHECK-FP: la [[REGISTER]], 0([[REGISTER]],%r11)
+ ; CHECK-FP: mvi 0([[REGISTER]]), 42
+ ; CHECK-FP: lg [[REGISTER]], [[OFFSET]](%r11)
+ ; CHECK-FP: br %r14
+@@ -273,7 +273,7 @@ define void @f11(i32 *%vptr) {
+ ; CHECK-NOFP: stmg %r6, %r15,
+ ; CHECK-NOFP: stg [[REGISTER:%r[1-9][0-4]?]], [[OFFSET:160|168]](%r15)
+ ; CHECK-NOFP: llilh [[REGISTER]], 8
+-; CHECK-NOFP: agr [[REGISTER]], %r15
++; CHECK-NOFP: la [[REGISTER]], 0([[REGISTER]],%r15)
+ ; CHECK-NOFP: mvi 0([[REGISTER]]), 42
+ ; CHECK-NOFP: lg [[REGISTER]], [[OFFSET]](%r15)
+ ; CHECK-NOFP: lmg %r6, %r15,
+diff --git a/llvm/test/CodeGen/SystemZ/frame-16.ll b/llvm/test/CodeGen/SystemZ/frame-16.ll
+index ae8a041ae110..a95c58207afb 100644
+--- a/llvm/test/CodeGen/SystemZ/frame-16.ll
++++ b/llvm/test/CodeGen/SystemZ/frame-16.ll
+@@ -311,13 +311,13 @@ define void @f11(i32 *%vptr, i8 %byte) {
+ define void @f12(i8 %byte, i64 %index) {
+ ; CHECK-NOFP-LABEL: f12:
+ ; CHECK-NOFP: llilh %r1, 8
+-; CHECK-NOFP: agr %r1, %r15
++; CHECK-NOFP: la %r1, 0(%r1,%r15)
+ ; CHECK-NOFP: stc %r2, 0(%r3,%r1)
+ ; CHECK-NOFP: br %r14
+ ;
+ ; CHECK-FP-LABEL: f12:
+ ; CHECK-FP: llilh %r1, 8
+-; CHECK-FP: agr %r1, %r11
++; CHECK-FP: la %r1, 0(%r1,%r11)
+ ; CHECK-FP: stc %r2, 0(%r3,%r1)
+ ; CHECK-FP: br %r14
+   %region1 = alloca [524104 x i8], align 8
+-- 
+2.26.2
+
diff --git a/SOURCES/hans-gpg-key.asc b/SOURCES/hans-gpg-key.asc
deleted file mode 100644
index 2cf5255..0000000
--- a/SOURCES/hans-gpg-key.asc
+++ /dev/null
@@ -1,7 +0,0 @@
-<html>
-<head><title>404 Not Found</title></head>
-<body bgcolor="white">
-<center><h1>404 Not Found</h1></center>
-<hr><center>nginx/1.4.6 (Ubuntu)</center>
-</body>
-</html>
diff --git a/SOURCES/llvm-11.0.0.src.tar.xz.sig b/SOURCES/llvm-11.0.0.src.tar.xz.sig
new file mode 100644
index 0000000..a7df9b4
Binary files /dev/null and b/SOURCES/llvm-11.0.0.src.tar.xz.sig differ
diff --git a/SOURCES/llvm-11.0.0rc2.src.tar.xz.sig b/SOURCES/llvm-11.0.0rc2.src.tar.xz.sig
deleted file mode 100644
index cbad2ca..0000000
Binary files a/SOURCES/llvm-11.0.0rc2.src.tar.xz.sig and /dev/null differ
diff --git a/SPECS/llvm.spec b/SPECS/llvm.spec
index 9532f4f..ad09a1b 100644
--- a/SPECS/llvm.spec
+++ b/SPECS/llvm.spec
@@ -12,8 +12,8 @@
 
 %global llvm_libdir %{_libdir}/%{name}
 %global build_llvm_libdir %{buildroot}%{llvm_libdir}
-%global rc_ver 2
-%global baserelease 0.6
+#%%global rc_ver 6
+%global baserelease 2
 %global llvm_srcdir llvm-%{version}%{?rc_ver:rc%{rc_ver}}.src
 %global maj_ver 11
 %global min_ver 0
@@ -60,9 +60,10 @@ Source3:	run-lit-tests
 Source4:	lit.fedora.cfg.py
 %endif
 
+# Fix coreos-installer test crash on s390x (rhbz#1883457), https://reviews.llvm.org/D89034
+Patch1:		0001-SystemZ-Use-LA-instead-of-AGR-in-eliminateFrameIndex.patch
 Patch2:		0001-CMake-Split-static-library-exports-into-their-own-ex.patch
 Patch3:		0001-CMake-Split-test-binary-exports-into-their-own-expor.patch
-Patch5: 	0001-PowerPC-PPCBoolRetToInt-Don-t-translate-Constant-s-o.patch
 
 # RHEL-specific patches.
 Patch101:      0001-Deactivate-markdown-doc.patch
@@ -210,7 +211,7 @@ cd _build
 #
 # -DCMAKE_INSTALL_RPATH=";" is a workaround for llvm manually setting the
 # rpath of libraries and binaries.  llvm will skip the manual setting
-# if CAMKE_INSTALL_RPATH is set to a value, but cmake interprets this value
+# if CMAKE_INSTALL_RPATH is set to a value, but cmake interprets this value
 # as nothing, so it sets the rpath to "" when installing.
 %cmake .. -G Ninja \
 	-DBUILD_SHARED_LIBS:BOOL=OFF \
@@ -556,6 +557,12 @@ fi
 %endif
 
 %changelog
+* Thu Oct 29 2020 sguelton@redhat.com - 11.0.0-2
+- Remove obsolete patch
+
+* Wed Sep 30 2020 sguelton@redhat.com - 11.0.0-1
+- 11.0.1 final release
+
 * Wed Sep 30 2020 sguelton@redhat.com - 11.0.0-0.6.rc2
 - Restore default CI behavior wrt. number of threads