From a5cb43154905e2708bf90988bd2aa5f2fca6b935 Mon Sep 17 00:00:00 2001 Message-Id: From: Jiri Denemark Date: Mon, 24 Apr 2017 15:40:07 +0200 Subject: [PATCH] Add support for CPU cache specification This patch introduces sub element of /domain/cpu. Currently only a single element is allowed. Signed-off-by: Jiri Denemark (cherry picked from commit a646a6016a7c62688988f7cfaa22e1340c2ce761) https://bugzilla.redhat.com/show_bug.cgi?id=1428952 Signed-off-by: Jiri Denemark --- docs/formatdomain.html.in | 35 ++++++++++++ docs/schemas/cputypes.rng | 21 ++++++++ docs/schemas/domaincommon.rng | 3 ++ src/conf/cpu_conf.c | 62 ++++++++++++++++++++++ src/conf/cpu_conf.h | 19 +++++++ src/libvirt_private.syms | 2 + .../generic-cpu-cache-disable.xml | 20 +++++++ .../generic-cpu-cache-emulate.xml | 20 +++++++ .../generic-cpu-cache-passthrough.xml | 20 +++++++ tests/genericxml2xmltest.c | 4 ++ 10 files changed, 206 insertions(+) create mode 100644 tests/genericxml2xmlindata/generic-cpu-cache-disable.xml create mode 100644 tests/genericxml2xmlindata/generic-cpu-cache-emulate.xml create mode 100644 tests/genericxml2xmlindata/generic-cpu-cache-passthrough.xml diff --git a/docs/formatdomain.html.in b/docs/formatdomain.html.in index aae5e9c07..aee1e1442 100644 --- a/docs/formatdomain.html.in +++ b/docs/formatdomain.html.in @@ -1198,6 +1198,7 @@ <model fallback='allow'>core2duo</model> <vendor>Intel</vendor> <topology sockets='1' cores='2' threads='1'/> + <cache level='3' mode='emulate'/> <feature policy='disable' name='lahf_lm'/> </cpu> ... @@ -1211,6 +1212,7 @@ 
 <cpu mode='host-passthrough'>
+  <cache mode='passthrough'/>
   <feature policy='disable' name='lahf_lm'/>
 ...
@@ -1431,6 +1433,39 @@ Since 0.8.5 the policy attribute can be omitted and will default to require. + +
cache
+
Since 3.3.0 the cache + element describes the virtual CPU cache. If the element is missing, + the hypervisor will use a sensible default. + +
+
level
+
This optional attribute specifies which cache level is described + by the element. Missing attribute means the element describes all + CPU cache levels at once. Mixing cache elements with + the level attribute set and those without the + attribute is forbidden.
+ +
mode
+
+ The following values are supported: +
+
emulate
+
The hypervisor will provide a fake CPU cache data.
+ +
passthrough
+
The real CPU cache data reported by the host CPU will be + passed through to the virtual CPU.
+ +
disable
+
The virtual CPU will report no CPU cache of the specified + level (or no cache at all if the level attribute + is missing).
+
+
+
+

diff --git a/docs/schemas/cputypes.rng b/docs/schemas/cputypes.rng index 8189114e3..3eef16abc 100644 --- a/docs/schemas/cputypes.rng +++ b/docs/schemas/cputypes.rng @@ -142,4 +142,25 @@ + + + + + + 1 + 2 + 3 + + + + + + emulate + passthrough + disable + + + + + diff --git a/docs/schemas/domaincommon.rng b/docs/schemas/domaincommon.rng index edc225fe5..d5c28ee3c 100644 --- a/docs/schemas/domaincommon.rng +++ b/docs/schemas/domaincommon.rng @@ -4545,6 +4545,9 @@ + + + diff --git a/src/conf/cpu_conf.c b/src/conf/cpu_conf.c index 623b1699f..1b098c476 100644 --- a/src/conf/cpu_conf.c +++ b/src/conf/cpu_conf.c @@ -62,6 +62,12 @@ VIR_ENUM_IMPL(virCPUFeaturePolicy, VIR_CPU_FEATURE_LAST, "disable", "forbid") +VIR_ENUM_IMPL(virCPUCacheMode, VIR_CPU_CACHE_MODE_LAST, + "emulate", + "passthrough", + "disable") + + void virCPUDefFreeFeatures(virCPUDefPtr def) { @@ -92,6 +98,7 @@ virCPUDefFree(virCPUDefPtr def) return; virCPUDefFreeModel(def); + VIR_FREE(def->cache); VIR_FREE(def); } @@ -204,7 +211,18 @@ virCPUDefCopyWithoutModel(const virCPUDef *cpu) copy->threads = cpu->threads; copy->arch = cpu->arch; + if (cpu->cache) { + if (VIR_ALLOC(copy->cache) < 0) + goto error; + + *copy->cache = *cpu->cache; + } + return copy; + + error: + virCPUDefFree(copy); + return NULL; } @@ -489,6 +507,41 @@ virCPUDefParseXML(xmlNodePtr node, def->features[i].policy = policy; } + if (virXPathInt("count(./cache)", ctxt, &n) < 0) { + goto cleanup; + } else if (n > 1) { + virReportError(VIR_ERR_XML_ERROR, "%s", + _("at most one CPU cache element may be specified")); + goto cleanup; + } else if (n == 1) { + int level = -1; + char *strmode; + int mode; + + if (virXPathBoolean("boolean(./cache[1]/@level)", ctxt) == 1 && + (virXPathInt("string(./cache[1]/@level)", ctxt, &level) < 0 || + level < 1 || level > 3)) { + virReportError(VIR_ERR_XML_ERROR, "%s", + _("invalid CPU cache level, must be in range [1,3]")); + goto cleanup; + } + + if (!(strmode = virXPathString("string(./cache[1]/@mode)", ctxt)) || + (mode = virCPUCacheModeTypeFromString(strmode)) < 0) { + VIR_FREE(strmode); + virReportError(VIR_ERR_XML_ERROR, "%s", + _("missing or invalid CPU cache mode")); + goto cleanup; + } + VIR_FREE(strmode); + + if (VIR_ALLOC(def->cache) < 0) + goto cleanup; + + def->cache->level = level; + def->cache->mode = mode; + } + cleanup: ctxt->node = oldnode; VIR_FREE(fallback); @@ -662,6 +715,15 @@ virCPUDefFormatBuf(virBufferPtr buf, virBufferAddLit(buf, "/>\n"); } + if (def->cache) { + virBufferAddLit(buf, "cache->level != -1) + virBufferAsprintf(buf, "level='%d' ", def->cache->level); + virBufferAsprintf(buf, "mode='%s'", + virCPUCacheModeTypeToString(def->cache->mode)); + virBufferAddLit(buf, "/>\n"); + } + for (i = 0; i < def->nfeatures; i++) { virCPUFeatureDefPtr feature = def->features + i; diff --git a/src/conf/cpu_conf.h b/src/conf/cpu_conf.h index 3e02deed4..09438b68b 100644 --- a/src/conf/cpu_conf.h +++ b/src/conf/cpu_conf.h @@ -103,6 +103,24 @@ struct _virCPUFeatureDef { }; +typedef enum { + VIR_CPU_CACHE_MODE_EMULATE, + VIR_CPU_CACHE_MODE_PASSTHROUGH, + VIR_CPU_CACHE_MODE_DISABLE, + + VIR_CPU_CACHE_MODE_LAST +} virCPUCacheMode; + +VIR_ENUM_DECL(virCPUCacheMode); + +typedef struct _virCPUCacheDef virCPUCacheDef; +typedef virCPUCacheDef *virCPUCacheDefPtr; +struct _virCPUCacheDef { + int level; /* -1 for unspecified */ + virCPUCacheMode mode; +}; + + typedef struct _virCPUDef virCPUDef; typedef virCPUDef *virCPUDefPtr; struct _virCPUDef { @@ -121,6 +139,7 @@ struct _virCPUDef { size_t nfeatures; size_t nfeatures_max; virCPUFeatureDefPtr features; + virCPUCacheDefPtr cache; }; diff --git a/src/libvirt_private.syms b/src/libvirt_private.syms index b551cb86a..9a334311d 100644 --- a/src/libvirt_private.syms +++ b/src/libvirt_private.syms @@ -67,6 +67,8 @@ virCapabilitiesSetNetPrefix; # conf/cpu_conf.h +virCPUCacheModeTypeFromString; +virCPUCacheModeTypeToString; virCPUDefAddFeature; virCPUDefCopy; virCPUDefCopyModel; diff --git a/tests/genericxml2xmlindata/generic-cpu-cache-disable.xml b/tests/genericxml2xmlindata/generic-cpu-cache-disable.xml new file mode 100644 index 000000000..25f65cc6e --- /dev/null +++ b/tests/genericxml2xmlindata/generic-cpu-cache-disable.xml @@ -0,0 +1,20 @@ + + foo + c7a5fdbd-edaf-9455-926a-d65c16db1809 + 219136 + 219136 + 1 + + hvm + + + + + + + destroy + restart + destroy + + + diff --git a/tests/genericxml2xmlindata/generic-cpu-cache-emulate.xml b/tests/genericxml2xmlindata/generic-cpu-cache-emulate.xml new file mode 100644 index 000000000..6ea57cbf6 --- /dev/null +++ b/tests/genericxml2xmlindata/generic-cpu-cache-emulate.xml @@ -0,0 +1,20 @@ + + foo + c7a5fdbd-edaf-9455-926a-d65c16db1809 + 219136 + 219136 + 1 + + hvm + + + + + + + destroy + restart + destroy + + + diff --git a/tests/genericxml2xmlindata/generic-cpu-cache-passthrough.xml b/tests/genericxml2xmlindata/generic-cpu-cache-passthrough.xml new file mode 100644 index 000000000..8d4c186c9 --- /dev/null +++ b/tests/genericxml2xmlindata/generic-cpu-cache-passthrough.xml @@ -0,0 +1,20 @@ + + foo + c7a5fdbd-edaf-9455-926a-d65c16db1809 + 219136 + 219136 + 1 + + hvm + + + + + + + destroy + restart + destroy + + + diff --git a/tests/genericxml2xmltest.c b/tests/genericxml2xmltest.c index 488190270..ab1ebce9f 100644 --- a/tests/genericxml2xmltest.c +++ b/tests/genericxml2xmltest.c @@ -100,6 +100,10 @@ mymain(void) DO_TEST("vcpus-individual"); + DO_TEST("cpu-cache-emulate"); + DO_TEST("cpu-cache-passthrough"); + DO_TEST("cpu-cache-disable"); + virObjectUnref(caps); virObjectUnref(xmlopt); -- 2.12.2