From 5c27b6f1e341d9ef41aa55f4a97a4d40d46229a3 Mon Sep 17 00:00:00 2001 From: CentOS Sources Date: May 25 2017 13:29:36 +0000 Subject: import libvirt-2.0.0-10.el7_3.9 --- diff --git a/SOURCES/libvirt-Add-support-for-CPU-cache-specification.patch b/SOURCES/libvirt-Add-support-for-CPU-cache-specification.patch new file mode 100644 index 0000000..74a11e8 --- /dev/null +++ b/SOURCES/libvirt-Add-support-for-CPU-cache-specification.patch @@ -0,0 +1,388 @@ +From ea48ec29c4f2d53b7aee1db79e63e01a4272c666 Mon Sep 17 00:00:00 2001 +Message-Id: +From: Jiri Denemark +Date: Mon, 24 Apr 2017 15:40:07 +0200 +Subject: [PATCH] Add support for CPU cache specification + +This patch introduces + + + + + +sub element of /domain/cpu. Currently only a single element is +allowed. + +Signed-off-by: Jiri Denemark +(cherry picked from commit a646a6016a7c62688988f7cfaa22e1340c2ce761) + +https://bugzilla.redhat.com/show_bug.cgi?id=1447612 + +Conflicts: + docs/formatdomain.html.in -- indentation changes not backported + docs/schemas/cputypes.rng -- CPU types were not separated from + domaincommon.rng + src/conf/cpu_conf.c -- virCPUDefCopyWithoutModel was not + separated from virCPUDefCopy + +Signed-off-by: Jiri Denemark +--- + docs/formatdomain.html.in | 35 +++++++++++++ + docs/schemas/domaincommon.rng | 24 +++++++++ + src/conf/cpu_conf.c | 58 ++++++++++++++++++++++ + src/conf/cpu_conf.h | 19 +++++++ + src/libvirt_private.syms | 2 + + .../generic-cpu-cache-disable.xml | 20 ++++++++ + .../generic-cpu-cache-emulate.xml | 20 ++++++++ + .../generic-cpu-cache-passthrough.xml | 20 ++++++++ + tests/genericxml2xmltest.c | 4 ++ + 9 files changed, 202 insertions(+) + create mode 100644 tests/genericxml2xmlindata/generic-cpu-cache-disable.xml + create mode 100644 tests/genericxml2xmlindata/generic-cpu-cache-emulate.xml + create mode 100644 tests/genericxml2xmlindata/generic-cpu-cache-passthrough.xml + +diff --git a/docs/formatdomain.html.in b/docs/formatdomain.html.in +index e9b7bad9a..cbaf078ff 100644 +--- a/docs/formatdomain.html.in ++++ b/docs/formatdomain.html.in +@@ -1175,6 +1175,7 @@ + <model fallback='allow'>core2duo</model> + <vendor>Intel</vendor> + <topology sockets='1' cores='2' threads='1'/> ++ <cache level='3' mode='emulate'/> + <feature policy='disable' name='lahf_lm'/> + </cpu> + ... +@@ -1188,6 +1189,7 @@ + +
+   <cpu mode='host-passthrough'>
++    <cache mode='passthrough'/>
+     <feature policy='disable' name='lahf_lm'/>
+   ...
+ +@@ -1365,6 +1367,39 @@ + Since 0.8.5 the policy + attribute can be omitted and will default to require. + ++ ++
cache
++
Since 3.3.0 the cache ++ element describes the virtual CPU cache. If the element is missing, ++ the hypervisor will use a sensible default. ++ ++
++
level
++
This optional attribute specifies which cache level is described ++ by the element. Missing attribute means the element describes all ++ CPU cache levels at once. Mixing cache elements with ++ the level attribute set and those without the ++ attribute is forbidden.
++ ++
mode
++
++ The following values are supported: ++
++
emulate
++
The hypervisor will provide a fake CPU cache data.
++ ++
passthrough
++
The real CPU cache data reported by the host CPU will be ++ passed through to the virtual CPU.
++ ++
disable
++
The virtual CPU will report no CPU cache of the specified ++ level (or no cache at all if the level attribute ++ is missing).
++
++
++
++
+ + +

+diff --git a/docs/schemas/domaincommon.rng b/docs/schemas/domaincommon.rng +index 6acc107c3..bd2823ff7 100644 +--- a/docs/schemas/domaincommon.rng ++++ b/docs/schemas/domaincommon.rng +@@ -4388,6 +4388,9 @@ + + + ++ ++ ++ + + + +@@ -4511,6 +4514,27 @@ + + + ++ ++ ++ ++ ++ ++ 1 ++ 2 ++ 3 ++ ++ ++ ++ ++ ++ emulate ++ passthrough ++ disable ++ ++ ++ ++ ++ +