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From 95f014690bab53caa5eac8859c03917ba96466dc Mon Sep 17 00:00:00 2001
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Message-Id: <95f014690bab53caa5eac8859c03917ba96466dc@dist-git>
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From: Bing Niu <bing.niu@intel.com>
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Date: Mon, 15 Apr 2019 17:32:48 +0200
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Subject: [PATCH] util: Add MBA check to virResctrlInfoGetCache
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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If we have some membw_info data, then we need to calculate the number
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of MBA controllers on the system. The value cannot be obtained from a
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direct query to the RDT kernel module, but it is the same as the last
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level cache value which is calculated by traversing the cache hierarchy
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of host(/sys/bus/cpu/devices/cpuX/cache/).
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Signed-off-by: Bing Niu <bing.niu@intel.com>
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Reviewed-by: John Ferlan <jferlan@redhat.com>
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(cherry picked from commit 5aae2b3968c3e474e288cff68547f7aedac86921)
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Resolves: https://bugzilla.redhat.com/show_bug.cgi?id=1468650
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Signed-off-by: Pavel Hrdina <phrdina@redhat.com>
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Message-Id: <bbacef44dd5c6d0a2d3760f4414e6e2701bd5175.1555342313.git.phrdina@redhat.com>
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Reviewed-by: Ján Tomko <jtomko@redhat.com>
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---
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src/util/virresctrl.c | 14 ++++++++++++++
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1 file changed, 14 insertions(+)
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diff --git a/src/util/virresctrl.c b/src/util/virresctrl.c
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index b12a05cb0f..f454868f1e 100644
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--- a/src/util/virresctrl.c
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+++ b/src/util/virresctrl.c
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@@ -608,6 +608,20 @@ virResctrlInfoGetCache(virResctrlInfoPtr resctrl,
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if (virResctrlInfoIsEmpty(resctrl))
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return 0;
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+ /* Let's take the opportunity to update the number of last level
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+ * cache. This number of memory bandwidth controller is same with
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+ * last level cache */
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+ if (resctrl->membw_info) {
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+ virResctrlInfoMemBWPtr membw_info = resctrl->membw_info;
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+
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+ if (level > membw_info->last_level_cache) {
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+ membw_info->last_level_cache = level;
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+ membw_info->max_id = 0;
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+ } else if (membw_info->last_level_cache == level) {
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+ membw_info->max_id++;
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+ }
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+ }
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+
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if (level >= resctrl->nlevels)
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return 0;
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--
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2.21.0
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