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c480ed |
From 4e22f6ec928e62811db06cd717fc286dd1dfba8e Mon Sep 17 00:00:00 2001
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Message-Id: <4e22f6ec928e62811db06cd717fc286dd1dfba8e@dist-git>
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c480ed |
From: Jiri Denemark <jdenemar@redhat.com>
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Date: Fri, 21 Jun 2019 09:24:49 +0200
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Subject: [PATCH] cputest: Add data for Intel(R) Xeon(R) CPU E5-2630 v4
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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c480ed |
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c480ed |
Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
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c480ed |
Reviewed-by: Ján Tomko <jtomko@redhat.com>
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(cherry picked from commit 8d068f360183ecd55e3213dbe9ba12f7d6470751)
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https://bugzilla.redhat.com/show_bug.cgi?id=1686895
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c480ed |
Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
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Message-Id: <5bc8830efc48a09ace38df33a83152ae0cf3a5fe.1561068591.git.jdenemar@redhat.com>
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Reviewed-by: Ján Tomko <jtomko@redhat.com>
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---
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tests/cputest.c | 1 +
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.../x86_64-cpuid-Xeon-E5-2630-v4-disabled.xml | 7 +
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.../x86_64-cpuid-Xeon-E5-2630-v4-enabled.xml | 8 +
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.../x86_64-cpuid-Xeon-E5-2630-v4-guest.xml | 31 +
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.../x86_64-cpuid-Xeon-E5-2630-v4-host.xml | 35 +
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.../x86_64-cpuid-Xeon-E5-2630-v4-json.xml | 11 +
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.../x86_64-cpuid-Xeon-E5-2630-v4.json | 596 ++++++++++++++++++
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.../x86_64-cpuid-Xeon-E5-2630-v4.xml | 43 ++
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8 files changed, 732 insertions(+)
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create mode 100644 tests/cputestdata/x86_64-cpuid-Xeon-E5-2630-v4-disabled.xml
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create mode 100644 tests/cputestdata/x86_64-cpuid-Xeon-E5-2630-v4-enabled.xml
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create mode 100644 tests/cputestdata/x86_64-cpuid-Xeon-E5-2630-v4-guest.xml
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create mode 100644 tests/cputestdata/x86_64-cpuid-Xeon-E5-2630-v4-host.xml
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create mode 100644 tests/cputestdata/x86_64-cpuid-Xeon-E5-2630-v4-json.xml
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create mode 100644 tests/cputestdata/x86_64-cpuid-Xeon-E5-2630-v4.json
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create mode 100644 tests/cputestdata/x86_64-cpuid-Xeon-E5-2630-v4.xml
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diff --git a/tests/cputest.c b/tests/cputest.c
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index fbb2a86af8..f43144edc9 100644
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--- a/tests/cputest.c
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+++ b/tests/cputest.c
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@@ -1195,6 +1195,7 @@ mymain(void)
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DO_TEST_CPUID(VIR_ARCH_X86_64, "Xeon-E5-2609-v3", JSON_MODELS);
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DO_TEST_CPUID(VIR_ARCH_X86_64, "Xeon-E5-2623-v4", JSON_MODELS);
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DO_TEST_CPUID(VIR_ARCH_X86_64, "Xeon-E5-2630-v3", JSON_HOST);
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+ DO_TEST_CPUID(VIR_ARCH_X86_64, "Xeon-E5-2630-v4", JSON_MODELS);
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DO_TEST_CPUID(VIR_ARCH_X86_64, "Xeon-E5-2650-v3", JSON_HOST);
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DO_TEST_CPUID(VIR_ARCH_X86_64, "Xeon-E5-2650-v4", JSON_MODELS);
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DO_TEST_CPUID(VIR_ARCH_X86_64, "Xeon-E7-4820", JSON_HOST);
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diff --git a/tests/cputestdata/x86_64-cpuid-Xeon-E5-2630-v4-disabled.xml b/tests/cputestdata/x86_64-cpuid-Xeon-E5-2630-v4-disabled.xml
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new file mode 100644
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index 0000000000..3ffb246167
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--- /dev/null
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+++ b/tests/cputestdata/x86_64-cpuid-Xeon-E5-2630-v4-disabled.xml
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@@ -0,0 +1,7 @@
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+
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+<cpudata arch='x86'>
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+ <cpuid eax_in='0x00000001' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x0804c1fc' edx='0xb0600000'/>
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+ <cpuid eax_in='0x00000007' ecx_in='0x00' eax='0x00000000' ebx='0x02001000' ecx='0x00000000' edx='0x00000000'/>
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+ <cpuid eax_in='0x0000000f' ecx_in='0x01' eax='0x00000000' ebx='0x00000000' ecx='0x00000000' edx='0x00000006'/>
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+ <cpuid eax_in='0x80000007' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x00000000' edx='0x00000100'/>
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+</cpudata>
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diff --git a/tests/cputestdata/x86_64-cpuid-Xeon-E5-2630-v4-enabled.xml b/tests/cputestdata/x86_64-cpuid-Xeon-E5-2630-v4-enabled.xml
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new file mode 100644
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index 0000000000..f2d4f2826d
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--- /dev/null
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+++ b/tests/cputestdata/x86_64-cpuid-Xeon-E5-2630-v4-enabled.xml
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@@ -0,0 +1,8 @@
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+
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+<cpudata arch='x86'>
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+ <cpuid eax_in='0x00000001' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0xf7fa3203' edx='0x0f8bfbff'/>
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+ <cpuid eax_in='0x00000006' ecx_in='0x00' eax='0x00000004' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/>
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+ <cpuid eax_in='0x00000007' ecx_in='0x00' eax='0x00000000' ebx='0x001c0fbb' ecx='0x00000000' edx='0x00000000'/>
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+ <cpuid eax_in='0x0000000d' ecx_in='0x01' eax='0x00000001' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/>
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+ <cpuid eax_in='0x80000001' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x00000121' edx='0x2c100800'/>
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+</cpudata>
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diff --git a/tests/cputestdata/x86_64-cpuid-Xeon-E5-2630-v4-guest.xml b/tests/cputestdata/x86_64-cpuid-Xeon-E5-2630-v4-guest.xml
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new file mode 100644
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index 0000000000..cd7e25b52a
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--- /dev/null
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+++ b/tests/cputestdata/x86_64-cpuid-Xeon-E5-2630-v4-guest.xml
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@@ -0,0 +1,31 @@
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+<cpu mode='custom' match='exact'>
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+ <model fallback='forbid'>Skylake-Client</model>
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+ <vendor>Intel</vendor>
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+ <feature policy='require' name='ds'/>
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+ <feature policy='require' name='acpi'/>
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+ <feature policy='require' name='ss'/>
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+ <feature policy='require' name='ht'/>
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+ <feature policy='require' name='tm'/>
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+ <feature policy='require' name='pbe'/>
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+ <feature policy='require' name='dtes64'/>
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+ <feature policy='require' name='monitor'/>
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+ <feature policy='require' name='ds_cpl'/>
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+ <feature policy='require' name='vmx'/>
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+ <feature policy='require' name='smx'/>
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+ <feature policy='require' name='est'/>
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+ <feature policy='require' name='tm2'/>
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+ <feature policy='require' name='xtpr'/>
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+ <feature policy='require' name='pdcm'/>
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+ <feature policy='require' name='dca'/>
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+ <feature policy='require' name='osxsave'/>
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+ <feature policy='require' name='tsc_adjust'/>
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+ <feature policy='require' name='cmt'/>
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+ <feature policy='require' name='intel-pt'/>
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+ <feature policy='require' name='mbm_total'/>
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+ <feature policy='require' name='mbm_local'/>
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+ <feature policy='require' name='pdpe1gb'/>
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+ <feature policy='require' name='invtsc'/>
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+ <feature policy='disable' name='mpx'/>
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+ <feature policy='disable' name='xsavec'/>
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+ <feature policy='disable' name='xgetbv1'/>
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+</cpu>
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diff --git a/tests/cputestdata/x86_64-cpuid-Xeon-E5-2630-v4-host.xml b/tests/cputestdata/x86_64-cpuid-Xeon-E5-2630-v4-host.xml
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new file mode 100644
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index 0000000000..5dd8d749de
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--- /dev/null
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+++ b/tests/cputestdata/x86_64-cpuid-Xeon-E5-2630-v4-host.xml
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@@ -0,0 +1,35 @@
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+<cpu>
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+ <arch>x86_64</arch>
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+ <model>Broadwell</model>
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+ <vendor>Intel</vendor>
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+ <feature name='vme'/>
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+ <feature name='ds'/>
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+ <feature name='acpi'/>
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+ <feature name='ss'/>
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+ <feature name='ht'/>
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+ <feature name='tm'/>
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+ <feature name='pbe'/>
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+ <feature name='dtes64'/>
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+ <feature name='monitor'/>
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+ <feature name='ds_cpl'/>
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+ <feature name='vmx'/>
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+ <feature name='smx'/>
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+ <feature name='est'/>
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+ <feature name='tm2'/>
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+ <feature name='xtpr'/>
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+ <feature name='pdcm'/>
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+ <feature name='dca'/>
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+ <feature name='osxsave'/>
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+ <feature name='f16c'/>
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+ <feature name='rdrand'/>
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+ <feature name='arat'/>
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+ <feature name='tsc_adjust'/>
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+ <feature name='cmt'/>
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+ <feature name='intel-pt'/>
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+ <feature name='xsaveopt'/>
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+ <feature name='mbm_total'/>
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+ <feature name='mbm_local'/>
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+ <feature name='pdpe1gb'/>
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+ <feature name='abm'/>
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+ <feature name='invtsc'/>
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+</cpu>
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diff --git a/tests/cputestdata/x86_64-cpuid-Xeon-E5-2630-v4-json.xml b/tests/cputestdata/x86_64-cpuid-Xeon-E5-2630-v4-json.xml
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new file mode 100644
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index 0000000000..5dfce947b2
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--- /dev/null
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+++ b/tests/cputestdata/x86_64-cpuid-Xeon-E5-2630-v4-json.xml
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@@ -0,0 +1,11 @@
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+<cpu mode='custom' match='exact'>
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+ <model fallback='forbid'>Skylake-Client</model>
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+ <vendor>Intel</vendor>
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+ <feature policy='require' name='ss'/>
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+ <feature policy='require' name='hypervisor'/>
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+ <feature policy='require' name='tsc_adjust'/>
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+ <feature policy='require' name='pdpe1gb'/>
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+ <feature policy='disable' name='mpx'/>
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+ <feature policy='disable' name='xsavec'/>
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+ <feature policy='disable' name='xgetbv1'/>
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+</cpu>
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diff --git a/tests/cputestdata/x86_64-cpuid-Xeon-E5-2630-v4.json b/tests/cputestdata/x86_64-cpuid-Xeon-E5-2630-v4.json
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new file mode 100644
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index 0000000000..ee09950fce
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--- /dev/null
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+++ b/tests/cputestdata/x86_64-cpuid-Xeon-E5-2630-v4.json
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@@ -0,0 +1,596 @@
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+{
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+ "return": {
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+ "model": {
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+ "name": "base",
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+ "props": {
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+ "phys-bits": 0,
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+ "core-id": -1,
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+ "xlevel": 2147483656,
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+ "cmov": true,
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+ "ia64": false,
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+ "aes": true,
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+ "mmx": true,
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+ "arat": true,
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+ "rdpid": false,
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+ "pause-filter": false,
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+ "xsavec": false,
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+ "osxsave": false,
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+ "tsc-frequency": 0,
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+ "xd": true,
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+ "hv-vendor-id": "",
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+ "kvm-asyncpf": true,
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+ "kvm_asyncpf": true,
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+ "perfctr_core": false,
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+ "perfctr-core": false,
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+ "mpx": false,
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+ "decodeassists": false,
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+ "avx512cd": false,
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+ "pbe": false,
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+ "sse4_1": true,
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+ "sse4.1": true,
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+ "sse4-1": true,
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+ "family": 6,
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+ "vmware-cpuid-freq": true,
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+ "avx512f": false,
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+ "xcrypt": false,
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+ "msr": true,
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+ "mce": true,
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+ "mca": true,
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+ "thread-id": -1,
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+ "min-level": 13,
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+ "xgetbv1": false,
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+ "cid": false,
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+ "hv-relaxed": false,
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+ "fxsr": true,
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+ "ds": false,
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+ "hv-crash": false,
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+ "xsaveopt": true,
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+ "xtpr": false,
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+ "avx512-vpopcntdq": false,
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+ "phe": false,
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+ "avx512vl": false,
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+ "extapic": false,
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+ "3dnowprefetch": true,
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+ "cr8legacy": false,
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+ "stibp": false,
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+ "cpuid-0xb": true,
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+ "xcrypt-en": false,
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+ "kvm_pv_eoi": true,
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+ "apic-id": 4294967295,
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+ "pn": false,
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+ "dca": false,
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c480ed |
+ "vendor": "GenuineIntel",
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c480ed |
+ "pku": false,
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c480ed |
+ "smx": false,
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c480ed |
+ "cmp-legacy": false,
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c480ed |
+ "cmp_legacy": false,
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c480ed |
+ "avx512-4fmaps": false,
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+ "vmcb-clean": false,
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c480ed |
+ "vmcb_clean": false,
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c480ed |
+ "3dnowext": false,
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c480ed |
+ "hle": true,
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c480ed |
+ "npt": false,
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+ "memory": "/machine/unattached/system[0]",
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+ "clwb": false,
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+ "lbrv": false,
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+ "adx": true,
|
|
|
c480ed |
+ "ss": true,
|
|
|
c480ed |
+ "pni": true,
|
|
|
c480ed |
+ "svm_lock": false,
|
|
|
c480ed |
+ "svm-lock": false,
|
|
|
c480ed |
+ "smep": true,
|
|
|
c480ed |
+ "pfthreshold": false,
|
|
|
c480ed |
+ "smap": true,
|
|
|
c480ed |
+ "x2apic": true,
|
|
|
c480ed |
+ "avx512vbmi": false,
|
|
|
c480ed |
+ "i64": true,
|
|
|
c480ed |
+ "flushbyasid": false,
|
|
|
c480ed |
+ "f16c": true,
|
|
|
c480ed |
+ "ace2-en": false,
|
|
|
c480ed |
+ "pat": true,
|
|
|
c480ed |
+ "pae": true,
|
|
|
c480ed |
+ "sse": true,
|
|
|
c480ed |
+ "phe-en": false,
|
|
|
c480ed |
+ "kvm-nopiodelay": true,
|
|
|
c480ed |
+ "kvm_nopiodelay": true,
|
|
|
c480ed |
+ "tm": false,
|
|
|
c480ed |
+ "kvmclock-stable-bit": true,
|
|
|
c480ed |
+ "hypervisor": true,
|
|
|
c480ed |
+ "socket-id": -1,
|
|
|
c480ed |
+ "pcommit": false,
|
|
|
c480ed |
+ "syscall": true,
|
|
|
c480ed |
+ "level": 13,
|
|
|
c480ed |
+ "avx512dq": false,
|
|
|
c480ed |
+ "svm": false,
|
|
|
c480ed |
+ "full-cpuid-auto-level": true,
|
|
|
c480ed |
+ "invtsc": false,
|
|
|
c480ed |
+ "sse3": true,
|
|
|
c480ed |
+ "sse2": true,
|
|
|
c480ed |
+ "est": false,
|
|
|
c480ed |
+ "avx512ifma": false,
|
|
|
c480ed |
+ "tm2": false,
|
|
|
c480ed |
+ "kvm-pv-eoi": true,
|
|
|
c480ed |
+ "cx8": true,
|
|
|
c480ed |
+ "kvm-mmu": false,
|
|
|
c480ed |
+ "kvm_mmu": false,
|
|
|
c480ed |
+ "sse4_2": true,
|
|
|
c480ed |
+ "sse4.2": true,
|
|
|
c480ed |
+ "sse4-2": true,
|
|
|
c480ed |
+ "pge": true,
|
|
|
c480ed |
+ "fill-mtrr-mask": true,
|
|
|
c480ed |
+ "pdcm": false,
|
|
|
c480ed |
+ "nodeid_msr": false,
|
|
|
c480ed |
+ "model": 79,
|
|
|
c480ed |
+ "movbe": true,
|
|
|
c480ed |
+ "nrip-save": false,
|
|
|
c480ed |
+ "nrip_save": false,
|
|
|
c480ed |
+ "sse4a": false,
|
|
|
c480ed |
+ "ssse3": true,
|
|
|
c480ed |
+ "kvm_pv_unhalt": true,
|
|
|
c480ed |
+ "invpcid": true,
|
|
|
c480ed |
+ "pdpe1gb": true,
|
|
|
c480ed |
+ "tsc-deadline": true,
|
|
|
c480ed |
+ "fma": true,
|
|
|
c480ed |
+ "cx16": true,
|
|
|
c480ed |
+ "de": true,
|
|
|
c480ed |
+ "enforce": false,
|
|
|
c480ed |
+ "stepping": 1,
|
|
|
c480ed |
+ "xsave": true,
|
|
|
c480ed |
+ "clflush": true,
|
|
|
c480ed |
+ "arch-facilities": false,
|
|
|
c480ed |
+ "skinit": false,
|
|
|
c480ed |
+ "tce": false,
|
|
|
c480ed |
+ "tsc": true,
|
|
|
c480ed |
+ "fpu": true,
|
|
|
c480ed |
+ "ds-cpl": false,
|
|
|
c480ed |
+ "ds_cpl": false,
|
|
|
c480ed |
+ "ibs": false,
|
|
|
c480ed |
+ "host-phys-bits": true,
|
|
|
c480ed |
+ "fma4": false,
|
|
|
c480ed |
+ "la57": false,
|
|
|
c480ed |
+ "osvw": false,
|
|
|
c480ed |
+ "check": true,
|
|
|
c480ed |
+ "hv-spinlocks": -1,
|
|
|
c480ed |
+ "pmm": false,
|
|
|
c480ed |
+ "apic": true,
|
|
|
c480ed |
+ "pmu": false,
|
|
|
c480ed |
+ "spec-ctrl": false,
|
|
|
c480ed |
+ "min-xlevel2": 0,
|
|
|
c480ed |
+ "tsc-adjust": true,
|
|
|
c480ed |
+ "tsc_adjust": true,
|
|
|
c480ed |
+ "kvm-steal-time": true,
|
|
|
c480ed |
+ "kvm_steal_time": true,
|
|
|
c480ed |
+ "kvmclock": true,
|
|
|
c480ed |
+ "l3-cache": true,
|
|
|
c480ed |
+ "lwp": false,
|
|
|
c480ed |
+ "xop": false,
|
|
|
c480ed |
+ "ibpb": false,
|
|
|
c480ed |
+ "avx": true,
|
|
|
c480ed |
+ "ospke": false,
|
|
|
c480ed |
+ "ace2": false,
|
|
|
c480ed |
+ "acpi": false,
|
|
|
c480ed |
+ "avx512bw": false,
|
|
|
c480ed |
+ "hv-vapic": false,
|
|
|
c480ed |
+ "fsgsbase": true,
|
|
|
c480ed |
+ "ht": false,
|
|
|
c480ed |
+ "nx": true,
|
|
|
c480ed |
+ "pclmulqdq": true,
|
|
|
c480ed |
+ "mmxext": false,
|
|
|
c480ed |
+ "popcnt": true,
|
|
|
c480ed |
+ "xsaves": false,
|
|
|
c480ed |
+ "lm": true,
|
|
|
c480ed |
+ "umip": false,
|
|
|
c480ed |
+ "avx2": true,
|
|
|
c480ed |
+ "pse": true,
|
|
|
c480ed |
+ "sep": true,
|
|
|
c480ed |
+ "pclmuldq": true,
|
|
|
c480ed |
+ "nodeid-msr": false,
|
|
|
c480ed |
+ "kvm": true,
|
|
|
c480ed |
+ "misalignsse": false,
|
|
|
c480ed |
+ "min-xlevel": 2147483656,
|
|
|
c480ed |
+ "bmi2": true,
|
|
|
c480ed |
+ "bmi1": true,
|
|
|
c480ed |
+ "kvm-pv-unhalt": true,
|
|
|
c480ed |
+ "realized": false,
|
|
|
c480ed |
+ "tsc-scale": false,
|
|
|
c480ed |
+ "tsc_scale": false,
|
|
|
c480ed |
+ "topoext": false,
|
|
|
c480ed |
+ "xlevel2": 0,
|
|
|
c480ed |
+ "clflushopt": false,
|
|
|
c480ed |
+ "kvm-no-smi-migration": false,
|
|
|
c480ed |
+ "monitor": false,
|
|
|
c480ed |
+ "avx512er": false,
|
|
|
c480ed |
+ "pmm-en": false,
|
|
|
c480ed |
+ "pcid": true,
|
|
|
c480ed |
+ "3dnow": false,
|
|
|
c480ed |
+ "erms": true,
|
|
|
c480ed |
+ "lahf-lm": true,
|
|
|
c480ed |
+ "lahf_lm": true,
|
|
|
c480ed |
+ "xstore": false,
|
|
|
c480ed |
+ "fxsr-opt": false,
|
|
|
c480ed |
+ "fxsr_opt": false,
|
|
|
c480ed |
+ "rtm": true,
|
|
|
c480ed |
+ "lmce": true,
|
|
|
c480ed |
+ "hv-time": false,
|
|
|
c480ed |
+ "perfctr-nb": false,
|
|
|
c480ed |
+ "perfctr_nb": false,
|
|
|
c480ed |
+ "ffxsr": false,
|
|
|
c480ed |
+ "rdrand": true,
|
|
|
c480ed |
+ "rdseed": true,
|
|
|
c480ed |
+ "avx512-4vnniw": false,
|
|
|
c480ed |
+ "vme": true,
|
|
|
c480ed |
+ "vmx": false,
|
|
|
c480ed |
+ "dtes64": false,
|
|
|
c480ed |
+ "mtrr": true,
|
|
|
c480ed |
+ "rdtscp": true,
|
|
|
c480ed |
+ "pse36": true,
|
|
|
c480ed |
+ "tbm": false,
|
|
|
c480ed |
+ "wdt": false,
|
|
|
c480ed |
+ "pause_filter": false,
|
|
|
c480ed |
+ "model-id": "Intel(R) Xeon(R) CPU E5-2630 v4 @ 2.20GHz",
|
|
|
c480ed |
+ "sha-ni": false,
|
|
|
c480ed |
+ "abm": true,
|
|
|
c480ed |
+ "avx512pf": false,
|
|
|
c480ed |
+ "xstore-en": false
|
|
|
c480ed |
+ }
|
|
|
c480ed |
+ }
|
|
|
c480ed |
+ },
|
|
|
c480ed |
+ "id": "model-expansion"
|
|
|
c480ed |
+}
|
|
|
c480ed |
+
|
|
|
c480ed |
+
|
|
|
c480ed |
+{
|
|
|
c480ed |
+ "return": [
|
|
|
c480ed |
+ {
|
|
|
c480ed |
+ "name": "max",
|
|
|
c480ed |
+ "typename": "max-x86_64-cpu",
|
|
|
c480ed |
+ "unavailable-features": [],
|
|
|
c480ed |
+ "static": false,
|
|
|
c480ed |
+ "migration-safe": false
|
|
|
c480ed |
+ },
|
|
|
c480ed |
+ {
|
|
|
c480ed |
+ "name": "host",
|
|
|
c480ed |
+ "typename": "host-x86_64-cpu",
|
|
|
c480ed |
+ "unavailable-features": [],
|
|
|
c480ed |
+ "static": false,
|
|
|
c480ed |
+ "migration-safe": false
|
|
|
c480ed |
+ },
|
|
|
c480ed |
+ {
|
|
|
c480ed |
+ "name": "base",
|
|
|
c480ed |
+ "typename": "base-x86_64-cpu",
|
|
|
c480ed |
+ "unavailable-features": [],
|
|
|
c480ed |
+ "static": true,
|
|
|
c480ed |
+ "migration-safe": true
|
|
|
c480ed |
+ },
|
|
|
c480ed |
+ {
|
|
|
c480ed |
+ "name": "qemu64",
|
|
|
c480ed |
+ "typename": "qemu64-x86_64-cpu",
|
|
|
c480ed |
+ "unavailable-features": [],
|
|
|
c480ed |
+ "static": false,
|
|
|
c480ed |
+ "migration-safe": true
|
|
|
c480ed |
+ },
|
|
|
c480ed |
+ {
|
|
|
c480ed |
+ "name": "qemu32",
|
|
|
c480ed |
+ "typename": "qemu32-x86_64-cpu",
|
|
|
c480ed |
+ "unavailable-features": [],
|
|
|
c480ed |
+ "static": false,
|
|
|
c480ed |
+ "migration-safe": true
|
|
|
c480ed |
+ },
|
|
|
c480ed |
+ {
|
|
|
c480ed |
+ "name": "phenom",
|
|
|
c480ed |
+ "typename": "phenom-x86_64-cpu",
|
|
|
c480ed |
+ "unavailable-features": [
|
|
|
c480ed |
+ "mmxext",
|
|
|
c480ed |
+ "fxsr-opt",
|
|
|
c480ed |
+ "3dnowext",
|
|
|
c480ed |
+ "3dnow",
|
|
|
c480ed |
+ "sse4a",
|
|
|
c480ed |
+ "npt"
|
|
|
c480ed |
+ ],
|
|
|
c480ed |
+ "static": false,
|
|
|
c480ed |
+ "migration-safe": true
|
|
|
c480ed |
+ },
|
|
|
c480ed |
+ {
|
|
|
c480ed |
+ "name": "pentium3",
|
|
|
c480ed |
+ "typename": "pentium3-x86_64-cpu",
|
|
|
c480ed |
+ "unavailable-features": [],
|
|
|
c480ed |
+ "static": false,
|
|
|
c480ed |
+ "migration-safe": true
|
|
|
c480ed |
+ },
|
|
|
c480ed |
+ {
|
|
|
c480ed |
+ "name": "pentium2",
|
|
|
c480ed |
+ "typename": "pentium2-x86_64-cpu",
|
|
|
c480ed |
+ "unavailable-features": [],
|
|
|
c480ed |
+ "static": false,
|
|
|
c480ed |
+ "migration-safe": true
|
|
|
c480ed |
+ },
|
|
|
c480ed |
+ {
|
|
|
c480ed |
+ "name": "pentium",
|
|
|
c480ed |
+ "typename": "pentium-x86_64-cpu",
|
|
|
c480ed |
+ "unavailable-features": [],
|
|
|
c480ed |
+ "static": false,
|
|
|
c480ed |
+ "migration-safe": true
|
|
|
c480ed |
+ },
|
|
|
c480ed |
+ {
|
|
|
c480ed |
+ "name": "n270",
|
|
|
c480ed |
+ "typename": "n270-x86_64-cpu",
|
|
|
c480ed |
+ "unavailable-features": [],
|
|
|
c480ed |
+ "static": false,
|
|
|
c480ed |
+ "migration-safe": true
|
|
|
c480ed |
+ },
|
|
|
c480ed |
+ {
|
|
|
c480ed |
+ "name": "kvm64",
|
|
|
c480ed |
+ "typename": "kvm64-x86_64-cpu",
|
|
|
c480ed |
+ "unavailable-features": [],
|
|
|
c480ed |
+ "static": false,
|
|
|
c480ed |
+ "migration-safe": true
|
|
|
c480ed |
+ },
|
|
|
c480ed |
+ {
|
|
|
c480ed |
+ "name": "kvm32",
|
|
|
c480ed |
+ "typename": "kvm32-x86_64-cpu",
|
|
|
c480ed |
+ "unavailable-features": [],
|
|
|
c480ed |
+ "static": false,
|
|
|
c480ed |
+ "migration-safe": true
|
|
|
c480ed |
+ },
|
|
|
c480ed |
+ {
|
|
|
c480ed |
+ "name": "cpu64-rhel6",
|
|
|
c480ed |
+ "typename": "cpu64-rhel6-x86_64-cpu",
|
|
|
c480ed |
+ "unavailable-features": [
|
|
|
c480ed |
+ "sse4a"
|
|
|
c480ed |
+ ],
|
|
|
c480ed |
+ "static": false,
|
|
|
c480ed |
+ "migration-safe": true
|
|
|
c480ed |
+ },
|
|
|
c480ed |
+ {
|
|
|
c480ed |
+ "name": "coreduo",
|
|
|
c480ed |
+ "typename": "coreduo-x86_64-cpu",
|
|
|
c480ed |
+ "unavailable-features": [],
|
|
|
c480ed |
+ "static": false,
|
|
|
c480ed |
+ "migration-safe": true
|
|
|
c480ed |
+ },
|
|
|
c480ed |
+ {
|
|
|
c480ed |
+ "name": "core2duo",
|
|
|
c480ed |
+ "typename": "core2duo-x86_64-cpu",
|
|
|
c480ed |
+ "unavailable-features": [],
|
|
|
c480ed |
+ "static": false,
|
|
|
c480ed |
+ "migration-safe": true
|
|
|
c480ed |
+ },
|
|
|
c480ed |
+ {
|
|
|
c480ed |
+ "name": "athlon",
|
|
|
c480ed |
+ "typename": "athlon-x86_64-cpu",
|
|
|
c480ed |
+ "unavailable-features": [
|
|
|
c480ed |
+ "mmxext",
|
|
|
c480ed |
+ "3dnowext",
|
|
|
c480ed |
+ "3dnow"
|
|
|
c480ed |
+ ],
|
|
|
c480ed |
+ "static": false,
|
|
|
c480ed |
+ "migration-safe": true
|
|
|
c480ed |
+ },
|
|
|
c480ed |
+ {
|
|
|
c480ed |
+ "name": "Westmere",
|
|
|
c480ed |
+ "typename": "Westmere-x86_64-cpu",
|
|
|
c480ed |
+ "unavailable-features": [],
|
|
|
c480ed |
+ "static": false,
|
|
|
c480ed |
+ "migration-safe": true
|
|
|
c480ed |
+ },
|
|
|
c480ed |
+ {
|
|
|
c480ed |
+ "name": "Westmere-IBRS",
|
|
|
c480ed |
+ "typename": "Westmere-IBRS-x86_64-cpu",
|
|
|
c480ed |
+ "unavailable-features": [
|
|
|
c480ed |
+ "spec-ctrl"
|
|
|
c480ed |
+ ],
|
|
|
c480ed |
+ "static": false,
|
|
|
c480ed |
+ "migration-safe": true
|
|
|
c480ed |
+ },
|
|
|
c480ed |
+ {
|
|
|
c480ed |
+ "name": "Skylake-Client",
|
|
|
c480ed |
+ "typename": "Skylake-Client-x86_64-cpu",
|
|
|
c480ed |
+ "unavailable-features": [
|
|
|
c480ed |
+ "mpx",
|
|
|
c480ed |
+ "xsavec",
|
|
|
c480ed |
+ "xgetbv1",
|
|
|
c480ed |
+ "mpx",
|
|
|
c480ed |
+ "mpx"
|
|
|
c480ed |
+ ],
|
|
|
c480ed |
+ "static": false,
|
|
|
c480ed |
+ "migration-safe": true
|
|
|
c480ed |
+ },
|
|
|
c480ed |
+ {
|
|
|
c480ed |
+ "name": "Skylake-Client-IBRS",
|
|
|
c480ed |
+ "typename": "Skylake-Client-IBRS-x86_64-cpu",
|
|
|
c480ed |
+ "unavailable-features": [
|
|
|
c480ed |
+ "mpx",
|
|
|
c480ed |
+ "spec-ctrl",
|
|
|
c480ed |
+ "xsavec",
|
|
|
c480ed |
+ "xgetbv1",
|
|
|
c480ed |
+ "mpx",
|
|
|
c480ed |
+ "mpx"
|
|
|
c480ed |
+ ],
|
|
|
c480ed |
+ "static": false,
|
|
|
c480ed |
+ "migration-safe": true
|
|
|
c480ed |
+ },
|
|
|
c480ed |
+ {
|
|
|
c480ed |
+ "name": "SandyBridge",
|
|
|
c480ed |
+ "typename": "SandyBridge-x86_64-cpu",
|
|
|
c480ed |
+ "unavailable-features": [],
|
|
|
c480ed |
+ "static": false,
|
|
|
c480ed |
+ "migration-safe": true
|
|
|
c480ed |
+ },
|
|
|
c480ed |
+ {
|
|
|
c480ed |
+ "name": "SandyBridge-IBRS",
|
|
|
c480ed |
+ "typename": "SandyBridge-IBRS-x86_64-cpu",
|
|
|
c480ed |
+ "unavailable-features": [
|
|
|
c480ed |
+ "spec-ctrl"
|
|
|
c480ed |
+ ],
|
|
|
c480ed |
+ "static": false,
|
|
|
c480ed |
+ "migration-safe": true
|
|
|
c480ed |
+ },
|
|
|
c480ed |
+ {
|
|
|
c480ed |
+ "name": "Penryn",
|
|
|
c480ed |
+ "typename": "Penryn-x86_64-cpu",
|
|
|
c480ed |
+ "unavailable-features": [],
|
|
|
c480ed |
+ "static": false,
|
|
|
c480ed |
+ "migration-safe": true
|
|
|
c480ed |
+ },
|
|
|
c480ed |
+ {
|
|
|
c480ed |
+ "name": "Opteron_G5",
|
|
|
c480ed |
+ "typename": "Opteron_G5-x86_64-cpu",
|
|
|
c480ed |
+ "unavailable-features": [
|
|
|
c480ed |
+ "sse4a",
|
|
|
c480ed |
+ "misalignsse",
|
|
|
c480ed |
+ "xop",
|
|
|
c480ed |
+ "fma4",
|
|
|
c480ed |
+ "tbm"
|
|
|
c480ed |
+ ],
|
|
|
c480ed |
+ "static": false,
|
|
|
c480ed |
+ "migration-safe": true
|
|
|
c480ed |
+ },
|
|
|
c480ed |
+ {
|
|
|
c480ed |
+ "name": "Opteron_G4",
|
|
|
c480ed |
+ "typename": "Opteron_G4-x86_64-cpu",
|
|
|
c480ed |
+ "unavailable-features": [
|
|
|
c480ed |
+ "sse4a",
|
|
|
c480ed |
+ "misalignsse",
|
|
|
c480ed |
+ "xop",
|
|
|
c480ed |
+ "fma4"
|
|
|
c480ed |
+ ],
|
|
|
c480ed |
+ "static": false,
|
|
|
c480ed |
+ "migration-safe": true
|
|
|
c480ed |
+ },
|
|
|
c480ed |
+ {
|
|
|
c480ed |
+ "name": "Opteron_G3",
|
|
|
c480ed |
+ "typename": "Opteron_G3-x86_64-cpu",
|
|
|
c480ed |
+ "unavailable-features": [
|
|
|
c480ed |
+ "sse4a",
|
|
|
c480ed |
+ "misalignsse"
|
|
|
c480ed |
+ ],
|
|
|
c480ed |
+ "static": false,
|
|
|
c480ed |
+ "migration-safe": true
|
|
|
c480ed |
+ },
|
|
|
c480ed |
+ {
|
|
|
c480ed |
+ "name": "Opteron_G2",
|
|
|
c480ed |
+ "typename": "Opteron_G2-x86_64-cpu",
|
|
|
c480ed |
+ "unavailable-features": [],
|
|
|
c480ed |
+ "static": false,
|
|
|
c480ed |
+ "migration-safe": true
|
|
|
c480ed |
+ },
|
|
|
c480ed |
+ {
|
|
|
c480ed |
+ "name": "Opteron_G1",
|
|
|
c480ed |
+ "typename": "Opteron_G1-x86_64-cpu",
|
|
|
c480ed |
+ "unavailable-features": [],
|
|
|
c480ed |
+ "static": false,
|
|
|
c480ed |
+ "migration-safe": true
|
|
|
c480ed |
+ },
|
|
|
c480ed |
+ {
|
|
|
c480ed |
+ "name": "Nehalem",
|
|
|
c480ed |
+ "typename": "Nehalem-x86_64-cpu",
|
|
|
c480ed |
+ "unavailable-features": [],
|
|
|
c480ed |
+ "static": false,
|
|
|
c480ed |
+ "migration-safe": true
|
|
|
c480ed |
+ },
|
|
|
c480ed |
+ {
|
|
|
c480ed |
+ "name": "Nehalem-IBRS",
|
|
|
c480ed |
+ "typename": "Nehalem-IBRS-x86_64-cpu",
|
|
|
c480ed |
+ "unavailable-features": [
|
|
|
c480ed |
+ "spec-ctrl"
|
|
|
c480ed |
+ ],
|
|
|
c480ed |
+ "static": false,
|
|
|
c480ed |
+ "migration-safe": true
|
|
|
c480ed |
+ },
|
|
|
c480ed |
+ {
|
|
|
c480ed |
+ "name": "IvyBridge",
|
|
|
c480ed |
+ "typename": "IvyBridge-x86_64-cpu",
|
|
|
c480ed |
+ "unavailable-features": [],
|
|
|
c480ed |
+ "static": false,
|
|
|
c480ed |
+ "migration-safe": true
|
|
|
c480ed |
+ },
|
|
|
c480ed |
+ {
|
|
|
c480ed |
+ "name": "IvyBridge-IBRS",
|
|
|
c480ed |
+ "typename": "IvyBridge-IBRS-x86_64-cpu",
|
|
|
c480ed |
+ "unavailable-features": [
|
|
|
c480ed |
+ "spec-ctrl"
|
|
|
c480ed |
+ ],
|
|
|
c480ed |
+ "static": false,
|
|
|
c480ed |
+ "migration-safe": true
|
|
|
c480ed |
+ },
|
|
|
c480ed |
+ {
|
|
|
c480ed |
+ "name": "Haswell",
|
|
|
c480ed |
+ "typename": "Haswell-x86_64-cpu",
|
|
|
c480ed |
+ "unavailable-features": [],
|
|
|
c480ed |
+ "static": false,
|
|
|
c480ed |
+ "migration-safe": true
|
|
|
c480ed |
+ },
|
|
|
c480ed |
+ {
|
|
|
c480ed |
+ "name": "Haswell-noTSX",
|
|
|
c480ed |
+ "typename": "Haswell-noTSX-x86_64-cpu",
|
|
|
c480ed |
+ "unavailable-features": [],
|
|
|
c480ed |
+ "static": false,
|
|
|
c480ed |
+ "migration-safe": true
|
|
|
c480ed |
+ },
|
|
|
c480ed |
+ {
|
|
|
c480ed |
+ "name": "Haswell-noTSX-IBRS",
|
|
|
c480ed |
+ "typename": "Haswell-noTSX-IBRS-x86_64-cpu",
|
|
|
c480ed |
+ "unavailable-features": [
|
|
|
c480ed |
+ "spec-ctrl"
|
|
|
c480ed |
+ ],
|
|
|
c480ed |
+ "static": false,
|
|
|
c480ed |
+ "migration-safe": true
|
|
|
c480ed |
+ },
|
|
|
c480ed |
+ {
|
|
|
c480ed |
+ "name": "Haswell-IBRS",
|
|
|
c480ed |
+ "typename": "Haswell-IBRS-x86_64-cpu",
|
|
|
c480ed |
+ "unavailable-features": [
|
|
|
c480ed |
+ "spec-ctrl"
|
|
|
c480ed |
+ ],
|
|
|
c480ed |
+ "static": false,
|
|
|
c480ed |
+ "migration-safe": true
|
|
|
c480ed |
+ },
|
|
|
c480ed |
+ {
|
|
|
c480ed |
+ "name": "Conroe",
|
|
|
c480ed |
+ "typename": "Conroe-x86_64-cpu",
|
|
|
c480ed |
+ "unavailable-features": [],
|
|
|
c480ed |
+ "static": false,
|
|
|
c480ed |
+ "migration-safe": true
|
|
|
c480ed |
+ },
|
|
|
c480ed |
+ {
|
|
|
c480ed |
+ "name": "Broadwell",
|
|
|
c480ed |
+ "typename": "Broadwell-x86_64-cpu",
|
|
|
c480ed |
+ "unavailable-features": [],
|
|
|
c480ed |
+ "static": false,
|
|
|
c480ed |
+ "migration-safe": true
|
|
|
c480ed |
+ },
|
|
|
c480ed |
+ {
|
|
|
c480ed |
+ "name": "Broadwell-noTSX",
|
|
|
c480ed |
+ "typename": "Broadwell-noTSX-x86_64-cpu",
|
|
|
c480ed |
+ "unavailable-features": [],
|
|
|
c480ed |
+ "static": false,
|
|
|
c480ed |
+ "migration-safe": true
|
|
|
c480ed |
+ },
|
|
|
c480ed |
+ {
|
|
|
c480ed |
+ "name": "Broadwell-noTSX-IBRS",
|
|
|
c480ed |
+ "typename": "Broadwell-noTSX-IBRS-x86_64-cpu",
|
|
|
c480ed |
+ "unavailable-features": [
|
|
|
c480ed |
+ "spec-ctrl"
|
|
|
c480ed |
+ ],
|
|
|
c480ed |
+ "static": false,
|
|
|
c480ed |
+ "migration-safe": true
|
|
|
c480ed |
+ },
|
|
|
c480ed |
+ {
|
|
|
c480ed |
+ "name": "Broadwell-IBRS",
|
|
|
c480ed |
+ "typename": "Broadwell-IBRS-x86_64-cpu",
|
|
|
c480ed |
+ "unavailable-features": [
|
|
|
c480ed |
+ "spec-ctrl"
|
|
|
c480ed |
+ ],
|
|
|
c480ed |
+ "static": false,
|
|
|
c480ed |
+ "migration-safe": true
|
|
|
c480ed |
+ },
|
|
|
c480ed |
+ {
|
|
|
c480ed |
+ "name": "486",
|
|
|
c480ed |
+ "typename": "486-x86_64-cpu",
|
|
|
c480ed |
+ "unavailable-features": [],
|
|
|
c480ed |
+ "static": false,
|
|
|
c480ed |
+ "migration-safe": true
|
|
|
c480ed |
+ }
|
|
|
c480ed |
+ ],
|
|
|
c480ed |
+ "id": "definitions"
|
|
|
c480ed |
+}
|
|
|
c480ed |
diff --git a/tests/cputestdata/x86_64-cpuid-Xeon-E5-2630-v4.xml b/tests/cputestdata/x86_64-cpuid-Xeon-E5-2630-v4.xml
|
|
|
c480ed |
new file mode 100644
|
|
|
c480ed |
index 0000000000..d74c207104
|
|
|
c480ed |
--- /dev/null
|
|
|
c480ed |
+++ b/tests/cputestdata/x86_64-cpuid-Xeon-E5-2630-v4.xml
|
|
|
c480ed |
@@ -0,0 +1,43 @@
|
|
|
c480ed |
+
|
|
|
c480ed |
+<cpudata arch='x86'>
|
|
|
c480ed |
+ <cpuid eax_in='0x00000000' ecx_in='0x00' eax='0x00000014' ebx='0x756e6547' ecx='0x6c65746e' edx='0x49656e69'/>
|
|
|
c480ed |
+ <cpuid eax_in='0x00000001' ecx_in='0x00' eax='0x000406f1' ebx='0x01200800' ecx='0x7ffefbff' edx='0xbfebfbff'/>
|
|
|
c480ed |
+ <cpuid eax_in='0x00000002' ecx_in='0x00' eax='0x76036301' ebx='0x00f0b5ff' ecx='0x00000000' edx='0x00c30000'/>
|
|
|
c480ed |
+ <cpuid eax_in='0x00000003' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/>
|
|
|
c480ed |
+ <cpuid eax_in='0x00000004' ecx_in='0x00' eax='0x3c004121' ebx='0x01c0003f' ecx='0x0000003f' edx='0x00000000'/>
|
|
|
c480ed |
+ <cpuid eax_in='0x00000004' ecx_in='0x01' eax='0x3c004122' ebx='0x01c0003f' ecx='0x0000003f' edx='0x00000000'/>
|
|
|
c480ed |
+ <cpuid eax_in='0x00000004' ecx_in='0x02' eax='0x3c004143' ebx='0x01c0003f' ecx='0x000001ff' edx='0x00000000'/>
|
|
|
c480ed |
+ <cpuid eax_in='0x00000004' ecx_in='0x03' eax='0x3c07c163' ebx='0x04c0003f' ecx='0x00004fff' edx='0x00000006'/>
|
|
|
c480ed |
+ <cpuid eax_in='0x00000005' ecx_in='0x00' eax='0x00000040' ebx='0x00000040' ecx='0x00000003' edx='0x00002120'/>
|
|
|
c480ed |
+ <cpuid eax_in='0x00000006' ecx_in='0x00' eax='0x00000077' ebx='0x00000002' ecx='0x00000009' edx='0x00000000'/>
|
|
|
c480ed |
+ <cpuid eax_in='0x00000007' ecx_in='0x00' eax='0x00000000' ebx='0x021cbfbb' ecx='0x00000000' edx='0x00000000'/>
|
|
|
c480ed |
+ <cpuid eax_in='0x00000008' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/>
|
|
|
c480ed |
+ <cpuid eax_in='0x00000009' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/>
|
|
|
c480ed |
+ <cpuid eax_in='0x0000000a' ecx_in='0x00' eax='0x07300403' ebx='0x00000000' ecx='0x00000000' edx='0x00000603'/>
|
|
|
c480ed |
+ <cpuid eax_in='0x0000000b' ecx_in='0x00' eax='0x00000001' ebx='0x00000002' ecx='0x00000100' edx='0x00000001'/>
|
|
|
c480ed |
+ <cpuid eax_in='0x0000000b' ecx_in='0x01' eax='0x00000005' ebx='0x00000014' ecx='0x00000201' edx='0x00000001'/>
|
|
|
c480ed |
+ <cpuid eax_in='0x0000000c' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/>
|
|
|
c480ed |
+ <cpuid eax_in='0x0000000d' ecx_in='0x00' eax='0x00000007' ebx='0x00000340' ecx='0x00000340' edx='0x00000000'/>
|
|
|
c480ed |
+ <cpuid eax_in='0x0000000d' ecx_in='0x01' eax='0x00000001' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/>
|
|
|
c480ed |
+ <cpuid eax_in='0x0000000d' ecx_in='0x02' eax='0x00000100' ebx='0x00000240' ecx='0x00000000' edx='0x00000000'/>
|
|
|
c480ed |
+ <cpuid eax_in='0x0000000e' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/>
|
|
|
c480ed |
+ <cpuid eax_in='0x0000000f' ecx_in='0x00' eax='0x00000000' ebx='0x0000004f' ecx='0x00000000' edx='0x00000002'/>
|
|
|
c480ed |
+ <cpuid eax_in='0x0000000f' ecx_in='0x01' eax='0x00000000' ebx='0x0000a000' ecx='0x0000004f' edx='0x00000007'/>
|
|
|
c480ed |
+ <cpuid eax_in='0x00000010' ecx_in='0x00' eax='0x00000000' ebx='0x00000002' ecx='0x00000000' edx='0x00000000'/>
|
|
|
c480ed |
+ <cpuid eax_in='0x00000010' ecx_in='0x01' eax='0x00000013' ebx='0x000c0000' ecx='0x00000004' edx='0x0000000f'/>
|
|
|
c480ed |
+ <cpuid eax_in='0x00000011' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/>
|
|
|
c480ed |
+ <cpuid eax_in='0x00000012' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/>
|
|
|
c480ed |
+ <cpuid eax_in='0x00000013' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/>
|
|
|
c480ed |
+ <cpuid eax_in='0x00000014' ecx_in='0x00' eax='0x00000000' ebx='0x00000001' ecx='0x00000001' edx='0x00000000'/>
|
|
|
c480ed |
+ <cpuid eax_in='0x80000000' ecx_in='0x00' eax='0x80000008' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/>
|
|
|
c480ed |
+ <cpuid eax_in='0x80000001' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x00000121' edx='0x2c100800'/>
|
|
|
c480ed |
+ <cpuid eax_in='0x80000002' ecx_in='0x00' eax='0x65746e49' ebx='0x2952286c' ecx='0x6f655820' edx='0x2952286e'/>
|
|
|
c480ed |
+ <cpuid eax_in='0x80000003' ecx_in='0x00' eax='0x55504320' ebx='0x2d354520' ecx='0x30333632' edx='0x20347620'/>
|
|
|
c480ed |
+ <cpuid eax_in='0x80000004' ecx_in='0x00' eax='0x2e322040' ebx='0x48473032' ecx='0x0000007a' edx='0x00000000'/>
|
|
|
c480ed |
+ <cpuid eax_in='0x80000005' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/>
|
|
|
c480ed |
+ <cpuid eax_in='0x80000006' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x01006040' edx='0x00000000'/>
|
|
|
c480ed |
+ <cpuid eax_in='0x80000007' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x00000000' edx='0x00000100'/>
|
|
|
c480ed |
+ <cpuid eax_in='0x80000008' ecx_in='0x00' eax='0x0000302e' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/>
|
|
|
c480ed |
+ <cpuid eax_in='0x80860000' ecx_in='0x00' eax='0x00000000' ebx='0x00000001' ecx='0x00000001' edx='0x00000000'/>
|
|
|
c480ed |
+ <cpuid eax_in='0xc0000000' ecx_in='0x00' eax='0x00000000' ebx='0x00000001' ecx='0x00000001' edx='0x00000000'/>
|
|
|
c480ed |
+</cpudata>
|
|
|
c480ed |
--
|
|
|
c480ed |
2.22.0
|
|
|
c480ed |
|