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From 6fff75c304d9403ac7c36c436ddf53497f6417ef Mon Sep 17 00:00:00 2001
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Message-Id: <6fff75c304d9403ac7c36c436ddf53497f6417ef@dist-git>
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From: =?UTF-8?q?Daniel=20P=2E=20Berrang=C3=A9?= <berrange@redhat.com>
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Date: Mon, 21 May 2018 23:05:08 +0100
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Subject: [PATCH] cpu: define the 'virt-ssbd' CPUID feature bit (CVE-2018-3639)
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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Some AMD processors only support a non-architectural means of
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enabling Speculative Store Bypass Disable. To allow simplified
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handling in virtual environments, hypervisors will expose an
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architectural definition through CPUID bit 0x80000008_EBX[25].
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This needs to be exposed to guest OS running on AMD x86 hosts to
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allow them to protect against CVE-2018-3639.
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Note that since this CPUID bit won't be present in the host CPUID
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results on physical hosts, it will not be enabled automatically
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in guests configured with "host-model" CPU unless using QEMU
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version >= 2.9.0. Thus for older versions of QEMU, this feature
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must be manually enabled using policy=force. Guests using the
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"host-passthrough" CPU mode do not need special handling.
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Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
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Reviewed-by: Jiri Denemark <jdenemar@redhat.com>
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(cherry picked from commit 9267342206ce17f6933d57a3128cdc504d5945c9)
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Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
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Reviewed-by: Erik Skultety <eskultet@redhat.com>
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---
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src/cpu/cpu_map.xml | 3 +++
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1 file changed, 3 insertions(+)
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diff --git a/src/cpu/cpu_map.xml b/src/cpu/cpu_map.xml
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index cee3541d24..e0c39bb690 100644
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--- a/src/cpu/cpu_map.xml
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+++ b/src/cpu/cpu_map.xml
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@@ -436,6 +436,9 @@
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<feature name='ibpb'>
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<cpuid eax_in='0x80000008' ebx='0x00001000'/>
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</feature>
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+ <feature name='virt-ssbd'>
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+ <cpuid eax_in='0x80000008' ebx='0x02000000'/>
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+ </feature>
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<model name='486'>
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--
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2.17.1
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