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From 9df09ec5e1afef8659271c6cc4a5b741d5d06815 Mon Sep 17 00:00:00 2001
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Message-Id: <9df09ec5e1afef8659271c6cc4a5b741d5d06815@dist-git>
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From: Paolo Bonzini <pbonzini@redhat.com>
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Date: Tue, 12 Dec 2017 16:23:42 +0100
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Subject: [PATCH] cpu: add CPU features and model for indirect branch
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prediction protection
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CVE-2017-5715
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Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
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---
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src/cpu/cpu_map.xml | 58 +++++++++++++++++++++++++++++++++++++++++++++++++++++
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1 file changed, 58 insertions(+)
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diff --git a/src/cpu/cpu_map.xml b/src/cpu/cpu_map.xml
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index 96f4ce60dd..a7888ec134 100644
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--- a/src/cpu/cpu_map.xml
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+++ b/src/cpu/cpu_map.xml
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@@ -292,6 +292,15 @@
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<feature name='avx512-4fmaps'>
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<cpuid eax_in='0x07' ecx_in='0x00' edx='0x00000008'/>
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</feature>
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+ <feature name='spec-ctrl'>
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+ <cpuid eax_in='0x07' ecx_in='0x00' edx='0x04000000'/>
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+ </feature>
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+ <feature name='stibp'>
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+ <cpuid eax_in='0x07' ecx_in='0x00' edx='0x08000000'/>
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+ </feature>
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+ <feature name='arch-facilities'>
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+ <cpuid eax_in='0x07' ecx_in='0x00' edx='0x20000000'/>
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+ </feature>
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<feature name='xsaveopt'>
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@@ -420,6 +429,11 @@
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<cpuid eax_in='0x80000007' edx='0x00000100'/>
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</feature>
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+
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+ <feature name='ibpb'>
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+ <cpuid eax_in='0x80000008' ebx='0x00001000'/>
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+ </feature>
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+
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<model name='486'>
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<feature name='fpu'/>
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@@ -866,6 +880,10 @@
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<feature name='syscall'/>
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<feature name='tsc'/>
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</model>
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+ <model name='Nehalem-IBRS'>
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+ <model name='Nehalem'/>
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+ <feature name='spec-ctrl'/>
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+ </model>
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<model name='Westmere'>
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<signature family='6' model='44'/>
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@@ -903,6 +921,10 @@
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<feature name='syscall'/>
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<feature name='tsc'/>
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</model>
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+ <model name='Westmere-IBRS'>
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+ <model name='Westmere'/>
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+ <feature name='spec-ctrl'/>
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+ </model>
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<model name='SandyBridge'>
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<signature family='6' model='42'/>
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@@ -946,6 +968,10 @@
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<feature name='x2apic'/>
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<feature name='xsave'/>
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</model>
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+ <model name='SandyBridge-IBRS'>
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+ <model name='SandyBridge'/>
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+ <feature name='spec-ctrl'/>
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+ </model>
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<model name='IvyBridge'>
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<signature family='6' model='58'/>
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@@ -995,6 +1021,10 @@
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<feature name='x2apic'/>
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<feature name='xsave'/>
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</model>
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+ <model name='IvyBridge-IBRS'>
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+ <model name='IvyBridge'/>
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+ <feature name='spec-ctrl'/>
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+ </model>
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<model name='Haswell-noTSX'>
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<signature family='6' model='60'/>
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@@ -1048,6 +1078,10 @@
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<feature name='x2apic'/>
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<feature name='xsave'/>
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</model>
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+ <model name='Haswell-noTSX-IBRS'>
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+ <model name='Haswell-noTSX'/>
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+ <feature name='spec-ctrl'/>
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+ </model>
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<model name='Haswell'>
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<signature family='6' model='60'/>
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@@ -1103,6 +1137,10 @@
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<feature name='x2apic'/>
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<feature name='xsave'/>
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</model>
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+ <model name='Haswell-IBRS'>
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+ <model name='Haswell'/>
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+ <feature name='spec-ctrl'/>
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+ </model>
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<model name='Broadwell-noTSX'>
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<signature family='6' model='61'/>
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@@ -1160,6 +1198,10 @@
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<feature name='x2apic'/>
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<feature name='xsave'/>
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</model>
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+ <model name='Broadwell-noTSX-IBRS'>
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+ <model name='Broadwell-noTSX'/>
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+ <feature name='spec-ctrl'/>
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+ </model>
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<model name='Broadwell'>
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<signature family='6' model='61'/>
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@@ -1219,6 +1261,10 @@
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<feature name='x2apic'/>
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<feature name='xsave'/>
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</model>
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+ <model name='Broadwell-IBRS'>
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+ <model name='Broadwell'/>
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+ <feature name='spec-ctrl'/>
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+ </model>
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<model name='Skylake-Client'>
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<signature family='6' model='94'/>
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@@ -1287,6 +1333,10 @@
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<feature name='xsavec'/>
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<feature name='xsaveopt'/>
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</model>
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+ <model name='Skylake-Client-IBRS'>
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+ <model name='Skylake-Client'/>
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+ <feature name='spec-ctrl'/>
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+ </model>
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<model name='Skylake-Server'>
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<signature family='6' model='85'/>
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@@ -1362,6 +1412,10 @@
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<feature name='xsavec'/>
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<feature name='xsaveopt'/>
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</model>
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+ <model name='Skylake-Server-IBRS'>
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+ <model name='Skylake-Server'/>
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+ <feature name='spec-ctrl'/>
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+ </model>
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<model name='athlon'>
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@@ -1700,6 +1754,10 @@
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<feature name='xsavec'/>
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<feature name='xsaveopt'/>
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</model>
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+ <model name='EPYC-IBRS'>
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+ <model name='EPYC'/>
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+ <feature name='ibpb'/>
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+ </model>
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</arch>
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<arch name='ppc64'>
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--
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2.15.1
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