From ed3f51c4690685675cf2766edb90acbc0c1cdb67 Mon Sep 17 00:00:00 2001

From: Will Schmidt <will_schmidt@vnet.ibm.com>

Date: Sun, 3 Dec 2017 09:42:44 -0800

Subject: [PATCH] Add alternate event numbers for power9.

I had previously missed adding the _ALT entries, which allow some

events to be specified on different counters. This patch fills

those in.

This patch also adds a few validation tests for the ALT events.

Signed-off-by: Will Schmidt  <will_schmidt@vnet.ibm.com>

---

 lib/events/power9_events.h | 93 +++++++++++++++++++++++++++++++++++++++++++++-

 tests/validate_power.c     | 21 +++++++++++

 2 files changed, 113 insertions(+), 1 deletion(-)

diff --git a/lib/events/power9_events.h b/lib/events/power9_events.h

index 72c481b..d77bab3 100644

--- a/lib/events/power9_events.h

+++ b/lib/events/power9_events.h

@@ -9,6 +9,7 @@

 * Mods:

 * Initial content generated by Will Schmidt.  (Jan 31, 2017).

 * Refresh/update generated Jun 06, 2017 by Will Schmidt.

+* missing _ALT events added, Nov 16, 2017 by Will Schmidt.

 *

 * Contributed by

 * (C) Copyright IBM Corporation, 2017.  All Rights Reserved.

@@ -969,6 +970,18 @@

 #define POWER9_PME_PM_XLATE_HPT_MODE 943

 #define POWER9_PME_PM_XLATE_MISS 944

 #define POWER9_PME_PM_XLATE_RADIX_MODE 945

+#define POWER9_PME_PM_BR_2PATH_ALT 946

+#define POWER9_PME_PM_CYC_ALT 947

+#define POWER9_PME_PM_CYC_ALT2 948

+#define POWER9_PME_PM_CYC_ALT3 949

+#define POWER9_PME_PM_INST_CMPL_ALT 950

+#define POWER9_PME_PM_INST_CMPL_ALT2 951

+#define POWER9_PME_PM_INST_CMPL_ALT3 952

+#define POWER9_PME_PM_INST_DISP_ALT 953

+#define POWER9_PME_PM_LD_MISS_L1_ALT 954

+#define POWER9_PME_PM_SUSPENDED_ALT 955

+#define POWER9_PME_PM_SUSPENDED_ALT2 956

+#define POWER9_PME_PM_SUSPENDED_ALT3 957

 static const pme_power_entry_t power9_pe[] = {

 [ POWER9_PME_PM_1FLOP_CMPL ] = {

@@ -1031,6 +1044,7 @@ static const pme_power_entry_t power9_pe[] = {

 	.pme_short_desc = "Cycles in which all 4 Binary Floating Point units are busy.",

 	.pme_long_desc = "Cycles in which all 4 Binary Floating Point units are busy. The BFU is running at capacity",

 },

+/* See also alternate entries for 0000020036 / POWER9_PME_PM_BR_2PATH with code(s) 0000040036 at the bottom of this table. \n */

 [ POWER9_PME_PM_BR_2PATH ] = {

 	.pme_name = "PM_BR_2PATH",

 	.pme_code = 0x0000020036,

@@ -1559,6 +1573,7 @@ static const pme_power_entry_t power9_pe[] = {

 	.pme_short_desc = "Continuous 16 cycle (2to1) window where this signals rotates thru sampling each CO machine busy.",

 	.pme_long_desc = "Continuous 16 cycle (2to1) window where this signals rotates thru sampling each CO machine busy. PMU uses this wave to then do 16 cyc count to sample total number of machs running",

 },

+/* See also alternate entries for 000001001E / POWER9_PME_PM_CYC with code(s) 000002001E 000003001E 000004001E at the bottom of this table. \n */

 [ POWER9_PME_PM_CYC ] = {

 	.pme_name = "PM_CYC",

 	.pme_code = 0x000001001E,

@@ -2669,12 +2684,14 @@ static const pme_power_entry_t power9_pe[] = {

 	.pme_short_desc = "Initial and Final Pump Scope was chip pump (prediction=correct) for an instruction fetch",

 	.pme_long_desc = "Initial and Final Pump Scope was chip pump (prediction=correct) for an instruction fetch",

 },

+/* See also alternate entries for 0000010002 / POWER9_PME_PM_INST_CMPL with code(s) 0000020002 0000030002 0000040002 at the bottom of this table. \n */

 [ POWER9_PME_PM_INST_CMPL ] = {

 	.pme_name = "PM_INST_CMPL",

 	.pme_code = 0x0000010002,

 	.pme_short_desc = "Number of PowerPC Instructions that completed.",

 	.pme_long_desc = "Number of PowerPC Instructions that completed.",

 },

+/* See also alternate entries for 00000200F2 / POWER9_PME_PM_INST_DISP with code(s) 00000300F2 at the bottom of this table. \n */

 [ POWER9_PME_PM_INST_DISP ] = {

 	.pme_name = "PM_INST_DISP",

 	.pme_code = 0x00000200F2,

@@ -4007,6 +4024,7 @@ static const pme_power_entry_t power9_pe[] = {

 	.pme_short_desc = "Number of load instructions that finished with an L1 miss.",

 	.pme_long_desc = "Number of load instructions that finished with an L1 miss. Note that even if a load spans multiple slices this event will increment only once per load op.",

 },

+/* See also alternate entries for 000003E054 / POWER9_PME_PM_LD_MISS_L1 with code(s) 00000400F0 at the bottom of this table. \n */

 [ POWER9_PME_PM_LD_MISS_L1 ] = {

 	.pme_name = "PM_LD_MISS_L1",

 	.pme_code = 0x000003E054,

@@ -6149,6 +6167,7 @@ static const pme_power_entry_t power9_pe[] = {

 	.pme_short_desc = "Fetching is stopped due to an incoming instruction that will result in a flush",

 	.pme_long_desc = "Fetching is stopped due to an incoming instruction that will result in a flush",

 },

+/* See also alternate entries for 0000010000 / POWER9_PME_PM_SUSPENDED with code(s) 0000020000 0000030000 0000040000 at the bottom of this table. \n */

 [ POWER9_PME_PM_SUSPENDED ] = {

 	.pme_name = "PM_SUSPENDED",

 	.pme_code = 0x0000010000,

@@ -6647,6 +6666,78 @@ static const pme_power_entry_t power9_pe[] = {

 	.pme_short_desc = "LSU reports every cycle the thread is in radix translation mode (as opposed to HPT mode)",

 	.pme_long_desc = "LSU reports every cycle the thread is in radix translation mode (as opposed to HPT mode)",

 },

-/* total 945 */

+[ POWER9_PME_PM_BR_2PATH_ALT ] = {

+	.pme_name = "PM_BR_2PATH_ALT",

+	.pme_code = 0x0000040036,

+	.pme_short_desc = "Branches that are not strongly biased",

+	.pme_long_desc = "Branches that are not strongly biased",

+},

+[ POWER9_PME_PM_CYC_ALT ] = {

+	.pme_name = "PM_CYC_ALT",

+	.pme_code = 0x000002001E,

+	.pme_short_desc = "Processor cycles",

+	.pme_long_desc = "Processor cycles",

+},

+[ POWER9_PME_PM_CYC_ALT2 ] = {

+	.pme_name = "PM_CYC_ALT2",

+	.pme_code = 0x000003001E,

+	.pme_short_desc = "Processor cycles",

+	.pme_long_desc = "Processor cycles",

+},

+[ POWER9_PME_PM_CYC_ALT3 ] = {

+	.pme_name = "PM_CYC_ALT3",

+	.pme_code = 0x000004001E,

+	.pme_short_desc = "Processor cycles",

+	.pme_long_desc = "Processor cycles",

+},

+[ POWER9_PME_PM_INST_CMPL_ALT ] = {

+	.pme_name = "PM_INST_CMPL_ALT",

+	.pme_code = 0x0000020002,

+	.pme_short_desc = "Number of PowerPC Instructions that completed.",

+	.pme_long_desc = "Number of PowerPC Instructions that completed.",

+},

+[ POWER9_PME_PM_INST_CMPL_ALT2 ] = {

+	.pme_name = "PM_INST_CMPL_ALT2",

+	.pme_code = 0x0000030002,

+	.pme_short_desc = "Number of PowerPC Instructions that completed.",

+	.pme_long_desc = "Number of PowerPC Instructions that completed.",

+},

+[ POWER9_PME_PM_INST_CMPL_ALT3 ] = {

+	.pme_name = "PM_INST_CMPL_ALT3",

+	.pme_code = 0x0000040002,

+	.pme_short_desc = "Number of PowerPC Instructions that completed.",

+	.pme_long_desc = "Number of PowerPC Instructions that completed.",

+},

+[ POWER9_PME_PM_INST_DISP_ALT ] = {

+	.pme_name = "PM_INST_DISP_ALT",

+	.pme_code = 0x00000300F2,

+	.pme_short_desc = "# PPC Dispatched",

+	.pme_long_desc = "# PPC Dispatched",

+},

+[ POWER9_PME_PM_LD_MISS_L1_ALT ] = {

+	.pme_name = "PM_LD_MISS_L1_ALT",

+	.pme_code = 0x00000400F0,

+	.pme_short_desc = "Load Missed L1, counted at execution time (can be greater than loads finished).",

+	.pme_long_desc = "Load Missed L1, counted at execution time (can be greater than loads finished). LMQ merges are not included in this count. i.e. if a load instruction misses on an address that is already allocated on the LMQ, this event will not increment for that load). Note that this count is per slice, so if a load spans multiple slices this event will increment multiple times for a single load.",

+},

+[ POWER9_PME_PM_SUSPENDED_ALT ] = {

+	.pme_name = "PM_SUSPENDED_ALT",

+	.pme_code = 0x0000020000,

+	.pme_short_desc = "Counter OFF",

+	.pme_long_desc = "Counter OFF",

+},

+[ POWER9_PME_PM_SUSPENDED_ALT2 ] = {

+	.pme_name = "PM_SUSPENDED_ALT2",

+	.pme_code = 0x0000030000,

+	.pme_short_desc = "Counter OFF",

+	.pme_long_desc = "Counter OFF",

+},

+[ POWER9_PME_PM_SUSPENDED_ALT3 ] = {

+	.pme_name = "PM_SUSPENDED_ALT3",

+	.pme_code = 0x0000040000,

+	.pme_short_desc = "Counter OFF",

+	.pme_long_desc = "Counter OFF",

+},

+/* total 957 */

 };

 #endif

diff --git a/tests/validate_power.c b/tests/validate_power.c

index 617efca..2e38f32 100644

--- a/tests/validate_power.c

+++ b/tests/validate_power.c

@@ -171,6 +171,27 @@ static const test_event_t ppc_test_events[]={

 	  .codes[0] = 0x200f2,

 	  .fstr = "power9::PM_INST_DISP",

 	},

+	{ SRC_LINE,

+	  .name = "power9::PM_CYC_ALT",

+	  .ret  = PFM_SUCCESS,

+	  .count = 1,

+	  .codes[0] = 0x2001e,

+	  .fstr = "power9::PM_CYC_ALT",

+	},

+	{ SRC_LINE,

+	  .name = "power9::PM_CYC_ALT2",

+	  .ret  = PFM_SUCCESS,

+	  .count = 1,

+	  .codes[0] = 0x3001e,

+	  .fstr = "power9::PM_CYC_ALT2",

+	},

+	{ SRC_LINE,

+	  .name = "power9::PM_INST_CMPL_ALT",

+	  .ret  = PFM_SUCCESS,

+	  .count = 1,

+	  .codes[0] = 0x20002,

+	  .fstr = "power9::PM_INST_CMPL_ALT",

+	},

     { SRC_LINE,

       .name = "powerpc_nest_mcs_read::MCS_00",

       .ret = PFM_SUCCESS,

-- 

2.13.6