diff --git a/SOURCES/libgcrypt-1.8.5-ppc-aes-gcm.patch b/SOURCES/libgcrypt-1.8.5-ppc-aes-gcm.patch new file mode 100644 index 0000000..02e120b --- /dev/null +++ b/SOURCES/libgcrypt-1.8.5-ppc-aes-gcm.patch @@ -0,0 +1,1333 @@ +diff --git a/AUTHORS b/AUTHORS +index ee336b2e..77055c25 100644 +--- a/AUTHORS ++++ b/AUTHORS +@@ -29,6 +29,7 @@ List of Copyright holders + Copyright (C) 1996-1999 Peter Gutmann, Paul Kendall, and Chris Wedgwood + Copyright (C) 1996-2006 Peter Gutmann, Matt Thomlinson and Blake Coverett + Copyright (C) 2003 Nikos Mavroyanopoulos ++ Copyright (c) 2006 CRYPTOGAMS + Copyright (C) 2006-2007 NTT (Nippon Telegraph and Telephone Corporation) + Copyright (C) 2012-2019 g10 Code GmbH + Copyright (C) 2012 Simon Josefsson, Niels Möller +diff --git a/LICENSES b/LICENSES +index f6733a69..c19284e2 100644 +--- a/LICENSES ++++ b/LICENSES +@@ -54,7 +54,6 @@ with any binary distributions derived from the GNU C Library. + SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + #+end_quote + +- + For files: + - random/jitterentropy-base.c + - random/jitterentropy.h +@@ -99,6 +98,48 @@ with any binary distributions derived from the GNU C Library. + * DAMAGE. + #+end_quote + ++ For files: ++ - cipher/cipher-gcm-ppc.c ++ ++#+begin_quote ++ Copyright (c) 2006, CRYPTOGAMS by ++ All rights reserved. ++ ++ Redistribution and use in source and binary forms, with or without ++ modification, are permitted provided that the following conditions ++ are met: ++ ++ * Redistributions of source code must retain copyright notices, ++ this list of conditions and the following disclaimer. ++ ++ * Redistributions in binary form must reproduce the above ++ copyright notice, this list of conditions and the following ++ disclaimer in the documentation and/or other materials ++ provided with the distribution. ++ ++ * Neither the name of the CRYPTOGAMS nor the names of its ++ copyright holder and contributors may be used to endorse or ++ promote products derived from this software without specific ++ prior written permission. ++ ++ ALTERNATIVELY, provided that this notice is retained in full, this ++ product may be distributed under the terms of the GNU General Public ++ License (GPL), in which case the provisions of the GPL apply INSTEAD OF ++ those given above. ++ ++ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDER AND CONTRIBUTORS ++ "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT ++ LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR ++ A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT ++ OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, ++ SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT ++ LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, ++ DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY ++ THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT ++ (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE ++ OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ++#+end_quote ++ + * X License + + For files: +diff --git a/cipher/Makefile.am b/cipher/Makefile.am +index 1728e9f9..ab5d2a38 100644 +--- a/cipher/Makefile.am ++++ b/cipher/Makefile.am +@@ -66,6 +66,7 @@ blowfish.c blowfish-amd64.S blowfish-arm.S \ + cast5.c cast5-amd64.S cast5-arm.S \ + chacha20.c chacha20-sse2-amd64.S chacha20-ssse3-amd64.S chacha20-avx2-amd64.S \ + chacha20-armv7-neon.S \ ++cipher-gcm-ppc.c \ + crc.c \ + crc-intel-pclmul.c crc-ppc.c \ + des.c des-amd64.S \ +@@ -165,3 +166,9 @@ crc-ppc.o: $(srcdir)/crc-ppc.c Makefile + + crc-ppc.lo: $(srcdir)/crc-ppc.c Makefile + `echo $(LTCOMPILE) $(ppc_vcrypto_cflags) -c $< ` ++ ++cipher-gcm-ppc.o: $(srcdir)/cipher-gcm-ppc.c Makefile ++ `echo $(COMPILE) $(ppc_vcrypto_cflags) -c $< ` ++ ++cipher-gcm-ppc.lo: $(srcdir)/cipher-gcm-ppc.c Makefile ++ `echo $(LTCOMPILE) $(ppc_vcrypto_cflags) -c $< ` +diff --git a/cipher/cipher-gcm-ppc.c b/cipher/cipher-gcm-ppc.c +new file mode 100644 +index 00000000..ed27ef15 +--- /dev/null ++++ b/cipher/cipher-gcm-ppc.c +@@ -0,0 +1,510 @@ ++/* cipher-gcm-ppc.c - Power 8 vpmsum accelerated Galois Counter Mode ++ * implementation ++ * Copyright (C) 2019 Shawn Landden ++ * ++ * This file is part of Libgcrypt. ++ * ++ * Libgcrypt is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU Lesser general Public License as ++ * published by the Free Software Foundation; either version 2.1 of ++ * the License, or (at your option) any later version. ++ * ++ * Libgcrypt is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU Lesser General Public License for more details. ++ * ++ * You should have received a copy of the GNU Lesser General Public ++ * License along with this program; if not, see . ++ * ++ * Based on GHASH implementation by Andy Polyakov from CRYPTOGAMS ++ * distribution (ppc/ghashp8-ppc.pl). Specifically, it uses his register ++ * allocation (which then defers to your compiler's register allocation), ++ * instead of re-implementing Gerald Estrin's Scheme of parallelized ++ * multiplication of polynomials, as I did not understand this algorithm at ++ * the time. ++ * ++ * Original copyright license follows: ++ * ++ * Copyright (c) 2006, CRYPTOGAMS by ++ * All rights reserved. ++ * ++ * Redistribution and use in source and binary forms, with or without ++ * modification, are permitted provided that the following conditions ++ * are met: ++ * ++ * * Redistributions of source code must retain copyright notices, ++ * this list of conditions and the following disclaimer. ++ * ++ * * Redistributions in binary form must reproduce the above ++ * copyright notice, this list of conditions and the following ++ * disclaimer in the documentation and/or other materials ++ * provided with the distribution. ++ * ++ * * Neither the name of the CRYPTOGAMS nor the names of its ++ * copyright holder and contributors may be used to endorse or ++ * promote products derived from this software without specific ++ * prior written permission. ++ * ++ * ALTERNATIVELY, provided that this notice is retained in full, this ++ * product may be distributed under the terms of the GNU General Public ++ * License (GPL), in which case the provisions of the GPL apply INSTEAD OF ++ * those given above. ++ * ++ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDER AND CONTRIBUTORS ++ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT ++ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR ++ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT ++ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, ++ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT ++ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, ++ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY ++ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT ++ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE ++ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ++ * ++ * SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0-only) ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include "g10lib.h" ++#include "cipher.h" ++#include "bufhelp.h" ++#include "./cipher-internal.h" ++ ++#ifdef GCM_USE_PPC_VPMSUM ++ ++#include ++ ++#define ALWAYS_INLINE inline __attribute__((always_inline)) ++#define NO_INSTRUMENT_FUNCTION __attribute__((no_instrument_function)) ++ ++#define ASM_FUNC_ATTR NO_INSTRUMENT_FUNCTION ++#define ASM_FUNC_ATTR_INLINE ASM_FUNC_ATTR ALWAYS_INLINE ++ ++typedef vector unsigned char vector16x_u8; ++typedef vector signed char vector16x_s8; ++typedef vector unsigned long long vector2x_u64; ++typedef vector unsigned long long block; ++ ++static ASM_FUNC_ATTR_INLINE block ++asm_vpmsumd(block a, block b) ++{ ++ block r; ++ __asm__("vpmsumd %0, %1, %2" ++ : "=v" (r) ++ : "v" (a), "v" (b)); ++ return r; ++} ++ ++static ASM_FUNC_ATTR_INLINE block ++asm_swap_u64(block a) ++{ ++ __asm__("xxswapd %x0, %x1" ++ : "=wa" (a) ++ : "wa" (a)); ++ return a; ++} ++ ++static ASM_FUNC_ATTR_INLINE block ++asm_rot_block_left(block a) ++{ ++ block zero = {0, 0}; ++ block mask = {2, 0}; ++ return __builtin_shuffle(a, zero, mask); ++} ++ ++static ASM_FUNC_ATTR_INLINE block ++asm_rot_block_right(block a) ++{ ++ block zero = {0, 0}; ++ block mask = {1, 2}; ++ return __builtin_shuffle(a, zero, mask); ++} ++ ++/* vsl is a slightly strange function in the way the shift is passed... */ ++static ASM_FUNC_ATTR_INLINE block ++asm_ashl_128(block a, vector16x_u8 shift) ++{ ++ block r; ++ __asm__("vsl %0, %1, %2" ++ : "=v" (r) ++ : "v" (a), "v" (shift)); ++ return r; ++} ++ ++#define ALIGNED_LOAD(in_ptr) \ ++ (vec_aligned_ld (0, (const unsigned char *)(in_ptr))) ++ ++static ASM_FUNC_ATTR_INLINE block ++vec_aligned_ld(unsigned long offset, const unsigned char *ptr) ++{ ++#ifndef WORDS_BIGENDIAN ++ block vec; ++ __asm__ ("lvx %0,%1,%2\n\t" ++ : "=v" (vec) ++ : "r" (offset), "r" ((uintptr_t)ptr) ++ : "memory", "r0"); ++ return vec; ++#else ++ return vec_vsx_ld (offset, ptr); ++#endif ++} ++ ++#define STORE_TABLE(gcm_table, slot, vec) \ ++ vec_aligned_st (((block)vec), slot * 16, (unsigned char *)(gcm_table)); ++ ++ ++static ASM_FUNC_ATTR_INLINE void ++vec_aligned_st(block vec, unsigned long offset, unsigned char *ptr) ++{ ++#ifndef WORDS_BIGENDIAN ++ __asm__ ("stvx %0,%1,%2\n\t" ++ : ++ : "v" (vec), "r" (offset), "r" ((uintptr_t)ptr) ++ : "memory", "r0"); ++#else ++ vec_vsx_st ((vector16x_u8)vec, offset, ptr); ++#endif ++} ++ ++#define VEC_LOAD_BE(in_ptr, bswap_const) \ ++ (vec_load_be (0, (const unsigned char *)(in_ptr), bswap_const)) ++ ++static ASM_FUNC_ATTR_INLINE block ++vec_load_be(unsigned long offset, const unsigned char *ptr, ++ vector unsigned char be_bswap_const) ++{ ++#ifndef WORDS_BIGENDIAN ++ block vec; ++ /* GCC vec_vsx_ld is generating two instructions on little-endian. Use ++ * lxvw4x directly instead. */ ++ __asm__ ("lxvw4x %x0,%1,%2\n\t" ++ : "=wa" (vec) ++ : "r" (offset), "r" ((uintptr_t)ptr) ++ : "memory", "r0"); ++ __asm__ ("vperm %0,%1,%1,%2\n\t" ++ : "=v" (vec) ++ : "v" (vec), "v" (be_bswap_const)); ++ return vec; ++#else ++ (void)be_bswap_const; ++ return vec_vsx_ld (offset, ptr); ++#endif ++} ++ ++/* Power ghash based on papers: ++ "The Galois/Counter Mode of Operation (GCM)"; David A. McGrew, John Viega ++ "Intel® Carry-Less Multiplication Instruction and its Usage for Computing ++ the GCM Mode - Rev 2.01"; Shay Gueron, Michael E. Kounavis. ++ ++ After saving the magic c2 constant and pre-formatted version of the key, ++ we pre-process the key for parallel hashing. This takes advantage of the ++ identity of addition over a galois field being identital to XOR, and thus ++ can be parellized (S 2.2, page 3). We multiply and add (galois field ++ versions) the key over multiple iterations and save the result. This can ++ later be galois added (XORed) with parallel processed input (Estrin's ++ Scheme). ++ ++ The ghash "key" is a salt. */ ++void ASM_FUNC_ATTR ++_gcry_ghash_setup_ppc_vpmsum (uint64_t *gcm_table, void *gcm_key) ++{ ++ vector16x_u8 bswap_const = ++ { 12, 13, 14, 15, 8, 9, 10, 11, 4, 5, 6, 7, 0, 1, 2, 3 }; ++ vector16x_u8 c2 = ++ { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0b11000010 }; ++ block T0, T1, T2; ++ block C2, H, H1, H1l, H1h, H2, H2l, H2h; ++ block H3l, H3, H3h, H4l, H4, H4h, T3, T4; ++ vector16x_s8 most_sig_of_H, t7, carry; ++ vector16x_u8 one = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 }; ++ ++ H = VEC_LOAD_BE(gcm_key, bswap_const); ++ most_sig_of_H = vec_splat((vector16x_s8)H, 15); ++ t7 = vec_splat_s8(7); ++ carry = most_sig_of_H >> t7; ++ carry &= c2; /* only interested in certain carries. */ ++ H1 = asm_ashl_128(H, one); ++ H1 ^= (block)carry; /* complete the <<< 1 */ ++ ++ T1 = asm_swap_u64 (H1); ++ H1l = asm_rot_block_right (T1); ++ H1h = asm_rot_block_left (T1); ++ C2 = asm_rot_block_right ((block)c2); ++ ++ STORE_TABLE (gcm_table, 0, C2); ++ STORE_TABLE (gcm_table, 1, H1l); ++ STORE_TABLE (gcm_table, 2, T1); ++ STORE_TABLE (gcm_table, 3, H1h); ++ ++ /* pre-process coefficients for Gerald Estrin's scheme for parallel ++ * multiplication of polynomials ++ */ ++ H2l = asm_vpmsumd (H1l, H1); /* do not need to mask in ++ because 0 * anything -> 0 */ ++ H2 = asm_vpmsumd (T1, H1); ++ H2h = asm_vpmsumd (H1h, H1); ++ ++ /* reduce 1 */ ++ T0 = asm_vpmsumd (H2l, C2); ++ ++ H2l ^= asm_rot_block_left (H2);; ++ H2h ^= asm_rot_block_right (H2); ++ H2l = asm_swap_u64 (H2l); ++ H2l ^= T0; ++ /* reduce 2 */ ++ T0 = asm_swap_u64 (H2l); ++ H2l = asm_vpmsumd (H2l, C2); ++ H2 = H2l ^ H2h ^ T0; ++ ++ T2 = asm_swap_u64 (H2); ++ H2l = asm_rot_block_right (T2); ++ H2h = asm_rot_block_left (T2); ++ ++ STORE_TABLE (gcm_table, 4, H2l); ++ STORE_TABLE (gcm_table, 5, T2); ++ STORE_TABLE (gcm_table, 6, H2h); ++ ++ H3l = asm_vpmsumd (H2l, H1); ++ H4l = asm_vpmsumd (H2l, H2); ++ H3 = asm_vpmsumd (T2, H1); ++ H4 = asm_vpmsumd (T2, H2); ++ H3h = asm_vpmsumd (H2h, H1); ++ H4h = asm_vpmsumd (H2h, H2); ++ ++ T3 = asm_vpmsumd (H3l, C2); ++ T4 = asm_vpmsumd (H4l, C2); ++ ++ H3l ^= asm_rot_block_left (H3); ++ H3h ^= asm_rot_block_right (H3); ++ H4l ^= asm_rot_block_left (H4); ++ H4h ^= asm_rot_block_right (H4); ++ ++ H3 = asm_swap_u64 (H3l); ++ H4 = asm_swap_u64 (H4l); ++ ++ H3 ^= T3; ++ H4 ^= T4; ++ ++ /* We could have also b64 switched reduce and reduce2, however as we are ++ using the unrotated H and H2 above to vpmsum, this is marginally better. */ ++ T3 = asm_swap_u64 (H3); ++ T4 = asm_swap_u64 (H4); ++ ++ H3 = asm_vpmsumd (H3, C2); ++ H4 = asm_vpmsumd (H4, C2); ++ ++ T3 ^= H3h; ++ T4 ^= H4h; ++ H3 ^= T3; ++ H4 ^= T4; ++ H3 = asm_swap_u64 (H3); ++ H4 = asm_swap_u64 (H4); ++ ++ H3l = asm_rot_block_right (H3); ++ H3h = asm_rot_block_left (H3); ++ H4l = asm_rot_block_right (H4); ++ H4h = asm_rot_block_left (H4); ++ ++ STORE_TABLE (gcm_table, 7, H3l); ++ STORE_TABLE (gcm_table, 8, H3); ++ STORE_TABLE (gcm_table, 9, H3h); ++ STORE_TABLE (gcm_table, 10, H4l); ++ STORE_TABLE (gcm_table, 11, H4); ++ STORE_TABLE (gcm_table, 12, H4h); ++} ++ ++ASM_FUNC_ATTR_INLINE ++block ++vec_perm2(block l, block r, vector16x_u8 perm) { ++ block ret; ++ __asm__ ("vperm %0,%1,%2,%3\n\t" ++ : "=v" (ret) ++ : "v" (l), "v" (r), "v" (perm)); ++ return ret; ++} ++ ++void ASM_FUNC_ATTR ++_gcry_ghash_ppc_vpmsum (const byte *result, const void *const gcm_table, ++ const byte *const buf, const size_t nblocks) ++{ ++ /* This const is strange, it is reversing the bytes, and also reversing ++ the u32s that get switched by lxvw4 and it also addresses bytes big-endian, ++ and is here due to lack of proper peep-hole optimization. */ ++ vector16x_u8 bswap_const = ++ { 12, 13, 14, 15, 8, 9, 10, 11, 4, 5, 6, 7, 0, 1, 2, 3 }; ++ vector16x_u8 bswap_8_const = ++ { 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0 }; ++ block c2, H0l, H0m, H0h, H4l, H4m, H4h, H2m, H3l, H3m, H3h, Hl; ++ block Hm, Hh, in, in0, in1, in2, in3, Hm_right, Hl_rotate, cur; ++ size_t blocks_remaining = nblocks, off = 0; ++ size_t not_multiple_of_four; ++ block t0; ++ ++ cur = vec_load_be (0, result, bswap_const); ++ ++ c2 = vec_aligned_ld (0, gcm_table); ++ H0l = vec_aligned_ld (16, gcm_table); ++ H0m = vec_aligned_ld (32, gcm_table); ++ H0h = vec_aligned_ld (48, gcm_table); ++ ++ for (not_multiple_of_four = nblocks % 4; not_multiple_of_four; ++ not_multiple_of_four--) ++ { ++ in = vec_load_be (off, buf, bswap_const); ++ off += 16; ++ blocks_remaining--; ++ cur ^= in; ++ ++ Hl = asm_vpmsumd (cur, H0l); ++ Hm = asm_vpmsumd (cur, H0m); ++ Hh = asm_vpmsumd (cur, H0h); ++ ++ t0 = asm_vpmsumd (Hl, c2); ++ ++ Hl ^= asm_rot_block_left (Hm); ++ ++ Hm_right = asm_rot_block_right (Hm); ++ Hh ^= Hm_right; ++ Hl_rotate = asm_swap_u64 (Hl); ++ Hl_rotate ^= t0; ++ Hl = asm_swap_u64 (Hl_rotate); ++ Hl_rotate = asm_vpmsumd (Hl_rotate, c2); ++ Hl ^= Hh; ++ Hl ^= Hl_rotate; ++ ++ cur = Hl; ++ } ++ ++ if (blocks_remaining > 0) ++ { ++ vector16x_u8 hiperm = ++ { ++ 0x17, 0x16, 0x15, 0x14, 0x13, 0x12, 0x11, 0x10, ++ 0x7, 0x6, 0x5, 0x4, 0x3, 0x2, 0x1, 0x0 ++ }; ++ vector16x_u8 loperm = ++ { ++ 0x1f, 0x1e, 0x1d, 0x1c, 0x1b, 0x1a, 0x19, 0x18, ++ 0xf, 0xe, 0xd, 0xc, 0xb, 0xa, 0x9, 0x8 ++ }; ++ block Xl, Xm, Xh, Xl1, Xm1, Xh1, Xm2, Xl3, Xm3, Xh3, Xl_rotate; ++ block H21l, H21h, merge_l, merge_h; ++ ++ H2m = vec_aligned_ld (48 + 32, gcm_table); ++ H3l = vec_aligned_ld (48 * 2 + 16, gcm_table); ++ H3m = vec_aligned_ld (48 * 2 + 32, gcm_table); ++ H3h = vec_aligned_ld (48 * 2 + 48, gcm_table); ++ H4l = vec_aligned_ld (48 * 3 + 16, gcm_table); ++ H4m = vec_aligned_ld (48 * 3 + 32, gcm_table); ++ H4h = vec_aligned_ld (48 * 3 + 48, gcm_table); ++ ++ in0 = vec_load_be (off, buf, bswap_const); ++ in1 = vec_load_be (off + 16, buf, bswap_const); ++ in2 = vec_load_be (off + 32, buf, bswap_const); ++ in3 = vec_load_be (off + 48, buf, bswap_const); ++ blocks_remaining -= 4; ++ off += 64; ++ ++ Xh = in0 ^ cur; ++ ++ Xl1 = asm_vpmsumd (in1, H3l); ++ Xm1 = asm_vpmsumd (in1, H3m); ++ Xh1 = asm_vpmsumd (in1, H3h); ++ ++ H21l = vec_perm2 (H2m, H0m, hiperm); ++ H21h = vec_perm2 (H2m, H0m, loperm); ++ merge_l = vec_perm2 (in2, in3, loperm); ++ merge_h = vec_perm2 (in2, in3, hiperm); ++ ++ Xm2 = asm_vpmsumd (in2, H2m); ++ Xl3 = asm_vpmsumd (merge_l, H21l); ++ Xm3 = asm_vpmsumd (in3, H0m); ++ Xh3 = asm_vpmsumd (merge_h, H21h); ++ ++ Xm2 ^= Xm1; ++ Xl3 ^= Xl1; ++ Xm3 ^= Xm2; ++ Xh3 ^= Xh1; ++ ++ /* Gerald Estrin's scheme for parallel multiplication of polynomials */ ++ for (;blocks_remaining > 0; blocks_remaining -= 4, off += 64) ++ { ++ in0 = vec_load_be (off, buf, bswap_const); ++ in1 = vec_load_be (off + 16, buf, bswap_const); ++ in2 = vec_load_be (off + 32, buf, bswap_const); ++ in3 = vec_load_be (off + 48, buf, bswap_const); ++ ++ Xl = asm_vpmsumd (Xh, H4l); ++ Xm = asm_vpmsumd (Xh, H4m); ++ Xh = asm_vpmsumd (Xh, H4h); ++ Xl1 = asm_vpmsumd (in1, H3l); ++ Xm1 = asm_vpmsumd (in1, H3m); ++ Xh1 = asm_vpmsumd (in1, H3h); ++ ++ Xl ^= Xl3; ++ Xm ^= Xm3; ++ Xh ^= Xh3; ++ merge_l = vec_perm2 (in2, in3, loperm); ++ merge_h = vec_perm2 (in2, in3, hiperm); ++ ++ t0 = asm_vpmsumd (Xl, c2); ++ Xl3 = asm_vpmsumd (merge_l, H21l); ++ Xh3 = asm_vpmsumd (merge_h, H21h); ++ ++ Xl ^= asm_rot_block_left (Xm); ++ Xh ^= asm_rot_block_right (Xm); ++ ++ Xl = asm_swap_u64 (Xl); ++ Xl ^= t0; ++ ++ Xl_rotate = asm_swap_u64 (Xl); ++ Xm2 = asm_vpmsumd (in2, H2m); ++ Xm3 = asm_vpmsumd (in3, H0m); ++ Xl = asm_vpmsumd (Xl, c2); ++ ++ Xl3 ^= Xl1; ++ Xh3 ^= Xh1; ++ Xh ^= in0; ++ Xm2 ^= Xm1; ++ Xh ^= Xl_rotate; ++ Xm3 ^= Xm2; ++ Xh ^= Xl; ++ } ++ ++ Xl = asm_vpmsumd (Xh, H4l); ++ Xm = asm_vpmsumd (Xh, H4m); ++ Xh = asm_vpmsumd (Xh, H4h); ++ ++ Xl ^= Xl3; ++ Xm ^= Xm3; ++ ++ t0 = asm_vpmsumd (Xl, c2); ++ ++ Xh ^= Xh3; ++ Xl ^= asm_rot_block_left (Xm); ++ Xh ^= asm_rot_block_right (Xm); ++ ++ Xl = asm_swap_u64 (Xl); ++ Xl ^= t0; ++ ++ Xl_rotate = asm_swap_u64 (Xl); ++ Xl = asm_vpmsumd (Xl, c2); ++ Xl_rotate ^= Xh; ++ Xl ^= Xl_rotate; ++ ++ cur = Xl; ++ } ++ ++ cur = (block)vec_perm ((vector16x_u8)cur, (vector16x_u8)cur, bswap_8_const); ++ STORE_TABLE (result, 0, cur); ++} ++ ++#endif /* GCM_USE_PPC_VPMSUM */ +diff --git a/cipher/cipher-gcm.c b/cipher/cipher-gcm.c +index 32ec9fa0..b84a0698 100644 +--- a/cipher/cipher-gcm.c ++++ b/cipher/cipher-gcm.c +@@ -61,6 +61,28 @@ ghash_armv8_ce_pmull (gcry_cipher_hd_t c, byte *result, const byte *buf, + + #endif + ++#ifdef GCM_USE_PPC_VPMSUM ++extern void _gcry_ghash_setup_ppc_vpmsum (void *gcm_table, void *gcm_key); ++ ++/* result is 128-bits */ ++extern unsigned int _gcry_ghash_ppc_vpmsum (byte *result, void *gcm_table, ++ const byte *buf, size_t nblocks); ++ ++static void ++ghash_setup_ppc_vpmsum (gcry_cipher_hd_t c) ++{ ++ _gcry_ghash_setup_ppc_vpmsum(c->u_mode.gcm.gcm_table, c->u_mode.gcm.u_ghash_key.key); ++} ++ ++static unsigned int ++ghash_ppc_vpmsum (gcry_cipher_hd_t c, byte *result, const byte *buf, ++ size_t nblocks) ++{ ++ _gcry_ghash_ppc_vpmsum(result, c->u_mode.gcm.gcm_table, buf, ++ nblocks); ++ return 0; ++} ++#endif /* GCM_USE_PPC_VPMSUM */ + + #ifdef GCM_USE_TABLES + static const u16 gcmR[256] = { +@@ -403,7 +425,8 @@ ghash_internal (gcry_cipher_hd_t c, byte *result, const byte *buf, + static void + setupM (gcry_cipher_hd_t c) + { +-#if defined(GCM_USE_INTEL_PCLMUL) || defined(GCM_USE_ARM_PMULL) ++#if defined(GCM_USE_INTEL_PCLMUL) || defined(GCM_USE_ARM_PMULL) || \ ++ defined(GCM_USE_S390X_CRYPTO) || defined(GCM_USE_PPC_VPMSUM) + unsigned int features = _gcry_get_hw_features (); + #endif + +@@ -423,7 +446,24 @@ setupM (gcry_cipher_hd_t c) + ghash_setup_armv8_ce_pmull (c); + } + #endif +- else ++#ifdef GCM_USE_PPC_VPMSUM ++ else if (features & HWF_PPC_VCRYPTO) ++ { ++ c->u_mode.gcm.ghash_fn = ghash_ppc_vpmsum; ++ ghash_setup_ppc_vpmsum (c); ++ } ++#endif ++#ifdef GCM_USE_S390X_CRYPTO ++ else if (features & HWF_S390X_MSA) ++ { ++ if (kimd_query () & km_function_to_mask (KMID_FUNCTION_GHASH)) ++ { ++ c->u_mode.gcm.ghash_fn = ghash_s390x_kimd; ++ } ++ } ++#endif ++ ++ if (c->u_mode.gcm.ghash_fn == NULL) + { + c->u_mode.gcm.ghash_fn = ghash_internal; + fillM (c); +diff --git a/cipher/cipher-internal.h b/cipher/cipher-internal.h +index a95e084b..a5fd3097 100644 +--- a/cipher/cipher-internal.h ++++ b/cipher/cipher-internal.h +@@ -87,6 +87,18 @@ + #endif /* GCM_USE_ARM_PMULL */ + + ++/* GCM_USE_PPC_VPMSUM indicates whether to compile GCM with PPC Power 8 ++ * polynomial multiplication instruction. */ ++#undef GCM_USE_PPC_VPMSUM ++#if defined(GCM_USE_TABLES) ++#if defined(ENABLE_PPC_CRYPTO_SUPPORT) && defined(__powerpc64__) && \ ++ !defined(WORDS_BIGENDIAN) && defined(HAVE_COMPATIBLE_CC_PPC_ALTIVEC) && \ ++ defined(HAVE_GCC_INLINE_ASM_PPC_ALTIVEC) && __GNUC__ >= 4 ++# define GCM_USE_PPC_VPMSUM 1 ++# define NEED_16BYTE_ALIGNED_CONTEXT 1 /* this also aligns gcm_table */ ++#endif ++#endif /* GCM_USE_PPC_VPMSUM */ ++ + typedef unsigned int (*ghash_fn_t) (gcry_cipher_hd_t c, byte *result, + const byte *buf, size_t nblocks); + +@@ -277,9 +289,6 @@ struct gcry_cipher_handle + unsigned char key[MAX_BLOCKSIZE]; + } u_ghash_key; + +- /* GHASH implementation in use. */ +- ghash_fn_t ghash_fn; +- + /* Pre-calculated table for GCM. */ + #ifdef GCM_USE_TABLES + #if (SIZEOF_UNSIGNED_LONG == 8 || defined(__x86_64__)) +@@ -290,6 +299,9 @@ struct gcry_cipher_handle + u32 gcm_table[4 * 16]; + #endif + #endif ++ ++ /* GHASH implementation in use. */ ++ ghash_fn_t ghash_fn; + } gcm; + + /* Mode specific storage for OCB mode. */ +diff --git a/configure.ac b/configure.ac +index be35ce42..202ac888 100644 +--- a/configure.ac ++++ b/configure.ac +@@ -2752,6 +2752,25 @@ case "${host}" in + ;; + esac + ++# Arch specific GCM implementations ++case "${host}" in ++ powerpc64le-*-*) ++ GCRYPT_DIGESTS="$GCRYPT_DIGESTS cipher-gcm-ppc.lo" ++ ;; ++ powerpc64-*-*) ++ GCRYPT_DIGESTS="$GCRYPT_DIGESTS cipher-gcm-ppc.lo" ++ ;; ++ powerpc-*-*) ++ GCRYPT_DIGESTS="$GCRYPT_DIGESTS cipher-gcm-ppc.lo" ++ ;; ++esac ++ ++LIST_MEMBER(sm3, $enabled_digests) ++if test "$found" = "1" ; then ++ GCRYPT_DIGESTS="$GCRYPT_DIGESTS sm3.lo" ++ AC_DEFINE(USE_SM3, 1, [Defined if this module should be included]) ++fi ++ + LIST_MEMBER(scrypt, $enabled_kdfs) + if test "$found" = "1" ; then + GCRYPT_KDFS="$GCRYPT_KDFS scrypt.lo" +diff --git a/tests/basic.c b/tests/basic.c +index 0bd80201..06808d4a 100644 +--- a/tests/basic.c ++++ b/tests/basic.c +@@ -1553,6 +1553,22 @@ _check_gcm_cipher (unsigned int step) + "\x0f\xc0\xc3\xb7\x80\xf2\x44\x45\x2d\xa3\xeb\xf1\xc5\xd8\x2c\xde" + "\xa2\x41\x89\x97\x20\x0e\xf8\x2e\x44\xae\x7e\x3f", + "\xa4\x4a\x82\x66\xee\x1c\x8e\xb0\xc8\xb5\xd4\xcf\x5a\xe9\xf1\x9a" }, ++ { GCRY_CIPHER_AES256, ++ "\xfe\xff\xe9\x92\x86\x65\x73\x1c\x6d\x6a\x8f\x94\x67\x30\x83\x08" ++ "\xfe\xff\xe9\x92\x86\x65\x73\x1c\x6d\x6a\x8f\x94\x67\x30\x83\x08", ++ "\xca\xfe\xba\xbe\xfa\xce\xdb\xad\xde\xca\xf8\x88", 12, ++ "\xfe\xed\xfa\xce\xde\xad\xbe\xef\xfe\xed\xfa\xce\xde\xad\xbe\xef" ++ "\xab\xad\xda\xd2", 20, ++ "\xd9\x31\x32\x25\xf8\x84\x06\xe5\xa5\x59\x09\xc5\xaf\xf5\x26\x9a" ++ "\x86\xa7\xa9\x53\x15\x34\xf7\xda\x2e\x4c\x30\x3d\x8a\x31\x8a\x72" ++ "\x1c\x3c\x0c\x95\x95\x68\x09\x53\x2f\xcf\x0e\x24\x49\xa6\xb5\x25" ++ "\xb1\x6a\xed\xf5\xaa\x0d\xe6\x57\xba\x63\x7b\x39", ++ 60, ++ "\x52\x2d\xc1\xf0\x99\x56\x7d\x07\xf4\x7f\x37\xa3\x2a\x84\x42\x7d" ++ "\x64\x3a\x8c\xdc\xbf\xe5\xc0\xc9\x75\x98\xa2\xbd\x25\x55\xd1\xaa" ++ "\x8c\xb0\x8e\x48\x59\x0d\xbb\x3d\xa7\xb0\x8b\x10\x56\x82\x88\x38" ++ "\xc5\xf6\x1e\x63\x93\xba\x7a\x0a\xbc\xc9\xf6\x62", ++ "\x76\xfc\x6e\xce\x0f\x4e\x17\x68\xcd\xdf\x88\x53\xbb\x2d\x55\x1b" }, + /* Test vectors for overflowing CTR. */ + /* After setiv, ctr_low: 0xffffffff */ + { GCRY_CIPHER_AES256, + +diff --git a/cipher/cipher-gcm-ppc.c b/cipher/cipher-gcm-ppc.c +index ed27ef15..2f60c09d 100644 +--- a/cipher/cipher-gcm-ppc.c ++++ b/cipher/cipher-gcm-ppc.c +@@ -93,112 +93,157 @@ typedef vector signed char vector16x_s8; + typedef vector unsigned long long vector2x_u64; + typedef vector unsigned long long block; + ++static ASM_FUNC_ATTR_INLINE block ++asm_xor(block a, block b) ++{ ++ block r; ++ __asm__ volatile ("xxlxor %x0, %x1, %x2" ++ : "=wa" (r) ++ : "wa" (a), "wa" (b)); ++ return r; ++} ++ + static ASM_FUNC_ATTR_INLINE block + asm_vpmsumd(block a, block b) + { + block r; +- __asm__("vpmsumd %0, %1, %2" +- : "=v" (r) +- : "v" (a), "v" (b)); ++ __asm__ volatile ("vpmsumd %0, %1, %2" ++ : "=v" (r) ++ : "v" (a), "v" (b)); + return r; + } + + static ASM_FUNC_ATTR_INLINE block + asm_swap_u64(block a) + { +- __asm__("xxswapd %x0, %x1" +- : "=wa" (a) +- : "wa" (a)); +- return a; ++ block r; ++ __asm__ volatile ("xxswapd %x0, %x1" ++ : "=wa" (r) ++ : "wa" (a)); ++ return r; + } + + static ASM_FUNC_ATTR_INLINE block +-asm_rot_block_left(block a) ++asm_mergelo(block l, block r) + { +- block zero = {0, 0}; +- block mask = {2, 0}; +- return __builtin_shuffle(a, zero, mask); ++ block ret; ++ __asm__ volatile ("xxmrgld %x0, %x1, %x2\n\t" ++ : "=wa" (ret) ++ : "wa" (l), "wa" (r)); ++ return ret; + } + + static ASM_FUNC_ATTR_INLINE block +-asm_rot_block_right(block a) ++asm_mergehi(block l, block r) + { +- block zero = {0, 0}; +- block mask = {1, 2}; +- return __builtin_shuffle(a, zero, mask); ++ block ret; ++ __asm__ volatile ("xxmrghd %x0, %x1, %x2\n\t" ++ : "=wa" (ret) ++ : "wa" (l), "wa" (r)); ++ return ret; + } + +-/* vsl is a slightly strange function in the way the shift is passed... */ + static ASM_FUNC_ATTR_INLINE block +-asm_ashl_128(block a, vector16x_u8 shift) ++asm_rot_block_left(block a) + { + block r; +- __asm__("vsl %0, %1, %2" +- : "=v" (r) +- : "v" (a), "v" (shift)); ++ block zero = { 0, 0 }; ++ __asm__ volatile ("xxmrgld %x0, %x1, %x2" ++ : "=wa" (r) ++ : "wa" (a), "wa" (zero)); + return r; + } + +-#define ALIGNED_LOAD(in_ptr) \ +- (vec_aligned_ld (0, (const unsigned char *)(in_ptr))) ++static ASM_FUNC_ATTR_INLINE block ++asm_rot_block_right(block a) ++{ ++ block r; ++ block zero = { 0, 0 }; ++ __asm__ volatile ("xxsldwi %x0, %x2, %x1, 2" ++ : "=wa" (r) ++ : "wa" (a), "wa" (zero)); ++ return r; ++} + ++/* vsl is a slightly strange function in the way the shift is passed... */ + static ASM_FUNC_ATTR_INLINE block +-vec_aligned_ld(unsigned long offset, const unsigned char *ptr) ++asm_ashl_128(block a, vector16x_u8 shift) + { +-#ifndef WORDS_BIGENDIAN +- block vec; +- __asm__ ("lvx %0,%1,%2\n\t" +- : "=v" (vec) +- : "r" (offset), "r" ((uintptr_t)ptr) +- : "memory", "r0"); +- return vec; +-#else +- return vec_vsx_ld (offset, ptr); +-#endif ++ block r; ++ __asm__ volatile ("vsl %0, %1, %2" ++ : "=v" (r) ++ : "v" (a), "v" (shift)); ++ return r; + } + + #define STORE_TABLE(gcm_table, slot, vec) \ +- vec_aligned_st (((block)vec), slot * 16, (unsigned char *)(gcm_table)); +- ++ vec_store_he (((block)vec), slot * 16, (unsigned char *)(gcm_table)); + + static ASM_FUNC_ATTR_INLINE void +-vec_aligned_st(block vec, unsigned long offset, unsigned char *ptr) ++vec_store_he(block vec, unsigned long offset, unsigned char *ptr) + { + #ifndef WORDS_BIGENDIAN +- __asm__ ("stvx %0,%1,%2\n\t" +- : +- : "v" (vec), "r" (offset), "r" ((uintptr_t)ptr) +- : "memory", "r0"); ++ /* GCC vec_vsx_ld is generating two instructions on little-endian. Use ++ * lxvd2x directly instead. */ ++#if __GNUC__ >= 4 ++ if (__builtin_constant_p (offset) && offset == 0) ++ __asm__ volatile ("stxvd2x %x0, 0, %1\n\t" ++ : ++ : "wa" (vec), "r" ((uintptr_t)ptr) ++ : "memory", "r0"); ++ else ++#endif ++ __asm__ volatile ("stxvd2x %x0, %1, %2\n\t" ++ : ++ : "wa" (vec), "r" (offset), "r" ((uintptr_t)ptr) ++ : "memory", "r0"); + #else + vec_vsx_st ((vector16x_u8)vec, offset, ptr); + #endif + } + + #define VEC_LOAD_BE(in_ptr, bswap_const) \ +- (vec_load_be (0, (const unsigned char *)(in_ptr), bswap_const)) ++ vec_be_swap(vec_load_he (0, (const unsigned char *)(in_ptr)), bswap_const) + + static ASM_FUNC_ATTR_INLINE block +-vec_load_be(unsigned long offset, const unsigned char *ptr, +- vector unsigned char be_bswap_const) ++vec_load_he(unsigned long offset, const unsigned char *ptr) + { + #ifndef WORDS_BIGENDIAN + block vec; + /* GCC vec_vsx_ld is generating two instructions on little-endian. Use +- * lxvw4x directly instead. */ +- __asm__ ("lxvw4x %x0,%1,%2\n\t" +- : "=wa" (vec) +- : "r" (offset), "r" ((uintptr_t)ptr) +- : "memory", "r0"); +- __asm__ ("vperm %0,%1,%1,%2\n\t" +- : "=v" (vec) +- : "v" (vec), "v" (be_bswap_const)); ++ * lxvd2x directly instead. */ ++#if __GNUC__ >= 4 ++ if (__builtin_constant_p (offset) && offset == 0) ++ __asm__ volatile ("lxvd2x %x0, 0, %1\n\t" ++ : "=wa" (vec) ++ : "r" ((uintptr_t)ptr) ++ : "memory", "r0"); ++ else ++#endif ++ __asm__ volatile ("lxvd2x %x0, %1, %2\n\t" ++ : "=wa" (vec) ++ : "r" (offset), "r" ((uintptr_t)ptr) ++ : "memory", "r0"); + return vec; + #else +- (void)be_bswap_const; + return vec_vsx_ld (offset, ptr); + #endif + } + ++static ASM_FUNC_ATTR_INLINE block ++vec_be_swap(block vec, vector16x_u8 be_bswap_const) ++{ ++#ifndef WORDS_BIGENDIAN ++ __asm__ volatile ("vperm %0, %1, %1, %2\n\t" ++ : "=v" (vec) ++ : "v" (vec), "v" (be_bswap_const)); ++#else ++ (void)be_bswap_const; ++#endif ++ return vec; ++} ++ ++ + /* Power ghash based on papers: + "The Galois/Counter Mode of Operation (GCM)"; David A. McGrew, John Viega + "Intel® Carry-Less Multiplication Instruction and its Usage for Computing +@@ -216,15 +261,16 @@ vec_load_be(unsigned long offset, const unsigned char *ptr, + void ASM_FUNC_ATTR + _gcry_ghash_setup_ppc_vpmsum (uint64_t *gcm_table, void *gcm_key) + { +- vector16x_u8 bswap_const = +- { 12, 13, 14, 15, 8, 9, 10, 11, 4, 5, 6, 7, 0, 1, 2, 3 }; +- vector16x_u8 c2 = ++ static const vector16x_u8 bswap_const = ++ { ~7, ~6, ~5, ~4, ~3, ~2, ~1, ~0, ~15, ~14, ~13, ~12, ~11, ~10, ~9, ~8 }; ++ static const vector16x_u8 c2 = + { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0b11000010 }; ++ static const vector16x_u8 one = ++ { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 }; + block T0, T1, T2; + block C2, H, H1, H1l, H1h, H2, H2l, H2h; + block H3l, H3, H3h, H4l, H4, H4h, T3, T4; + vector16x_s8 most_sig_of_H, t7, carry; +- vector16x_u8 one = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 }; + + H = VEC_LOAD_BE(gcm_key, bswap_const); + most_sig_of_H = vec_splat((vector16x_s8)H, 15); +@@ -255,7 +301,7 @@ _gcry_ghash_setup_ppc_vpmsum (uint64_t *gcm_table, void *gcm_key) + /* reduce 1 */ + T0 = asm_vpmsumd (H2l, C2); + +- H2l ^= asm_rot_block_left (H2);; ++ H2l ^= asm_rot_block_left (H2); + H2h ^= asm_rot_block_right (H2); + H2l = asm_swap_u64 (H2l); + H2l ^= T0; +@@ -321,45 +367,30 @@ _gcry_ghash_setup_ppc_vpmsum (uint64_t *gcm_table, void *gcm_key) + STORE_TABLE (gcm_table, 12, H4h); + } + +-ASM_FUNC_ATTR_INLINE +-block +-vec_perm2(block l, block r, vector16x_u8 perm) { +- block ret; +- __asm__ ("vperm %0,%1,%2,%3\n\t" +- : "=v" (ret) +- : "v" (l), "v" (r), "v" (perm)); +- return ret; +-} +- + void ASM_FUNC_ATTR +-_gcry_ghash_ppc_vpmsum (const byte *result, const void *const gcm_table, +- const byte *const buf, const size_t nblocks) ++_gcry_ghash_ppc_vpmsum (byte *result, const void *const gcm_table, ++ const byte *buf, const size_t nblocks) + { +- /* This const is strange, it is reversing the bytes, and also reversing +- the u32s that get switched by lxvw4 and it also addresses bytes big-endian, +- and is here due to lack of proper peep-hole optimization. */ +- vector16x_u8 bswap_const = +- { 12, 13, 14, 15, 8, 9, 10, 11, 4, 5, 6, 7, 0, 1, 2, 3 }; +- vector16x_u8 bswap_8_const = +- { 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0 }; ++ static const vector16x_u8 bswap_const = ++ { ~7, ~6, ~5, ~4, ~3, ~2, ~1, ~0, ~15, ~14, ~13, ~12, ~11, ~10, ~9, ~8 }; + block c2, H0l, H0m, H0h, H4l, H4m, H4h, H2m, H3l, H3m, H3h, Hl; + block Hm, Hh, in, in0, in1, in2, in3, Hm_right, Hl_rotate, cur; +- size_t blocks_remaining = nblocks, off = 0; ++ size_t blocks_remaining = nblocks; + size_t not_multiple_of_four; + block t0; + +- cur = vec_load_be (0, result, bswap_const); ++ cur = vec_be_swap (vec_load_he (0, result), bswap_const); + +- c2 = vec_aligned_ld (0, gcm_table); +- H0l = vec_aligned_ld (16, gcm_table); +- H0m = vec_aligned_ld (32, gcm_table); +- H0h = vec_aligned_ld (48, gcm_table); ++ c2 = vec_load_he (0, gcm_table); ++ H0l = vec_load_he (16, gcm_table); ++ H0m = vec_load_he (32, gcm_table); ++ H0h = vec_load_he (48, gcm_table); + + for (not_multiple_of_four = nblocks % 4; not_multiple_of_four; + not_multiple_of_four--) + { +- in = vec_load_be (off, buf, bswap_const); +- off += 16; ++ in = vec_be_swap (vec_load_he (0, buf), bswap_const); ++ buf += 16; + blocks_remaining--; + cur ^= in; + +@@ -385,62 +416,64 @@ _gcry_ghash_ppc_vpmsum (const byte *result, const void *const gcm_table, + + if (blocks_remaining > 0) + { +- vector16x_u8 hiperm = +- { +- 0x17, 0x16, 0x15, 0x14, 0x13, 0x12, 0x11, 0x10, +- 0x7, 0x6, 0x5, 0x4, 0x3, 0x2, 0x1, 0x0 +- }; +- vector16x_u8 loperm = +- { +- 0x1f, 0x1e, 0x1d, 0x1c, 0x1b, 0x1a, 0x19, 0x18, +- 0xf, 0xe, 0xd, 0xc, 0xb, 0xa, 0x9, 0x8 +- }; + block Xl, Xm, Xh, Xl1, Xm1, Xh1, Xm2, Xl3, Xm3, Xh3, Xl_rotate; + block H21l, H21h, merge_l, merge_h; +- +- H2m = vec_aligned_ld (48 + 32, gcm_table); +- H3l = vec_aligned_ld (48 * 2 + 16, gcm_table); +- H3m = vec_aligned_ld (48 * 2 + 32, gcm_table); +- H3h = vec_aligned_ld (48 * 2 + 48, gcm_table); +- H4l = vec_aligned_ld (48 * 3 + 16, gcm_table); +- H4m = vec_aligned_ld (48 * 3 + 32, gcm_table); +- H4h = vec_aligned_ld (48 * 3 + 48, gcm_table); +- +- in0 = vec_load_be (off, buf, bswap_const); +- in1 = vec_load_be (off + 16, buf, bswap_const); +- in2 = vec_load_be (off + 32, buf, bswap_const); +- in3 = vec_load_be (off + 48, buf, bswap_const); +- blocks_remaining -= 4; +- off += 64; +- +- Xh = in0 ^ cur; ++ block t1, t2; ++ ++ H2m = vec_load_he (48 + 32, gcm_table); ++ H3l = vec_load_he (48 * 2 + 16, gcm_table); ++ H3m = vec_load_he (48 * 2 + 32, gcm_table); ++ H3h = vec_load_he (48 * 2 + 48, gcm_table); ++ H4l = vec_load_he (48 * 3 + 16, gcm_table); ++ H4m = vec_load_he (48 * 3 + 32, gcm_table); ++ H4h = vec_load_he (48 * 3 + 48, gcm_table); ++ ++ in0 = vec_load_he (0, buf); ++ in1 = vec_load_he (16, buf); ++ in2 = vec_load_he (32, buf); ++ in3 = vec_load_he (48, buf); ++ in0 = vec_be_swap(in0, bswap_const); ++ in1 = vec_be_swap(in1, bswap_const); ++ in2 = vec_be_swap(in2, bswap_const); ++ in3 = vec_be_swap(in3, bswap_const); ++ ++ Xh = asm_xor (in0, cur); + + Xl1 = asm_vpmsumd (in1, H3l); + Xm1 = asm_vpmsumd (in1, H3m); + Xh1 = asm_vpmsumd (in1, H3h); + +- H21l = vec_perm2 (H2m, H0m, hiperm); +- H21h = vec_perm2 (H2m, H0m, loperm); +- merge_l = vec_perm2 (in2, in3, loperm); +- merge_h = vec_perm2 (in2, in3, hiperm); ++ H21l = asm_mergehi (H2m, H0m); ++ H21h = asm_mergelo (H2m, H0m); ++ merge_l = asm_mergelo (in2, in3); ++ merge_h = asm_mergehi (in2, in3); + + Xm2 = asm_vpmsumd (in2, H2m); + Xl3 = asm_vpmsumd (merge_l, H21l); + Xm3 = asm_vpmsumd (in3, H0m); + Xh3 = asm_vpmsumd (merge_h, H21h); + +- Xm2 ^= Xm1; +- Xl3 ^= Xl1; +- Xm3 ^= Xm2; +- Xh3 ^= Xh1; ++ Xm2 = asm_xor (Xm2, Xm1); ++ Xl3 = asm_xor (Xl3, Xl1); ++ Xm3 = asm_xor (Xm3, Xm2); ++ Xh3 = asm_xor (Xh3, Xh1); + + /* Gerald Estrin's scheme for parallel multiplication of polynomials */ +- for (;blocks_remaining > 0; blocks_remaining -= 4, off += 64) ++ while (1) + { +- in0 = vec_load_be (off, buf, bswap_const); +- in1 = vec_load_be (off + 16, buf, bswap_const); +- in2 = vec_load_be (off + 32, buf, bswap_const); +- in3 = vec_load_be (off + 48, buf, bswap_const); ++ buf += 64; ++ blocks_remaining -= 4; ++ if (!blocks_remaining) ++ break; ++ ++ in0 = vec_load_he (0, buf); ++ in1 = vec_load_he (16, buf); ++ in2 = vec_load_he (32, buf); ++ in3 = vec_load_he (48, buf); ++ in1 = vec_be_swap(in1, bswap_const); ++ in2 = vec_be_swap(in2, bswap_const); ++ in3 = vec_be_swap(in3, bswap_const); ++ in0 = vec_be_swap(in0, bswap_const); + + Xl = asm_vpmsumd (Xh, H4l); + Xm = asm_vpmsumd (Xh, H4m); +@@ -449,62 +482,63 @@ _gcry_ghash_ppc_vpmsum (const byte *result, const void *const gcm_table, + Xm1 = asm_vpmsumd (in1, H3m); + Xh1 = asm_vpmsumd (in1, H3h); + +- Xl ^= Xl3; +- Xm ^= Xm3; +- Xh ^= Xh3; +- merge_l = vec_perm2 (in2, in3, loperm); +- merge_h = vec_perm2 (in2, in3, hiperm); ++ Xl = asm_xor (Xl, Xl3); ++ Xm = asm_xor (Xm, Xm3); ++ Xh = asm_xor (Xh, Xh3); ++ merge_l = asm_mergelo (in2, in3); ++ merge_h = asm_mergehi (in2, in3); + + t0 = asm_vpmsumd (Xl, c2); + Xl3 = asm_vpmsumd (merge_l, H21l); + Xh3 = asm_vpmsumd (merge_h, H21h); + +- Xl ^= asm_rot_block_left (Xm); +- Xh ^= asm_rot_block_right (Xm); ++ t1 = asm_rot_block_left (Xm); ++ t2 = asm_rot_block_right (Xm); ++ Xl = asm_xor(Xl, t1); ++ Xh = asm_xor(Xh, t2); + + Xl = asm_swap_u64 (Xl); +- Xl ^= t0; ++ Xl = asm_xor(Xl, t0); + + Xl_rotate = asm_swap_u64 (Xl); + Xm2 = asm_vpmsumd (in2, H2m); + Xm3 = asm_vpmsumd (in3, H0m); + Xl = asm_vpmsumd (Xl, c2); + +- Xl3 ^= Xl1; +- Xh3 ^= Xh1; +- Xh ^= in0; +- Xm2 ^= Xm1; +- Xh ^= Xl_rotate; +- Xm3 ^= Xm2; +- Xh ^= Xl; ++ Xl3 = asm_xor (Xl3, Xl1); ++ Xh3 = asm_xor (Xh3, Xh1); ++ Xh = asm_xor (Xh, in0); ++ Xm2 = asm_xor (Xm2, Xm1); ++ Xh = asm_xor (Xh, Xl_rotate); ++ Xm3 = asm_xor (Xm3, Xm2); ++ Xh = asm_xor (Xh, Xl); + } + + Xl = asm_vpmsumd (Xh, H4l); + Xm = asm_vpmsumd (Xh, H4m); + Xh = asm_vpmsumd (Xh, H4h); + +- Xl ^= Xl3; +- Xm ^= Xm3; ++ Xl = asm_xor (Xl, Xl3); ++ Xm = asm_xor (Xm, Xm3); + + t0 = asm_vpmsumd (Xl, c2); + +- Xh ^= Xh3; +- Xl ^= asm_rot_block_left (Xm); +- Xh ^= asm_rot_block_right (Xm); ++ Xh = asm_xor (Xh, Xh3); ++ t1 = asm_rot_block_left (Xm); ++ t2 = asm_rot_block_right (Xm); ++ Xl = asm_xor (Xl, t1); ++ Xh = asm_xor (Xh, t2); + + Xl = asm_swap_u64 (Xl); +- Xl ^= t0; ++ Xl = asm_xor (Xl, t0); + + Xl_rotate = asm_swap_u64 (Xl); + Xl = asm_vpmsumd (Xl, c2); +- Xl_rotate ^= Xh; +- Xl ^= Xl_rotate; +- +- cur = Xl; ++ Xh = asm_xor (Xh, Xl_rotate); ++ cur = asm_xor (Xh, Xl); + } + +- cur = (block)vec_perm ((vector16x_u8)cur, (vector16x_u8)cur, bswap_8_const); +- STORE_TABLE (result, 0, cur); ++ vec_store_he (vec_be_swap (cur, bswap_const), 0, result); + } + + #endif /* GCM_USE_PPC_VPMSUM */ + +diff --git a/cipher/Makefile.am b/cipher/Makefile.am +index ab5d2a38..7a777ef2 100644 +--- a/cipher/Makefile.am ++++ b/cipher/Makefile.am +@@ -42,8 +42,7 @@ libcipher_la_LIBADD = $(GCRYPT_MODULES) + libcipher_la_SOURCES = \ + cipher.c cipher-internal.h \ + cipher-cbc.c cipher-cfb.c cipher-ofb.c cipher-ctr.c cipher-aeswrap.c \ +-cipher-ccm.c cipher-cmac.c cipher-gcm.c cipher-gcm-intel-pclmul.c \ +- cipher-gcm-armv8-aarch32-ce.S cipher-gcm-armv8-aarch64-ce.S \ ++cipher-ccm.c cipher-cmac.c cipher-gcm.c \ + cipher-poly1305.c cipher-ocb.c cipher-xts.c \ + cipher-selftest.c cipher-selftest.h \ + pubkey.c pubkey-internal.h pubkey-util.c \ +@@ -66,7 +65,8 @@ blowfish.c blowfish-amd64.S blowfish-arm.S \ + cast5.c cast5-amd64.S cast5-arm.S \ + chacha20.c chacha20-sse2-amd64.S chacha20-ssse3-amd64.S chacha20-avx2-amd64.S \ + chacha20-armv7-neon.S \ +-cipher-gcm-ppc.c \ ++cipher-gcm-ppc.c cipher-gcm-intel-pclmul.c \ ++ cipher-gcm-armv8-aarch32-ce.S cipher-gcm-armv8-aarch64-ce.S \ + crc.c \ + crc-intel-pclmul.c crc-ppc.c \ + des.c des-amd64.S \ +diff --git a/configure.ac b/configure.ac +index fd447906..9bcb1318 100644 +--- a/configure.ac ++++ b/configure.ac +@@ -2754,14 +2754,18 @@ esac + + # Arch specific GCM implementations + case "${host}" in +- powerpc64le-*-*) +- GCRYPT_DIGESTS="$GCRYPT_DIGESTS cipher-gcm-ppc.lo" ++ i?86-*-* | x86_64-*-*) ++ GCRYPT_DIGESTS="$GCRYPT_DIGESTS cipher-gcm-intel-pclmul.lo" + ;; +- powerpc64-*-*) +- GCRYPT_DIGESTS="$GCRYPT_DIGESTS cipher-gcm-ppc.lo" ++ arm*-*-*) ++ GCRYPT_DIGESTS="$GCRYPT_DIGESTS cipher-gcm-armv7-neon.lo" ++ GCRYPT_DIGESTS="$GCRYPT_DIGESTS cipher-gcm-armv8-aarch32-ce.lo" ++ ;; ++ aarch64-*-*) ++ GCRYPT_DIGESTS="$GCRYPT_DIGESTS cipher-gcm-armv8-aarch64-ce.lo" + ;; +- powerpc-*-*) +- GCRYPT_DIGESTS="$GCRYPT_DIGESTS cipher-gcm-ppc.lo" ++ powerpc64le-*-* | powerpc64-*-* | powerpc-*-*) ++ GCRYPT_DIGESTS="$GCRYPT_DIGESTS cipher-gcm-ppc.lo" + ;; + esac + diff --git a/SOURCES/libgcrypt-1.8.5-ppc-bugfix.patch b/SOURCES/libgcrypt-1.8.5-ppc-bugfix.patch new file mode 100644 index 0000000..3a7a146 --- /dev/null +++ b/SOURCES/libgcrypt-1.8.5-ppc-bugfix.patch @@ -0,0 +1,274 @@ +diff --git a/cipher/crc-ppc.c b/cipher/crc-ppc.c +index 4d7f0add..b9a40130 100644 +--- a/cipher/crc-ppc.c ++++ b/cipher/crc-ppc.c +@@ -154,26 +154,63 @@ static const vector16x_u8 bswap_const ALIGNED_64 = + #ifdef WORDS_BIGENDIAN + # define CRC_VEC_U64_DEF(lo, hi) { (hi), (lo) } + # define CRC_VEC_U64_LOAD(offs, ptr) \ +- asm_swap_u64(vec_vsx_ld((offs), (const unsigned long long *)(ptr))) ++ asm_swap_u64(asm_vec_u64_load(offs, ptr)) + # define CRC_VEC_U64_LOAD_LE(offs, ptr) \ +- CRC_VEC_SWAP(vec_vsx_ld((offs), (const unsigned long long *)(ptr))) ++ CRC_VEC_SWAP(asm_vec_u64_load(offs, ptr)) + # define CRC_VEC_U64_LOAD_BE(offs, ptr) \ +- vec_vsx_ld((offs), (const unsigned long long *)(ptr)) ++ asm_vec_u64_load(offs, ptr) + # define CRC_VEC_SWAP_TO_LE(v) CRC_VEC_SWAP(v) + # define CRC_VEC_SWAP_TO_BE(v) (v) + # define VEC_U64_LO 1 + # define VEC_U64_HI 0 ++ ++static ASM_FUNC_ATTR_INLINE vector2x_u64 ++asm_vec_u64_load(unsigned long offset, const void *ptr) ++{ ++ vector2x_u64 vecu64; ++#if __GNUC__ >= 4 ++ if (__builtin_constant_p (offset) && offset == 0) ++ __asm__ volatile ("lxvd2x %x0,0,%1\n\t" ++ : "=wa" (vecu64) ++ : "r" ((uintptr_t)ptr) ++ : "memory"); ++ else ++#endif ++ __asm__ volatile ("lxvd2x %x0,%1,%2\n\t" ++ : "=wa" (vecu64) ++ : "r" (offset), "r" ((uintptr_t)ptr) ++ : "memory", "r0"); ++ return vecu64; ++} + #else + # define CRC_VEC_U64_DEF(lo, hi) { (lo), (hi) } +-# define CRC_VEC_U64_LOAD(offs, ptr) \ +- vec_vsx_ld((offs), (const unsigned long long *)(ptr)) +-# define CRC_VEC_U64_LOAD_LE(offs, ptr) CRC_VEC_U64_LOAD((offs), (ptr)) ++# define CRC_VEC_U64_LOAD(offs, ptr) asm_vec_u64_load_le(offs, ptr) ++# define CRC_VEC_U64_LOAD_LE(offs, ptr) asm_vec_u64_load_le(offs, ptr) + # define CRC_VEC_U64_LOAD_BE(offs, ptr) asm_vec_u64_load_be(offs, ptr) + # define CRC_VEC_SWAP_TO_LE(v) (v) + # define CRC_VEC_SWAP_TO_BE(v) CRC_VEC_SWAP(v) + # define VEC_U64_LO 0 + # define VEC_U64_HI 1 + ++static ASM_FUNC_ATTR_INLINE vector2x_u64 ++asm_vec_u64_load_le(unsigned long offset, const void *ptr) ++{ ++ vector2x_u64 vecu64; ++#if __GNUC__ >= 4 ++ if (__builtin_constant_p (offset) && offset == 0) ++ __asm__ volatile ("lxvd2x %x0,0,%1\n\t" ++ : "=wa" (vecu64) ++ : "r" ((uintptr_t)ptr) ++ : "memory"); ++ else ++#endif ++ __asm__ volatile ("lxvd2x %x0,%1,%2\n\t" ++ : "=wa" (vecu64) ++ : "r" (offset), "r" ((uintptr_t)ptr) ++ : "memory", "r0"); ++ return asm_swap_u64(vecu64); ++} ++ + static ASM_FUNC_ATTR_INLINE vector2x_u64 + asm_vec_u64_load_be(unsigned int offset, const void *ptr) + { +diff --git a/cipher/sha512-ppc.c b/cipher/sha512-ppc.c +index a758e1ea..31ea25bf 100644 +--- a/cipher/sha512-ppc.c ++++ b/cipher/sha512-ppc.c +@@ -115,14 +115,62 @@ vec_merge_idx0_elems(vector2x_u64 v0, vector2x_u64 v1) + static ASM_FUNC_ATTR_INLINE vector2x_u64 + vec_vshasigma_u64(vector2x_u64 v, unsigned int a, unsigned int b) + { +- asm ("vshasigmad %0,%1,%2,%3" +- : "=v" (v) +- : "v" (v), "g" (a), "g" (b) +- : "memory"); ++ __asm__ ("vshasigmad %0,%1,%2,%3" ++ : "=v" (v) ++ : "v" (v), "g" (a), "g" (b) ++ : "memory"); + return v; + } + + ++static ASM_FUNC_ATTR_INLINE vector2x_u64 ++vec_u64_load(unsigned long offset, const void *ptr) ++{ ++ vector2x_u64 vecu64; ++#if __GNUC__ >= 4 ++ if (__builtin_constant_p (offset) && offset == 0) ++ __asm__ ("lxvd2x %x0,0,%1\n\t" ++ : "=wa" (vecu64) ++ : "r" ((uintptr_t)ptr) ++ : "memory"); ++ else ++#endif ++ __asm__ ("lxvd2x %x0,%1,%2\n\t" ++ : "=wa" (vecu64) ++ : "r" (offset), "r" ((uintptr_t)ptr) ++ : "memory", "r0"); ++#ifndef WORDS_BIGENDIAN ++ __asm__ ("xxswapd %x0, %x1" ++ : "=wa" (vecu64) ++ : "wa" (vecu64)); ++#endif ++ return vecu64; ++} ++ ++ ++static ASM_FUNC_ATTR_INLINE void ++vec_u64_store(vector2x_u64 vecu64, unsigned long offset, void *ptr) ++{ ++#ifndef WORDS_BIGENDIAN ++ __asm__ ("xxswapd %x0, %x1" ++ : "=wa" (vecu64) ++ : "wa" (vecu64)); ++#endif ++#if __GNUC__ >= 4 ++ if (__builtin_constant_p (offset) && offset == 0) ++ __asm__ ("stxvd2x %x0,0,%1\n\t" ++ : ++ : "wa" (vecu64), "r" ((uintptr_t)ptr) ++ : "memory"); ++ else ++#endif ++ __asm__ ("stxvd2x %x0,%1,%2\n\t" ++ : ++ : "wa" (vecu64), "r" (offset), "r" ((uintptr_t)ptr) ++ : "memory", "r0"); ++} ++ ++ + /* SHA2 round in vector registers */ + #define R(a,b,c,d,e,f,g,h,k,w) do \ + { \ +@@ -168,13 +216,13 @@ _gcry_sha512_transform_ppc8(u64 state[8], + vector2x_u64 a, b, c, d, e, f, g, h, t1, t2; + u64 w[16]; + +- h0 = vec_vsx_ld (8 * 0, (unsigned long long *)state); ++ h0 = vec_u64_load (8 * 0, (unsigned long long *)state); + h1 = vec_rol_elems (h0, 1); +- h2 = vec_vsx_ld (8 * 2, (unsigned long long *)state); ++ h2 = vec_u64_load (8 * 2, (unsigned long long *)state); + h3 = vec_rol_elems (h2, 1); +- h4 = vec_vsx_ld (8 * 4, (unsigned long long *)state); ++ h4 = vec_u64_load (8 * 4, (unsigned long long *)state); + h5 = vec_rol_elems (h4, 1); +- h6 = vec_vsx_ld (8 * 6, (unsigned long long *)state); ++ h6 = vec_u64_load (8 * 6, (unsigned long long *)state); + h7 = vec_rol_elems (h6, 1); + + while (nblks >= 2) +@@ -514,10 +562,10 @@ _gcry_sha512_transform_ppc8(u64 state[8], + h2 = vec_merge_idx0_elems (h2, h3); + h4 = vec_merge_idx0_elems (h4, h5); + h6 = vec_merge_idx0_elems (h6, h7); +- vec_vsx_st (h0, 8 * 0, (unsigned long long *)state); +- vec_vsx_st (h2, 8 * 2, (unsigned long long *)state); +- vec_vsx_st (h4, 8 * 4, (unsigned long long *)state); +- vec_vsx_st (h6, 8 * 6, (unsigned long long *)state); ++ vec_u64_store (h0, 8 * 0, (unsigned long long *)state); ++ vec_u64_store (h2, 8 * 2, (unsigned long long *)state); ++ vec_u64_store (h4, 8 * 4, (unsigned long long *)state); ++ vec_u64_store (h6, 8 * 6, (unsigned long long *)state); + + return sizeof(w); + } +diff --git a/configure.ac b/configure.ac +index b6b6455a..be35ce42 100644 +--- a/configure.ac ++++ b/configure.ac +@@ -1745,10 +1745,12 @@ AC_CACHE_CHECK([whether compiler supports PowerPC AltiVec/VSX intrinsics], + AC_COMPILE_IFELSE([AC_LANG_SOURCE( + [[#include + typedef vector unsigned char block; ++ typedef vector unsigned int vecu32; + block fn(block in) + { + block t = vec_perm (in, in, vec_vsx_ld (0, (unsigned char*)0)); +- return vec_cipher_be (t, in); ++ vecu32 y = vec_vsx_ld (0, (unsigned int*)0); ++ return vec_cipher_be (t, in) ^ (block)y; + } + ]])], + [gcry_cv_cc_ppc_altivec=yes]) +@@ -1769,10 +1771,12 @@ if test "$gcry_cv_cc_ppc_altivec" = "no" && + AC_COMPILE_IFELSE([AC_LANG_SOURCE( + [[#include + typedef vector unsigned char block; ++ typedef vector unsigned int vecu32; + block fn(block in) + { + block t = vec_perm (in, in, vec_vsx_ld (0, (unsigned char*)0)); +- return vec_cipher_be (t, in); ++ vecu32 y = vec_vsx_ld (0, (unsigned int*)0); ++ return vec_cipher_be (t, in) ^ (block)y; + }]])], + [gcry_cv_cc_ppc_altivec_cflags=yes])]) + if test "$gcry_cv_cc_ppc_altivec_cflags" = "yes" ; then + +diff --git a/configure.ac b/configure.ac +index 202ac888..fd447906 100644 +--- a/configure.ac ++++ b/configure.ac +@@ -2562,13 +2562,13 @@ if test "$found" = "1" ; then + GCRYPT_DIGESTS="$GCRYPT_DIGESTS crc-intel-pclmul.lo" + ;; + powerpc64le-*-*) +- GCRYPT_CIPHERS="$GCRYPT_CIPHERS crc-ppc.lo" ++ GCRYPT_DIGESTS="$GCRYPT_DIGESTS crc-ppc.lo" + ;; + powerpc64-*-*) +- GCRYPT_CIPHERS="$GCRYPT_CIPHERS crc-ppc.lo" ++ GCRYPT_DIGESTS="$GCRYPT_DIGESTS crc-ppc.lo" + ;; + powerpc-*-*) +- GCRYPT_CIPHERS="$GCRYPT_CIPHERS crc-ppc.lo" ++ GCRYPT_DIGESTS="$GCRYPT_DIGESTS crc-ppc.lo" + ;; + esac + fi +@@ -2635,17 +2635,17 @@ if test "$found" = "1" ; then + ;; + powerpc64le-*-*) + # Build with the crypto extension implementation +- GCRYPT_CIPHERS="$GCRYPT_CIPHERS sha256-ppc.lo" ++ GCRYPT_DIGESTS="$GCRYPT_DIGESTS sha256-ppc.lo" + ;; + powerpc64-*-*) + # Big-Endian. + # Build with the crypto extension implementation +- GCRYPT_CIPHERS="$GCRYPT_CIPHERS sha256-ppc.lo" ++ GCRYPT_DIGESTS="$GCRYPT_DIGESTS sha256-ppc.lo" + ;; + powerpc-*-*) + # Big-Endian. + # Build with the crypto extension implementation +- GCRYPT_CIPHERS="$GCRYPT_CIPHERS sha256-ppc.lo" ++ GCRYPT_DIGESTS="$GCRYPT_DIGESTS sha256-ppc.lo" + esac + fi + +@@ -2667,17 +2667,17 @@ if test "$found" = "1" ; then + ;; + powerpc64le-*-*) + # Build with the crypto extension implementation +- GCRYPT_CIPHERS="$GCRYPT_CIPHERS sha512-ppc.lo" ++ GCRYPT_DIGESTS="$GCRYPT_DIGESTS sha512-ppc.lo" + ;; + powerpc64-*-*) + # Big-Endian. + # Build with the crypto extension implementation +- GCRYPT_CIPHERS="$GCRYPT_CIPHERS sha512-ppc.lo" ++ GCRYPT_DIGESTS="$GCRYPT_DIGESTS sha512-ppc.lo" + ;; + powerpc-*-*) + # Big-Endian. + # Build with the crypto extension implementation +- GCRYPT_CIPHERS="$GCRYPT_CIPHERS sha512-ppc.lo" ++ GCRYPT_DIGESTS="$GCRYPT_DIGESTS sha512-ppc.lo" + esac + + if test x"$neonsupport" = xyes ; then diff --git a/SOURCES/libgcrypt-1.8.5-ppc-crc32.patch b/SOURCES/libgcrypt-1.8.5-ppc-crc32.patch new file mode 100644 index 0000000..16baed6 --- /dev/null +++ b/SOURCES/libgcrypt-1.8.5-ppc-crc32.patch @@ -0,0 +1,794 @@ +diff --git a/cipher/Makefile.am b/cipher/Makefile.am +index cb41c251..1728e9f9 100644 +--- a/cipher/Makefile.am ++++ b/cipher/Makefile.am +@@ -67,7 +67,7 @@ cast5.c cast5-amd64.S cast5-arm.S \ + chacha20.c chacha20-sse2-amd64.S chacha20-ssse3-amd64.S chacha20-avx2-amd64.S \ + chacha20-armv7-neon.S \ + crc.c \ +- crc-intel-pclmul.c \ ++ crc-intel-pclmul.c crc-ppc.c \ + des.c des-amd64.S \ + dsa.c \ + elgamal.c \ +@@ -159,3 +159,9 @@ sha512-ppc.o: $(srcdir)/sha512-ppc.c Makefile + + sha512-ppc.lo: $(srcdir)/sha512-ppc.c Makefile + `echo $(LTCOMPILE) $(ppc_vcrypto_cflags) -c $< ` ++ ++crc-ppc.o: $(srcdir)/crc-ppc.c Makefile ++ `echo $(COMPILE) $(ppc_vcrypto_cflags) -c $< ` ++ ++crc-ppc.lo: $(srcdir)/crc-ppc.c Makefile ++ `echo $(LTCOMPILE) $(ppc_vcrypto_cflags) -c $< ` +diff --git a/cipher/crc-ppc.c b/cipher/crc-ppc.c +new file mode 100644 +index 00000000..4d7f0add +--- /dev/null ++++ b/cipher/crc-ppc.c +@@ -0,0 +1,619 @@ ++/* crc-ppc.c - POWER8 vpmsum accelerated CRC implementation ++ * Copyright (C) 2019-2020 Jussi Kivilinna ++ * ++ * This file is part of Libgcrypt. ++ * ++ * Libgcrypt is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU Lesser General Public License as ++ * published by the Free Software Foundation; either version 2.1 of ++ * the License, or (at your option) any later version. ++ * ++ * Libgcrypt is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU Lesser General Public License for more details. ++ * ++ * You should have received a copy of the GNU Lesser General Public ++ * License along with this program; if not, write to the Free Software ++ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA ++ * ++ */ ++ ++#include ++#include ++#include ++#include ++ ++#include "g10lib.h" ++ ++#include "bithelp.h" ++#include "bufhelp.h" ++ ++ ++#if defined(ENABLE_PPC_CRYPTO_SUPPORT) && \ ++ defined(HAVE_COMPATIBLE_CC_PPC_ALTIVEC) && \ ++ defined(HAVE_GCC_INLINE_ASM_PPC_ALTIVEC) && \ ++ __GNUC__ >= 4 ++ ++#include ++#include "bufhelp.h" ++ ++ ++#define ALWAYS_INLINE inline __attribute__((always_inline)) ++#define NO_INLINE __attribute__((noinline)) ++#define NO_INSTRUMENT_FUNCTION __attribute__((no_instrument_function)) ++ ++#define ASM_FUNC_ATTR NO_INSTRUMENT_FUNCTION ++#define ASM_FUNC_ATTR_INLINE ASM_FUNC_ATTR ALWAYS_INLINE ++#define ASM_FUNC_ATTR_NOINLINE ASM_FUNC_ATTR NO_INLINE ++ ++#define ALIGNED_64 __attribute__ ((aligned (64))) ++ ++ ++typedef vector unsigned char vector16x_u8; ++typedef vector unsigned int vector4x_u32; ++typedef vector unsigned long long vector2x_u64; ++ ++ ++/* Constants structure for generic reflected/non-reflected CRC32 PMULL ++ * functions. */ ++struct crc32_consts_s ++{ ++ /* k: { x^(32*17), x^(32*15), x^(32*5), x^(32*3), x^(32*2), 0 } mod P(x) */ ++ unsigned long long k[6]; ++ /* my_p: { floor(x^64 / P(x)), P(x) } */ ++ unsigned long long my_p[2]; ++}; ++ ++/* PMULL constants for CRC32 and CRC32RFC1510. */ ++static const struct crc32_consts_s crc32_consts ALIGNED_64 = ++{ ++ { /* k[6] = reverse_33bits( x^(32*y) mod P(x) ) */ ++ U64_C(0x154442bd4), U64_C(0x1c6e41596), /* y = { 17, 15 } */ ++ U64_C(0x1751997d0), U64_C(0x0ccaa009e), /* y = { 5, 3 } */ ++ U64_C(0x163cd6124), 0 /* y = 2 */ ++ }, ++ { /* my_p[2] = reverse_33bits ( { floor(x^64 / P(x)), P(x) } ) */ ++ U64_C(0x1f7011641), U64_C(0x1db710641) ++ } ++}; ++ ++/* PMULL constants for CRC24RFC2440 (polynomial multiplied with x⁸). */ ++static const struct crc32_consts_s crc24rfc2440_consts ALIGNED_64 = ++{ ++ { /* k[6] = x^(32*y) mod P(x) << 32*/ ++ U64_C(0x08289a00) << 32, U64_C(0x74b44a00) << 32, /* y = { 17, 15 } */ ++ U64_C(0xc4b14d00) << 32, U64_C(0xfd7e0c00) << 32, /* y = { 5, 3 } */ ++ U64_C(0xd9fe8c00) << 32, 0 /* y = 2 */ ++ }, ++ { /* my_p[2] = { floor(x^64 / P(x)), P(x) } */ ++ U64_C(0x1f845fe24), U64_C(0x1864cfb00) ++ } ++}; ++ ++ ++static ASM_FUNC_ATTR_INLINE vector2x_u64 ++asm_vpmsumd(vector2x_u64 a, vector2x_u64 b) ++{ ++ __asm__("vpmsumd %0, %1, %2" ++ : "=v" (a) ++ : "v" (a), "v" (b)); ++ return a; ++} ++ ++ ++static ASM_FUNC_ATTR_INLINE vector2x_u64 ++asm_swap_u64(vector2x_u64 a) ++{ ++ __asm__("xxswapd %x0, %x1" ++ : "=wa" (a) ++ : "wa" (a)); ++ return a; ++} ++ ++ ++static ASM_FUNC_ATTR_INLINE vector4x_u32 ++vec_sld_u32(vector4x_u32 a, vector4x_u32 b, unsigned int idx) ++{ ++ return vec_sld (a, b, (4 * idx) & 15); ++} ++ ++ ++static const byte crc32_partial_fold_input_mask[16 + 16] ALIGNED_64 = ++ { ++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, ++ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, ++ }; ++static const byte crc32_shuf_shift[3 * 16] ALIGNED_64 = ++ { ++ 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, ++ 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, ++ 0x0f, 0x0e, 0x0d, 0x0c, 0x0b, 0x0a, 0x09, 0x08, ++ 0x07, 0x06, 0x05, 0x04, 0x03, 0x02, 0x01, 0x00, ++ 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, ++ 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, ++ }; ++static const byte crc32_refl_shuf_shift[3 * 16] ALIGNED_64 = ++ { ++ 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, ++ 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, ++ 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, ++ 0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f, ++ 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, ++ 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, ++ }; ++static const vector16x_u8 bswap_const ALIGNED_64 = ++ { 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0 }; ++ ++ ++#define CRC_VEC_SWAP(v) ({ vector2x_u64 __vecu64 = (v); \ ++ vec_perm(__vecu64, __vecu64, bswap_const); }) ++ ++#ifdef WORDS_BIGENDIAN ++# define CRC_VEC_U64_DEF(lo, hi) { (hi), (lo) } ++# define CRC_VEC_U64_LOAD(offs, ptr) \ ++ asm_swap_u64(vec_vsx_ld((offs), (const unsigned long long *)(ptr))) ++# define CRC_VEC_U64_LOAD_LE(offs, ptr) \ ++ CRC_VEC_SWAP(vec_vsx_ld((offs), (const unsigned long long *)(ptr))) ++# define CRC_VEC_U64_LOAD_BE(offs, ptr) \ ++ vec_vsx_ld((offs), (const unsigned long long *)(ptr)) ++# define CRC_VEC_SWAP_TO_LE(v) CRC_VEC_SWAP(v) ++# define CRC_VEC_SWAP_TO_BE(v) (v) ++# define VEC_U64_LO 1 ++# define VEC_U64_HI 0 ++#else ++# define CRC_VEC_U64_DEF(lo, hi) { (lo), (hi) } ++# define CRC_VEC_U64_LOAD(offs, ptr) \ ++ vec_vsx_ld((offs), (const unsigned long long *)(ptr)) ++# define CRC_VEC_U64_LOAD_LE(offs, ptr) CRC_VEC_U64_LOAD((offs), (ptr)) ++# define CRC_VEC_U64_LOAD_BE(offs, ptr) asm_vec_u64_load_be(offs, ptr) ++# define CRC_VEC_SWAP_TO_LE(v) (v) ++# define CRC_VEC_SWAP_TO_BE(v) CRC_VEC_SWAP(v) ++# define VEC_U64_LO 0 ++# define VEC_U64_HI 1 ++ ++static ASM_FUNC_ATTR_INLINE vector2x_u64 ++asm_vec_u64_load_be(unsigned int offset, const void *ptr) ++{ ++ static const vector16x_u8 vec_load_le_const = ++ { ~7, ~6, ~5, ~4, ~3, ~2, ~1, ~0, ~15, ~14, ~13, ~12, ~11, ~10, ~9, ~8 }; ++ vector2x_u64 vecu64; ++ ++#if __GNUC__ >= 4 ++ if (__builtin_constant_p (offset) && offset == 0) ++ __asm__ ("lxvd2x %%vs32,0,%1\n\t" ++ "vperm %0,%%v0,%%v0,%2\n\t" ++ : "=v" (vecu64) ++ : "r" ((uintptr_t)(ptr)), "v" (vec_load_le_const) ++ : "memory", "v0"); ++#endif ++ else ++ __asm__ ("lxvd2x %%vs32,%1,%2\n\t" ++ "vperm %0,%%v0,%%v0,%3\n\t" ++ : "=v" (vecu64) ++ : "r" (offset), "r" ((uintptr_t)(ptr)), ++ "v" (vec_load_le_const) ++ : "memory", "r0", "v0"); ++ ++ return vecu64; ++} ++#endif ++ ++ ++static ASM_FUNC_ATTR_INLINE void ++crc32r_ppc8_ce_bulk (u32 *pcrc, const byte *inbuf, size_t inlen, ++ const struct crc32_consts_s *consts) ++{ ++ vector4x_u32 zero = { 0, 0, 0, 0 }; ++ vector2x_u64 low_64bit_mask = CRC_VEC_U64_DEF((u64)-1, 0); ++ vector2x_u64 low_32bit_mask = CRC_VEC_U64_DEF((u32)-1, 0); ++ vector2x_u64 my_p = CRC_VEC_U64_LOAD(0, &consts->my_p[0]); ++ vector2x_u64 k1k2 = CRC_VEC_U64_LOAD(0, &consts->k[1 - 1]); ++ vector2x_u64 k3k4 = CRC_VEC_U64_LOAD(0, &consts->k[3 - 1]); ++ vector2x_u64 k4lo = CRC_VEC_U64_DEF(k3k4[VEC_U64_HI], 0); ++ vector2x_u64 k5lo = CRC_VEC_U64_LOAD(0, &consts->k[5 - 1]); ++ vector2x_u64 crc = CRC_VEC_U64_DEF(*pcrc, 0); ++ vector2x_u64 crc0, crc1, crc2, crc3; ++ vector2x_u64 v0; ++ ++ if (inlen >= 8 * 16) ++ { ++ crc0 = CRC_VEC_U64_LOAD_LE(0 * 16, inbuf); ++ crc0 ^= crc; ++ crc1 = CRC_VEC_U64_LOAD_LE(1 * 16, inbuf); ++ crc2 = CRC_VEC_U64_LOAD_LE(2 * 16, inbuf); ++ crc3 = CRC_VEC_U64_LOAD_LE(3 * 16, inbuf); ++ ++ inbuf += 4 * 16; ++ inlen -= 4 * 16; ++ ++ /* Fold by 4. */ ++ while (inlen >= 4 * 16) ++ { ++ v0 = CRC_VEC_U64_LOAD_LE(0 * 16, inbuf); ++ crc0 = asm_vpmsumd(crc0, k1k2) ^ v0; ++ ++ v0 = CRC_VEC_U64_LOAD_LE(1 * 16, inbuf); ++ crc1 = asm_vpmsumd(crc1, k1k2) ^ v0; ++ ++ v0 = CRC_VEC_U64_LOAD_LE(2 * 16, inbuf); ++ crc2 = asm_vpmsumd(crc2, k1k2) ^ v0; ++ ++ v0 = CRC_VEC_U64_LOAD_LE(3 * 16, inbuf); ++ crc3 = asm_vpmsumd(crc3, k1k2) ^ v0; ++ ++ inbuf += 4 * 16; ++ inlen -= 4 * 16; ++ } ++ ++ /* Fold 4 to 1. */ ++ crc1 ^= asm_vpmsumd(crc0, k3k4); ++ crc2 ^= asm_vpmsumd(crc1, k3k4); ++ crc3 ^= asm_vpmsumd(crc2, k3k4); ++ crc = crc3; ++ } ++ else ++ { ++ v0 = CRC_VEC_U64_LOAD_LE(0, inbuf); ++ crc ^= v0; ++ ++ inbuf += 16; ++ inlen -= 16; ++ } ++ ++ /* Fold by 1. */ ++ while (inlen >= 16) ++ { ++ v0 = CRC_VEC_U64_LOAD_LE(0, inbuf); ++ crc = asm_vpmsumd(k3k4, crc); ++ crc ^= v0; ++ ++ inbuf += 16; ++ inlen -= 16; ++ } ++ ++ /* Partial fold. */ ++ if (inlen) ++ { ++ /* Load last input and add padding zeros. */ ++ vector2x_u64 mask = CRC_VEC_U64_LOAD_LE(inlen, crc32_partial_fold_input_mask); ++ vector2x_u64 shl_shuf = CRC_VEC_U64_LOAD_LE(inlen, crc32_refl_shuf_shift); ++ vector2x_u64 shr_shuf = CRC_VEC_U64_LOAD_LE(inlen + 16, crc32_refl_shuf_shift); ++ ++ v0 = CRC_VEC_U64_LOAD_LE(inlen - 16, inbuf); ++ v0 &= mask; ++ ++ crc = CRC_VEC_SWAP_TO_LE(crc); ++ v0 |= (vector2x_u64)vec_perm((vector16x_u8)crc, (vector16x_u8)zero, ++ (vector16x_u8)shr_shuf); ++ crc = (vector2x_u64)vec_perm((vector16x_u8)crc, (vector16x_u8)zero, ++ (vector16x_u8)shl_shuf); ++ crc = asm_vpmsumd(k3k4, crc); ++ crc ^= v0; ++ ++ inbuf += inlen; ++ inlen -= inlen; ++ } ++ ++ /* Final fold. */ ++ ++ /* reduce 128-bits to 96-bits */ ++ v0 = asm_swap_u64(crc); ++ v0 &= low_64bit_mask; ++ crc = asm_vpmsumd(k4lo, crc); ++ crc ^= v0; ++ ++ /* reduce 96-bits to 64-bits */ ++ v0 = (vector2x_u64)vec_sld_u32((vector4x_u32)crc, ++ (vector4x_u32)crc, 3); /* [x0][x3][x2][x1] */ ++ v0 &= low_64bit_mask; /* [00][00][x2][x1] */ ++ crc = crc & low_32bit_mask; /* [00][00][00][x0] */ ++ crc = v0 ^ asm_vpmsumd(k5lo, crc); /* [00][00][xx][xx] */ ++ ++ /* barrett reduction */ ++ v0 = crc << 32; /* [00][00][x0][00] */ ++ v0 = asm_vpmsumd(my_p, v0); ++ v0 = asm_swap_u64(v0); ++ v0 = asm_vpmsumd(my_p, v0); ++ crc = (vector2x_u64)vec_sld_u32((vector4x_u32)crc, ++ zero, 1); /* [00][x1][x0][00] */ ++ crc ^= v0; ++ ++ *pcrc = (u32)crc[VEC_U64_HI]; ++} ++ ++ ++static ASM_FUNC_ATTR_INLINE u32 ++crc32r_ppc8_ce_reduction_4 (u32 data, u32 crc, ++ const struct crc32_consts_s *consts) ++{ ++ vector4x_u32 zero = { 0, 0, 0, 0 }; ++ vector2x_u64 my_p = CRC_VEC_U64_LOAD(0, &consts->my_p[0]); ++ vector2x_u64 v0 = CRC_VEC_U64_DEF((u64)data, 0); ++ v0 = asm_vpmsumd(v0, my_p); /* [00][00][xx][xx] */ ++ v0 = (vector2x_u64)vec_sld_u32((vector4x_u32)v0, ++ zero, 3); /* [x0][00][00][00] */ ++ v0 = (vector2x_u64)vec_sld_u32((vector4x_u32)v0, ++ (vector4x_u32)v0, 3); /* [00][x0][00][00] */ ++ v0 = asm_vpmsumd(v0, my_p); /* [00][00][xx][xx] */ ++ return (v0[VEC_U64_LO] >> 32) ^ crc; ++} ++ ++ ++static ASM_FUNC_ATTR_INLINE void ++crc32r_less_than_16 (u32 *pcrc, const byte *inbuf, size_t inlen, ++ const struct crc32_consts_s *consts) ++{ ++ u32 crc = *pcrc; ++ u32 data; ++ ++ while (inlen >= 4) ++ { ++ data = buf_get_le32(inbuf); ++ data ^= crc; ++ ++ inlen -= 4; ++ inbuf += 4; ++ ++ crc = crc32r_ppc8_ce_reduction_4 (data, 0, consts); ++ } ++ ++ switch (inlen) ++ { ++ case 0: ++ break; ++ case 1: ++ data = inbuf[0]; ++ data ^= crc; ++ data <<= 24; ++ crc >>= 8; ++ crc = crc32r_ppc8_ce_reduction_4 (data, crc, consts); ++ break; ++ case 2: ++ data = inbuf[0] << 0; ++ data |= inbuf[1] << 8; ++ data ^= crc; ++ data <<= 16; ++ crc >>= 16; ++ crc = crc32r_ppc8_ce_reduction_4 (data, crc, consts); ++ break; ++ case 3: ++ data = inbuf[0] << 0; ++ data |= inbuf[1] << 8; ++ data |= inbuf[2] << 16; ++ data ^= crc; ++ data <<= 8; ++ crc >>= 24; ++ crc = crc32r_ppc8_ce_reduction_4 (data, crc, consts); ++ break; ++ } ++ ++ *pcrc = crc; ++} ++ ++ ++static ASM_FUNC_ATTR_INLINE void ++crc32_ppc8_ce_bulk (u32 *pcrc, const byte *inbuf, size_t inlen, ++ const struct crc32_consts_s *consts) ++{ ++ vector4x_u32 zero = { 0, 0, 0, 0 }; ++ vector2x_u64 low_96bit_mask = CRC_VEC_U64_DEF(~0, ~((u64)(u32)-1 << 32)); ++ vector2x_u64 p_my = asm_swap_u64(CRC_VEC_U64_LOAD(0, &consts->my_p[0])); ++ vector2x_u64 p_my_lo, p_my_hi; ++ vector2x_u64 k2k1 = asm_swap_u64(CRC_VEC_U64_LOAD(0, &consts->k[1 - 1])); ++ vector2x_u64 k4k3 = asm_swap_u64(CRC_VEC_U64_LOAD(0, &consts->k[3 - 1])); ++ vector2x_u64 k4hi = CRC_VEC_U64_DEF(0, consts->k[4 - 1]); ++ vector2x_u64 k5hi = CRC_VEC_U64_DEF(0, consts->k[5 - 1]); ++ vector2x_u64 crc = CRC_VEC_U64_DEF(0, _gcry_bswap64(*pcrc)); ++ vector2x_u64 crc0, crc1, crc2, crc3; ++ vector2x_u64 v0; ++ ++ if (inlen >= 8 * 16) ++ { ++ crc0 = CRC_VEC_U64_LOAD_BE(0 * 16, inbuf); ++ crc0 ^= crc; ++ crc1 = CRC_VEC_U64_LOAD_BE(1 * 16, inbuf); ++ crc2 = CRC_VEC_U64_LOAD_BE(2 * 16, inbuf); ++ crc3 = CRC_VEC_U64_LOAD_BE(3 * 16, inbuf); ++ ++ inbuf += 4 * 16; ++ inlen -= 4 * 16; ++ ++ /* Fold by 4. */ ++ while (inlen >= 4 * 16) ++ { ++ v0 = CRC_VEC_U64_LOAD_BE(0 * 16, inbuf); ++ crc0 = asm_vpmsumd(crc0, k2k1) ^ v0; ++ ++ v0 = CRC_VEC_U64_LOAD_BE(1 * 16, inbuf); ++ crc1 = asm_vpmsumd(crc1, k2k1) ^ v0; ++ ++ v0 = CRC_VEC_U64_LOAD_BE(2 * 16, inbuf); ++ crc2 = asm_vpmsumd(crc2, k2k1) ^ v0; ++ ++ v0 = CRC_VEC_U64_LOAD_BE(3 * 16, inbuf); ++ crc3 = asm_vpmsumd(crc3, k2k1) ^ v0; ++ ++ inbuf += 4 * 16; ++ inlen -= 4 * 16; ++ } ++ ++ /* Fold 4 to 1. */ ++ crc1 ^= asm_vpmsumd(crc0, k4k3); ++ crc2 ^= asm_vpmsumd(crc1, k4k3); ++ crc3 ^= asm_vpmsumd(crc2, k4k3); ++ crc = crc3; ++ } ++ else ++ { ++ v0 = CRC_VEC_U64_LOAD_BE(0, inbuf); ++ crc ^= v0; ++ ++ inbuf += 16; ++ inlen -= 16; ++ } ++ ++ /* Fold by 1. */ ++ while (inlen >= 16) ++ { ++ v0 = CRC_VEC_U64_LOAD_BE(0, inbuf); ++ crc = asm_vpmsumd(k4k3, crc); ++ crc ^= v0; ++ ++ inbuf += 16; ++ inlen -= 16; ++ } ++ ++ /* Partial fold. */ ++ if (inlen) ++ { ++ /* Load last input and add padding zeros. */ ++ vector2x_u64 mask = CRC_VEC_U64_LOAD_LE(inlen, crc32_partial_fold_input_mask); ++ vector2x_u64 shl_shuf = CRC_VEC_U64_LOAD_LE(32 - inlen, crc32_refl_shuf_shift); ++ vector2x_u64 shr_shuf = CRC_VEC_U64_LOAD_LE(inlen + 16, crc32_shuf_shift); ++ ++ v0 = CRC_VEC_U64_LOAD_LE(inlen - 16, inbuf); ++ v0 &= mask; ++ ++ crc = CRC_VEC_SWAP_TO_LE(crc); ++ crc2 = (vector2x_u64)vec_perm((vector16x_u8)crc, (vector16x_u8)zero, ++ (vector16x_u8)shr_shuf); ++ v0 |= crc2; ++ v0 = CRC_VEC_SWAP(v0); ++ crc = (vector2x_u64)vec_perm((vector16x_u8)crc, (vector16x_u8)zero, ++ (vector16x_u8)shl_shuf); ++ crc = asm_vpmsumd(k4k3, crc); ++ crc ^= v0; ++ ++ inbuf += inlen; ++ inlen -= inlen; ++ } ++ ++ /* Final fold. */ ++ ++ /* reduce 128-bits to 96-bits */ ++ v0 = (vector2x_u64)vec_sld_u32((vector4x_u32)crc, ++ (vector4x_u32)zero, 2); ++ crc = asm_vpmsumd(k4hi, crc); ++ crc ^= v0; /* bottom 32-bit are zero */ ++ ++ /* reduce 96-bits to 64-bits */ ++ v0 = crc & low_96bit_mask; /* [00][x2][x1][00] */ ++ crc >>= 32; /* [00][x3][00][x0] */ ++ crc = asm_vpmsumd(k5hi, crc); /* [00][xx][xx][00] */ ++ crc ^= v0; /* top and bottom 32-bit are zero */ ++ ++ /* barrett reduction */ ++ p_my_hi = p_my; ++ p_my_lo = p_my; ++ p_my_hi[VEC_U64_LO] = 0; ++ p_my_lo[VEC_U64_HI] = 0; ++ v0 = crc >> 32; /* [00][00][00][x1] */ ++ crc = asm_vpmsumd(p_my_hi, crc); /* [00][xx][xx][xx] */ ++ crc = (vector2x_u64)vec_sld_u32((vector4x_u32)crc, ++ (vector4x_u32)crc, 3); /* [x0][00][x2][x1] */ ++ crc = asm_vpmsumd(p_my_lo, crc); /* [00][xx][xx][xx] */ ++ crc ^= v0; ++ ++ *pcrc = _gcry_bswap32(crc[VEC_U64_LO]); ++} ++ ++ ++static ASM_FUNC_ATTR_INLINE u32 ++crc32_ppc8_ce_reduction_4 (u32 data, u32 crc, ++ const struct crc32_consts_s *consts) ++{ ++ vector2x_u64 my_p = CRC_VEC_U64_LOAD(0, &consts->my_p[0]); ++ vector2x_u64 v0 = CRC_VEC_U64_DEF((u64)data << 32, 0); ++ v0 = asm_vpmsumd(v0, my_p); /* [00][x1][x0][00] */ ++ v0[VEC_U64_LO] = 0; /* [00][x1][00][00] */ ++ v0 = asm_vpmsumd(v0, my_p); /* [00][00][xx][xx] */ ++ return _gcry_bswap32(v0[VEC_U64_LO]) ^ crc; ++} ++ ++ ++static ASM_FUNC_ATTR_INLINE void ++crc32_less_than_16 (u32 *pcrc, const byte *inbuf, size_t inlen, ++ const struct crc32_consts_s *consts) ++{ ++ u32 crc = *pcrc; ++ u32 data; ++ ++ while (inlen >= 4) ++ { ++ data = buf_get_le32(inbuf); ++ data ^= crc; ++ data = _gcry_bswap32(data); ++ ++ inlen -= 4; ++ inbuf += 4; ++ ++ crc = crc32_ppc8_ce_reduction_4 (data, 0, consts); ++ } ++ ++ switch (inlen) ++ { ++ case 0: ++ break; ++ case 1: ++ data = inbuf[0]; ++ data ^= crc; ++ data = data & 0xffU; ++ crc = crc >> 8; ++ crc = crc32_ppc8_ce_reduction_4 (data, crc, consts); ++ break; ++ case 2: ++ data = inbuf[0] << 0; ++ data |= inbuf[1] << 8; ++ data ^= crc; ++ data = _gcry_bswap32(data << 16); ++ crc = crc >> 16; ++ crc = crc32_ppc8_ce_reduction_4 (data, crc, consts); ++ break; ++ case 3: ++ data = inbuf[0] << 0; ++ data |= inbuf[1] << 8; ++ data |= inbuf[2] << 16; ++ data ^= crc; ++ data = _gcry_bswap32(data << 8); ++ crc = crc >> 24; ++ crc = crc32_ppc8_ce_reduction_4 (data, crc, consts); ++ break; ++ } ++ ++ *pcrc = crc; ++} ++ ++void ASM_FUNC_ATTR ++_gcry_crc32_ppc8_vpmsum (u32 *pcrc, const byte *inbuf, size_t inlen) ++{ ++ const struct crc32_consts_s *consts = &crc32_consts; ++ ++ if (!inlen) ++ return; ++ ++ if (inlen >= 16) ++ crc32r_ppc8_ce_bulk (pcrc, inbuf, inlen, consts); ++ else ++ crc32r_less_than_16 (pcrc, inbuf, inlen, consts); ++} ++ ++void ASM_FUNC_ATTR ++_gcry_crc24rfc2440_ppc8_vpmsum (u32 *pcrc, const byte *inbuf, size_t inlen) ++{ ++ const struct crc32_consts_s *consts = &crc24rfc2440_consts; ++ ++ if (!inlen) ++ return; ++ ++ /* Note: *pcrc in input endian. */ ++ ++ if (inlen >= 16) ++ crc32_ppc8_ce_bulk (pcrc, inbuf, inlen, consts); ++ else ++ crc32_less_than_16 (pcrc, inbuf, inlen, consts); ++} ++ ++#endif +diff --git a/cipher/crc.c b/cipher/crc.c +index a1ce50b6..bbb159ce 100644 +--- a/cipher/crc.c ++++ b/cipher/crc.c +@@ -43,11 +43,27 @@ + #endif /* USE_INTEL_PCLMUL */ + + ++/* USE_PPC_VPMSUM indicates whether to enable PowerPC vector ++ * accelerated code. */ ++#undef USE_PPC_VPMSUM ++#ifdef ENABLE_PPC_CRYPTO_SUPPORT ++# if defined(HAVE_COMPATIBLE_CC_PPC_ALTIVEC) && \ ++ defined(HAVE_GCC_INLINE_ASM_PPC_ALTIVEC) ++# if __GNUC__ >= 4 ++# define USE_PPC_VPMSUM 1 ++# endif ++# endif ++#endif /* USE_PPC_VPMSUM */ ++ ++ + typedef struct + { + u32 CRC; + #ifdef USE_INTEL_PCLMUL + unsigned int use_pclmul:1; /* Intel PCLMUL shall be used. */ ++#endif ++#ifdef USE_PPC_VPMSUM ++ unsigned int use_vpmsum:1; /* POWER vpmsum shall be used. */ + #endif + byte buf[4]; + } +@@ -61,6 +77,20 @@ void _gcry_crc24rfc2440_intel_pclmul (u32 *pcrc, const byte *inbuf, + size_t inlen); + #endif + ++#ifdef USE_ARM_PMULL ++/*-- crc-armv8-ce.c --*/ ++void _gcry_crc32_armv8_ce_pmull (u32 *pcrc, const byte *inbuf, size_t inlen); ++void _gcry_crc24rfc2440_armv8_ce_pmull (u32 *pcrc, const byte *inbuf, ++ size_t inlen); ++#endif ++ ++#ifdef USE_PPC_VPMSUM ++/*-- crc-ppc.c --*/ ++void _gcry_crc32_ppc8_vpmsum (u32 *pcrc, const byte *inbuf, size_t inlen); ++void _gcry_crc24rfc2440_ppc8_vpmsum (u32 *pcrc, const byte *inbuf, ++ size_t inlen); ++#endif ++ + + /* + * Code generated by universal_crc by Danjel McGougan +@@ -361,11 +391,13 @@ static void + crc32_init (void *context, unsigned int flags) + { + CRC_CONTEXT *ctx = (CRC_CONTEXT *) context; +-#ifdef USE_INTEL_PCLMUL + u32 hwf = _gcry_get_hw_features (); +- ++#ifdef USE_INTEL_PCLMUL + ctx->use_pclmul = (hwf & HWF_INTEL_SSE4_1) && (hwf & HWF_INTEL_PCLMUL); + #endif ++#ifdef USE_PPC_VPMSUM ++ ctx->use_vpmsum = !!(hwf & HWF_PPC_ARCH_2_07); ++#endif + + (void)flags; + +@@ -386,6 +418,13 @@ crc32_write (void *context, const void *inbuf_arg, size_t inlen) + return; + } + #endif ++#ifdef USE_PPC_VPMSUM ++ if (ctx->use_vpmsum) ++ { ++ _gcry_crc32_ppc8_vpmsum(&ctx->CRC, inbuf, inlen); ++ return; ++ } ++#endif + + if (!inbuf || !inlen) + return; +@@ -444,6 +483,10 @@ crc32rfc1510_init (void *context, unsigned int flags) + + ctx->use_pclmul = (hwf & HWF_INTEL_SSE4_1) && (hwf & HWF_INTEL_PCLMUL); + #endif ++#ifdef USE_PPC_VPMSUM ++ u32 hwf = _gcry_get_hw_features (); ++ ctx->use_vpmsum = !!(hwf & HWF_PPC_ARCH_2_07); ++#endif + + (void)flags; + +@@ -774,6 +817,10 @@ crc24rfc2440_init (void *context, unsigned int flags) + + ctx->use_pclmul = (hwf & HWF_INTEL_SSE4_1) && (hwf & HWF_INTEL_PCLMUL); + #endif ++#ifdef USE_PPC_VPMSUM ++ u32 hwf = _gcry_get_hw_features (); ++ ctx->use_vpmsum = !!(hwf & HWF_PPC_ARCH_2_07); ++#endif + + (void)flags; + +@@ -794,6 +841,13 @@ crc24rfc2440_write (void *context, const void *inbuf_arg, size_t inlen) + return; + } + #endif ++#ifdef USE_PPC_VPMSUM ++ if (ctx->use_vpmsum) ++ { ++ _gcry_crc24rfc2440_ppc8_vpmsum(&ctx->CRC, inbuf, inlen); ++ return; ++ } ++#endif + + if (!inbuf || !inlen) + return; +diff --git a/configure.ac b/configure.ac +index 953a20e9..b6b6455a 100644 +--- a/configure.ac ++++ b/configure.ac +@@ -1916,6 +1916,7 @@ AC_CACHE_CHECK([whether GCC inline assembler supports PowerPC AltiVec/VSX/crypto + "vadduwm %v0, %v1, %v22;\n" + "vshasigmaw %v0, %v1, 0, 15;\n" + "vshasigmad %v0, %v1, 0, 15;\n" ++ "vpmsumd %v11, %v11, %v11;\n" + ); + ]])], + [gcry_cv_gcc_inline_asm_ppc_altivec=yes]) +@@ -2556,6 +2557,15 @@ if test "$found" = "1" ; then + # Build with the assembly implementation + GCRYPT_DIGESTS="$GCRYPT_DIGESTS crc-intel-pclmul.lo" + ;; ++ powerpc64le-*-*) ++ GCRYPT_CIPHERS="$GCRYPT_CIPHERS crc-ppc.lo" ++ ;; ++ powerpc64-*-*) ++ GCRYPT_CIPHERS="$GCRYPT_CIPHERS crc-ppc.lo" ++ ;; ++ powerpc-*-*) ++ GCRYPT_CIPHERS="$GCRYPT_CIPHERS crc-ppc.lo" ++ ;; + esac + fi diff --git a/SOURCES/libgcrypt-1.8.5-ppc-sha2.patch b/SOURCES/libgcrypt-1.8.5-ppc-sha2.patch new file mode 100644 index 0000000..071a60a --- /dev/null +++ b/SOURCES/libgcrypt-1.8.5-ppc-sha2.patch @@ -0,0 +1,2138 @@ +diff --git a/cipher/Makefile.am b/cipher/Makefile.am +index 85a5b5fb..cb41c251 100644 +--- a/cipher/Makefile.am ++++ b/cipher/Makefile.am +@@ -94,9 +94,9 @@ serpent.c serpent-sse2-amd64.S serpent-avx2-amd64.S serpent-armv7-neon.S \ + sha1.c sha1-ssse3-amd64.S sha1-avx-amd64.S sha1-avx-bmi2-amd64.S \ + sha1-armv7-neon.S sha1-armv8-aarch32-ce.S sha1-armv8-aarch64-ce.S \ + sha256.c sha256-ssse3-amd64.S sha256-avx-amd64.S sha256-avx2-bmi2-amd64.S \ +- sha256-armv8-aarch32-ce.S sha256-armv8-aarch64-ce.S \ ++ sha256-armv8-aarch32-ce.S sha256-armv8-aarch64-ce.S sha256-ppc.c \ + sha512.c sha512-ssse3-amd64.S sha512-avx-amd64.S sha512-avx2-bmi2-amd64.S \ +- sha512-armv7-neon.S sha512-arm.S \ ++ sha512-armv7-neon.S sha512-arm.S sha512-ppc.c \ + keccak.c keccak_permute_32.h keccak_permute_64.h keccak-armv7-neon.S \ + stribog.c \ + tiger.c \ +@@ -148,4 +148,14 @@ rijndael-ppc9le.o: $(srcdir)/rijndael-ppc9le.c Makefile + rijndael-ppc9le.lo: $(srcdir)/rijndael-ppc9le.c Makefile + `echo $(LTCOMPILE) $(ppc_vcrypto_cflags) -c $< ` + ++sha256-ppc.o: $(srcdir)/sha256-ppc.c Makefile ++ `echo $(COMPILE) $(ppc_vcrypto_cflags) -c $< ` ++ ++sha256-ppc.lo: $(srcdir)/sha256-ppc.c Makefile ++ `echo $(LTCOMPILE) $(ppc_vcrypto_cflags) -c $< ` + ++sha512-ppc.o: $(srcdir)/sha512-ppc.c Makefile ++ `echo $(COMPILE) $(ppc_vcrypto_cflags) -c $< ` ++ ++sha512-ppc.lo: $(srcdir)/sha512-ppc.c Makefile ++ `echo $(LTCOMPILE) $(ppc_vcrypto_cflags) -c $< ` +diff --git a/cipher/sha256-ppc.c b/cipher/sha256-ppc.c +new file mode 100644 +index 00000000..a9b59714 +--- /dev/null ++++ b/cipher/sha256-ppc.c +@@ -0,0 +1,795 @@ ++/* sha256-ppc.c - PowerPC vcrypto implementation of SHA-256 transform ++ * Copyright (C) 2019 Jussi Kivilinna ++ * ++ * This file is part of Libgcrypt. ++ * ++ * Libgcrypt is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU Lesser General Public License as ++ * published by the Free Software Foundation; either version 2.1 of ++ * the License, or (at your option) any later version. ++ * ++ * Libgcrypt is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU Lesser General Public License for more details. ++ * ++ * You should have received a copy of the GNU Lesser General Public ++ * License along with this program; if not, see . ++ */ ++ ++#include ++ ++#if defined(ENABLE_PPC_CRYPTO_SUPPORT) && \ ++ defined(HAVE_COMPATIBLE_CC_PPC_ALTIVEC) && \ ++ defined(HAVE_GCC_INLINE_ASM_PPC_ALTIVEC) && \ ++ defined(USE_SHA256) && \ ++ __GNUC__ >= 4 ++ ++#include ++#include "bufhelp.h" ++ ++ ++typedef vector unsigned char vector16x_u8; ++typedef vector unsigned int vector4x_u32; ++typedef vector unsigned long long vector2x_u64; ++ ++ ++#define ALWAYS_INLINE inline __attribute__((always_inline)) ++#define NO_INLINE __attribute__((noinline)) ++#define NO_INSTRUMENT_FUNCTION __attribute__((no_instrument_function)) ++ ++#define ASM_FUNC_ATTR NO_INSTRUMENT_FUNCTION ++#define ASM_FUNC_ATTR_INLINE ASM_FUNC_ATTR ALWAYS_INLINE ++#define ASM_FUNC_ATTR_NOINLINE ASM_FUNC_ATTR NO_INLINE ++ ++ ++static const u32 K[64] = ++ { ++#define TBL(v) v ++ TBL(0x428a2f98), TBL(0x71374491), TBL(0xb5c0fbcf), TBL(0xe9b5dba5), ++ TBL(0x3956c25b), TBL(0x59f111f1), TBL(0x923f82a4), TBL(0xab1c5ed5), ++ TBL(0xd807aa98), TBL(0x12835b01), TBL(0x243185be), TBL(0x550c7dc3), ++ TBL(0x72be5d74), TBL(0x80deb1fe), TBL(0x9bdc06a7), TBL(0xc19bf174), ++ TBL(0xe49b69c1), TBL(0xefbe4786), TBL(0x0fc19dc6), TBL(0x240ca1cc), ++ TBL(0x2de92c6f), TBL(0x4a7484aa), TBL(0x5cb0a9dc), TBL(0x76f988da), ++ TBL(0x983e5152), TBL(0xa831c66d), TBL(0xb00327c8), TBL(0xbf597fc7), ++ TBL(0xc6e00bf3), TBL(0xd5a79147), TBL(0x06ca6351), TBL(0x14292967), ++ TBL(0x27b70a85), TBL(0x2e1b2138), TBL(0x4d2c6dfc), TBL(0x53380d13), ++ TBL(0x650a7354), TBL(0x766a0abb), TBL(0x81c2c92e), TBL(0x92722c85), ++ TBL(0xa2bfe8a1), TBL(0xa81a664b), TBL(0xc24b8b70), TBL(0xc76c51a3), ++ TBL(0xd192e819), TBL(0xd6990624), TBL(0xf40e3585), TBL(0x106aa070), ++ TBL(0x19a4c116), TBL(0x1e376c08), TBL(0x2748774c), TBL(0x34b0bcb5), ++ TBL(0x391c0cb3), TBL(0x4ed8aa4a), TBL(0x5b9cca4f), TBL(0x682e6ff3), ++ TBL(0x748f82ee), TBL(0x78a5636f), TBL(0x84c87814), TBL(0x8cc70208), ++ TBL(0x90befffa), TBL(0xa4506ceb), TBL(0xbef9a3f7), TBL(0xc67178f2) ++#undef TBL ++ }; ++ ++ ++static ASM_FUNC_ATTR_INLINE vector4x_u32 ++vec_rol_elems(vector4x_u32 v, unsigned int idx) ++{ ++#ifndef WORDS_BIGENDIAN ++ return vec_sld (v, v, (16 - (4 * idx)) & 15); ++#else ++ return vec_sld (v, v, (4 * idx) & 15); ++#endif ++} ++ ++ ++static ASM_FUNC_ATTR_INLINE vector4x_u32 ++vec_merge_idx0_elems(vector4x_u32 v0, vector4x_u32 v1, ++ vector4x_u32 v2, vector4x_u32 v3) ++{ ++ return (vector4x_u32)vec_mergeh ((vector2x_u64) vec_mergeh(v0, v1), ++ (vector2x_u64) vec_mergeh(v2, v3)); ++} ++ ++ ++static ASM_FUNC_ATTR_INLINE vector4x_u32 ++vec_ror_u32(vector4x_u32 v, unsigned int shift) ++{ ++ return (v >> (shift & 31)) ^ (v << ((32 - shift) & 31)); ++} ++ ++ ++static ASM_FUNC_ATTR_INLINE vector4x_u32 ++vec_vshasigma_u32(vector4x_u32 v, unsigned int a, unsigned int b) ++{ ++ asm ("vshasigmaw %0,%1,%2,%3" ++ : "=v" (v) ++ : "v" (v), "g" (a), "g" (b) ++ : "memory"); ++ return v; ++} ++ ++ ++/* SHA2 round in vector registers */ ++#define R(a,b,c,d,e,f,g,h,k,w) do \ ++ { \ ++ t1 = (h); \ ++ t1 += ((k) + (w)); \ ++ t1 += Cho((e),(f),(g)); \ ++ t1 += Sum1((e)); \ ++ t2 = Sum0((a)); \ ++ t2 += Maj((a),(b),(c)); \ ++ d += t1; \ ++ h = t1 + t2; \ ++ } while (0) ++ ++#define Cho(b, c, d) (vec_sel(d, c, b)) ++ ++#define Maj(c, d, b) (vec_sel(c, b, c ^ d)) ++ ++#define Sum0(x) (vec_vshasigma_u32(x, 1, 0)) ++ ++#define Sum1(x) (vec_vshasigma_u32(x, 1, 15)) ++ ++ ++/* Message expansion on general purpose registers */ ++#define S0(x) (ror ((x), 7) ^ ror ((x), 18) ^ ((x) >> 3)) ++#define S1(x) (ror ((x), 17) ^ ror ((x), 19) ^ ((x) >> 10)) ++ ++#define I(i) ( w[i] = buf_get_be32(data + i * 4) ) ++#define W(i) ({ w[i&0x0f] += w[(i-7) &0x0f]; \ ++ w[i&0x0f] += S0(w[(i-15)&0x0f]); \ ++ w[i&0x0f] += S1(w[(i-2) &0x0f]); \ ++ w[i&0x0f]; }) ++ ++#define I2(i) ( w2[i] = buf_get_be32(64 + data + i * 4), I(i) ) ++#define W2(i) ({ w2[i] = w2[i-7]; \ ++ w2[i] += S1(w2[i-2]); \ ++ w2[i] += S0(w2[i-15]); \ ++ w2[i] += w2[i-16]; \ ++ W(i); }) ++#define R2(i) ( w2[i] ) ++ ++ ++unsigned int ASM_FUNC_ATTR ++_gcry_sha256_transform_ppc8(u32 state[8], const unsigned char *data, ++ size_t nblks) ++{ ++ /* GPRs used for message expansion as vector intrinsics based generates ++ * slower code. */ ++ vector4x_u32 h0, h1, h2, h3, h4, h5, h6, h7; ++ vector4x_u32 h0_h3, h4_h7; ++ vector4x_u32 a, b, c, d, e, f, g, h, t1, t2; ++ u32 w[16]; ++ u32 w2[64]; ++ ++ h0_h3 = vec_vsx_ld (4 * 0, state); ++ h4_h7 = vec_vsx_ld (4 * 4, state); ++ ++ h0 = h0_h3; ++ h1 = vec_rol_elems (h0_h3, 1); ++ h2 = vec_rol_elems (h0_h3, 2); ++ h3 = vec_rol_elems (h0_h3, 3); ++ h4 = h4_h7; ++ h5 = vec_rol_elems (h4_h7, 1); ++ h6 = vec_rol_elems (h4_h7, 2); ++ h7 = vec_rol_elems (h4_h7, 3); ++ ++ while (nblks >= 2) ++ { ++ a = h0; ++ b = h1; ++ c = h2; ++ d = h3; ++ e = h4; ++ f = h5; ++ g = h6; ++ h = h7; ++ ++ R(a, b, c, d, e, f, g, h, K[0], I2(0)); ++ R(h, a, b, c, d, e, f, g, K[1], I2(1)); ++ R(g, h, a, b, c, d, e, f, K[2], I2(2)); ++ R(f, g, h, a, b, c, d, e, K[3], I2(3)); ++ R(e, f, g, h, a, b, c, d, K[4], I2(4)); ++ R(d, e, f, g, h, a, b, c, K[5], I2(5)); ++ R(c, d, e, f, g, h, a, b, K[6], I2(6)); ++ R(b, c, d, e, f, g, h, a, K[7], I2(7)); ++ R(a, b, c, d, e, f, g, h, K[8], I2(8)); ++ R(h, a, b, c, d, e, f, g, K[9], I2(9)); ++ R(g, h, a, b, c, d, e, f, K[10], I2(10)); ++ R(f, g, h, a, b, c, d, e, K[11], I2(11)); ++ R(e, f, g, h, a, b, c, d, K[12], I2(12)); ++ R(d, e, f, g, h, a, b, c, K[13], I2(13)); ++ R(c, d, e, f, g, h, a, b, K[14], I2(14)); ++ R(b, c, d, e, f, g, h, a, K[15], I2(15)); ++ data += 64 * 2; ++ ++ R(a, b, c, d, e, f, g, h, K[16], W2(16)); ++ R(h, a, b, c, d, e, f, g, K[17], W2(17)); ++ R(g, h, a, b, c, d, e, f, K[18], W2(18)); ++ R(f, g, h, a, b, c, d, e, K[19], W2(19)); ++ R(e, f, g, h, a, b, c, d, K[20], W2(20)); ++ R(d, e, f, g, h, a, b, c, K[21], W2(21)); ++ R(c, d, e, f, g, h, a, b, K[22], W2(22)); ++ R(b, c, d, e, f, g, h, a, K[23], W2(23)); ++ R(a, b, c, d, e, f, g, h, K[24], W2(24)); ++ R(h, a, b, c, d, e, f, g, K[25], W2(25)); ++ R(g, h, a, b, c, d, e, f, K[26], W2(26)); ++ R(f, g, h, a, b, c, d, e, K[27], W2(27)); ++ R(e, f, g, h, a, b, c, d, K[28], W2(28)); ++ R(d, e, f, g, h, a, b, c, K[29], W2(29)); ++ R(c, d, e, f, g, h, a, b, K[30], W2(30)); ++ R(b, c, d, e, f, g, h, a, K[31], W2(31)); ++ ++ R(a, b, c, d, e, f, g, h, K[32], W2(32)); ++ R(h, a, b, c, d, e, f, g, K[33], W2(33)); ++ R(g, h, a, b, c, d, e, f, K[34], W2(34)); ++ R(f, g, h, a, b, c, d, e, K[35], W2(35)); ++ R(e, f, g, h, a, b, c, d, K[36], W2(36)); ++ R(d, e, f, g, h, a, b, c, K[37], W2(37)); ++ R(c, d, e, f, g, h, a, b, K[38], W2(38)); ++ R(b, c, d, e, f, g, h, a, K[39], W2(39)); ++ R(a, b, c, d, e, f, g, h, K[40], W2(40)); ++ R(h, a, b, c, d, e, f, g, K[41], W2(41)); ++ R(g, h, a, b, c, d, e, f, K[42], W2(42)); ++ R(f, g, h, a, b, c, d, e, K[43], W2(43)); ++ R(e, f, g, h, a, b, c, d, K[44], W2(44)); ++ R(d, e, f, g, h, a, b, c, K[45], W2(45)); ++ R(c, d, e, f, g, h, a, b, K[46], W2(46)); ++ R(b, c, d, e, f, g, h, a, K[47], W2(47)); ++ ++ R(a, b, c, d, e, f, g, h, K[48], W2(48)); ++ R(h, a, b, c, d, e, f, g, K[49], W2(49)); ++ R(g, h, a, b, c, d, e, f, K[50], W2(50)); ++ R(f, g, h, a, b, c, d, e, K[51], W2(51)); ++ R(e, f, g, h, a, b, c, d, K[52], W2(52)); ++ R(d, e, f, g, h, a, b, c, K[53], W2(53)); ++ R(c, d, e, f, g, h, a, b, K[54], W2(54)); ++ R(b, c, d, e, f, g, h, a, K[55], W2(55)); ++ R(a, b, c, d, e, f, g, h, K[56], W2(56)); ++ R(h, a, b, c, d, e, f, g, K[57], W2(57)); ++ R(g, h, a, b, c, d, e, f, K[58], W2(58)); ++ R(f, g, h, a, b, c, d, e, K[59], W2(59)); ++ R(e, f, g, h, a, b, c, d, K[60], W2(60)); ++ R(d, e, f, g, h, a, b, c, K[61], W2(61)); ++ R(c, d, e, f, g, h, a, b, K[62], W2(62)); ++ R(b, c, d, e, f, g, h, a, K[63], W2(63)); ++ ++ h0 += a; ++ h1 += b; ++ h2 += c; ++ h3 += d; ++ h4 += e; ++ h5 += f; ++ h6 += g; ++ h7 += h; ++ ++ a = h0; ++ b = h1; ++ c = h2; ++ d = h3; ++ e = h4; ++ f = h5; ++ g = h6; ++ h = h7; ++ ++ R(a, b, c, d, e, f, g, h, K[0], R2(0)); ++ R(h, a, b, c, d, e, f, g, K[1], R2(1)); ++ R(g, h, a, b, c, d, e, f, K[2], R2(2)); ++ R(f, g, h, a, b, c, d, e, K[3], R2(3)); ++ R(e, f, g, h, a, b, c, d, K[4], R2(4)); ++ R(d, e, f, g, h, a, b, c, K[5], R2(5)); ++ R(c, d, e, f, g, h, a, b, K[6], R2(6)); ++ R(b, c, d, e, f, g, h, a, K[7], R2(7)); ++ R(a, b, c, d, e, f, g, h, K[8], R2(8)); ++ R(h, a, b, c, d, e, f, g, K[9], R2(9)); ++ R(g, h, a, b, c, d, e, f, K[10], R2(10)); ++ R(f, g, h, a, b, c, d, e, K[11], R2(11)); ++ R(e, f, g, h, a, b, c, d, K[12], R2(12)); ++ R(d, e, f, g, h, a, b, c, K[13], R2(13)); ++ R(c, d, e, f, g, h, a, b, K[14], R2(14)); ++ R(b, c, d, e, f, g, h, a, K[15], R2(15)); ++ ++ R(a, b, c, d, e, f, g, h, K[16], R2(16)); ++ R(h, a, b, c, d, e, f, g, K[17], R2(17)); ++ R(g, h, a, b, c, d, e, f, K[18], R2(18)); ++ R(f, g, h, a, b, c, d, e, K[19], R2(19)); ++ R(e, f, g, h, a, b, c, d, K[20], R2(20)); ++ R(d, e, f, g, h, a, b, c, K[21], R2(21)); ++ R(c, d, e, f, g, h, a, b, K[22], R2(22)); ++ R(b, c, d, e, f, g, h, a, K[23], R2(23)); ++ R(a, b, c, d, e, f, g, h, K[24], R2(24)); ++ R(h, a, b, c, d, e, f, g, K[25], R2(25)); ++ R(g, h, a, b, c, d, e, f, K[26], R2(26)); ++ R(f, g, h, a, b, c, d, e, K[27], R2(27)); ++ R(e, f, g, h, a, b, c, d, K[28], R2(28)); ++ R(d, e, f, g, h, a, b, c, K[29], R2(29)); ++ R(c, d, e, f, g, h, a, b, K[30], R2(30)); ++ R(b, c, d, e, f, g, h, a, K[31], R2(31)); ++ ++ R(a, b, c, d, e, f, g, h, K[32], R2(32)); ++ R(h, a, b, c, d, e, f, g, K[33], R2(33)); ++ R(g, h, a, b, c, d, e, f, K[34], R2(34)); ++ R(f, g, h, a, b, c, d, e, K[35], R2(35)); ++ R(e, f, g, h, a, b, c, d, K[36], R2(36)); ++ R(d, e, f, g, h, a, b, c, K[37], R2(37)); ++ R(c, d, e, f, g, h, a, b, K[38], R2(38)); ++ R(b, c, d, e, f, g, h, a, K[39], R2(39)); ++ R(a, b, c, d, e, f, g, h, K[40], R2(40)); ++ R(h, a, b, c, d, e, f, g, K[41], R2(41)); ++ R(g, h, a, b, c, d, e, f, K[42], R2(42)); ++ R(f, g, h, a, b, c, d, e, K[43], R2(43)); ++ R(e, f, g, h, a, b, c, d, K[44], R2(44)); ++ R(d, e, f, g, h, a, b, c, K[45], R2(45)); ++ R(c, d, e, f, g, h, a, b, K[46], R2(46)); ++ R(b, c, d, e, f, g, h, a, K[47], R2(47)); ++ ++ R(a, b, c, d, e, f, g, h, K[48], R2(48)); ++ R(h, a, b, c, d, e, f, g, K[49], R2(49)); ++ R(g, h, a, b, c, d, e, f, K[50], R2(50)); ++ R(f, g, h, a, b, c, d, e, K[51], R2(51)); ++ R(e, f, g, h, a, b, c, d, K[52], R2(52)); ++ R(d, e, f, g, h, a, b, c, K[53], R2(53)); ++ R(c, d, e, f, g, h, a, b, K[54], R2(54)); ++ R(b, c, d, e, f, g, h, a, K[55], R2(55)); ++ R(a, b, c, d, e, f, g, h, K[56], R2(56)); ++ R(h, a, b, c, d, e, f, g, K[57], R2(57)); ++ R(g, h, a, b, c, d, e, f, K[58], R2(58)); ++ R(f, g, h, a, b, c, d, e, K[59], R2(59)); ++ R(e, f, g, h, a, b, c, d, K[60], R2(60)); ++ R(d, e, f, g, h, a, b, c, K[61], R2(61)); ++ R(c, d, e, f, g, h, a, b, K[62], R2(62)); ++ R(b, c, d, e, f, g, h, a, K[63], R2(63)); ++ ++ h0 += a; ++ h1 += b; ++ h2 += c; ++ h3 += d; ++ h4 += e; ++ h5 += f; ++ h6 += g; ++ h7 += h; ++ ++ nblks -= 2; ++ } ++ ++ while (nblks) ++ { ++ a = h0; ++ b = h1; ++ c = h2; ++ d = h3; ++ e = h4; ++ f = h5; ++ g = h6; ++ h = h7; ++ ++ R(a, b, c, d, e, f, g, h, K[0], I(0)); ++ R(h, a, b, c, d, e, f, g, K[1], I(1)); ++ R(g, h, a, b, c, d, e, f, K[2], I(2)); ++ R(f, g, h, a, b, c, d, e, K[3], I(3)); ++ R(e, f, g, h, a, b, c, d, K[4], I(4)); ++ R(d, e, f, g, h, a, b, c, K[5], I(5)); ++ R(c, d, e, f, g, h, a, b, K[6], I(6)); ++ R(b, c, d, e, f, g, h, a, K[7], I(7)); ++ R(a, b, c, d, e, f, g, h, K[8], I(8)); ++ R(h, a, b, c, d, e, f, g, K[9], I(9)); ++ R(g, h, a, b, c, d, e, f, K[10], I(10)); ++ R(f, g, h, a, b, c, d, e, K[11], I(11)); ++ R(e, f, g, h, a, b, c, d, K[12], I(12)); ++ R(d, e, f, g, h, a, b, c, K[13], I(13)); ++ R(c, d, e, f, g, h, a, b, K[14], I(14)); ++ R(b, c, d, e, f, g, h, a, K[15], I(15)); ++ data += 64; ++ ++ R(a, b, c, d, e, f, g, h, K[16], W(16)); ++ R(h, a, b, c, d, e, f, g, K[17], W(17)); ++ R(g, h, a, b, c, d, e, f, K[18], W(18)); ++ R(f, g, h, a, b, c, d, e, K[19], W(19)); ++ R(e, f, g, h, a, b, c, d, K[20], W(20)); ++ R(d, e, f, g, h, a, b, c, K[21], W(21)); ++ R(c, d, e, f, g, h, a, b, K[22], W(22)); ++ R(b, c, d, e, f, g, h, a, K[23], W(23)); ++ R(a, b, c, d, e, f, g, h, K[24], W(24)); ++ R(h, a, b, c, d, e, f, g, K[25], W(25)); ++ R(g, h, a, b, c, d, e, f, K[26], W(26)); ++ R(f, g, h, a, b, c, d, e, K[27], W(27)); ++ R(e, f, g, h, a, b, c, d, K[28], W(28)); ++ R(d, e, f, g, h, a, b, c, K[29], W(29)); ++ R(c, d, e, f, g, h, a, b, K[30], W(30)); ++ R(b, c, d, e, f, g, h, a, K[31], W(31)); ++ ++ R(a, b, c, d, e, f, g, h, K[32], W(32)); ++ R(h, a, b, c, d, e, f, g, K[33], W(33)); ++ R(g, h, a, b, c, d, e, f, K[34], W(34)); ++ R(f, g, h, a, b, c, d, e, K[35], W(35)); ++ R(e, f, g, h, a, b, c, d, K[36], W(36)); ++ R(d, e, f, g, h, a, b, c, K[37], W(37)); ++ R(c, d, e, f, g, h, a, b, K[38], W(38)); ++ R(b, c, d, e, f, g, h, a, K[39], W(39)); ++ R(a, b, c, d, e, f, g, h, K[40], W(40)); ++ R(h, a, b, c, d, e, f, g, K[41], W(41)); ++ R(g, h, a, b, c, d, e, f, K[42], W(42)); ++ R(f, g, h, a, b, c, d, e, K[43], W(43)); ++ R(e, f, g, h, a, b, c, d, K[44], W(44)); ++ R(d, e, f, g, h, a, b, c, K[45], W(45)); ++ R(c, d, e, f, g, h, a, b, K[46], W(46)); ++ R(b, c, d, e, f, g, h, a, K[47], W(47)); ++ ++ R(a, b, c, d, e, f, g, h, K[48], W(48)); ++ R(h, a, b, c, d, e, f, g, K[49], W(49)); ++ R(g, h, a, b, c, d, e, f, K[50], W(50)); ++ R(f, g, h, a, b, c, d, e, K[51], W(51)); ++ R(e, f, g, h, a, b, c, d, K[52], W(52)); ++ R(d, e, f, g, h, a, b, c, K[53], W(53)); ++ R(c, d, e, f, g, h, a, b, K[54], W(54)); ++ R(b, c, d, e, f, g, h, a, K[55], W(55)); ++ R(a, b, c, d, e, f, g, h, K[56], W(56)); ++ R(h, a, b, c, d, e, f, g, K[57], W(57)); ++ R(g, h, a, b, c, d, e, f, K[58], W(58)); ++ R(f, g, h, a, b, c, d, e, K[59], W(59)); ++ R(e, f, g, h, a, b, c, d, K[60], W(60)); ++ R(d, e, f, g, h, a, b, c, K[61], W(61)); ++ R(c, d, e, f, g, h, a, b, K[62], W(62)); ++ R(b, c, d, e, f, g, h, a, K[63], W(63)); ++ ++ h0 += a; ++ h1 += b; ++ h2 += c; ++ h3 += d; ++ h4 += e; ++ h5 += f; ++ h6 += g; ++ h7 += h; ++ ++ nblks--; ++ } ++ ++ h0_h3 = vec_merge_idx0_elems (h0, h1, h2, h3); ++ h4_h7 = vec_merge_idx0_elems (h4, h5, h6, h7); ++ vec_vsx_st (h0_h3, 4 * 0, state); ++ vec_vsx_st (h4_h7, 4 * 4, state); ++ ++ return sizeof(w2) + sizeof(w); ++} ++#undef R ++#undef Cho ++#undef Maj ++#undef Sum0 ++#undef Sum1 ++#undef S0 ++#undef S1 ++#undef I ++#undef W ++#undef I2 ++#undef W2 ++#undef R2 ++ ++ ++/* SHA2 round in general purpose registers */ ++#define R(a,b,c,d,e,f,g,h,k,w) do \ ++ { \ ++ t1 = (h) + Sum1((e)) + Cho((e),(f),(g)) + ((k) + (w));\ ++ t2 = Sum0((a)) + Maj((a),(b),(c)); \ ++ d += t1; \ ++ h = t1 + t2; \ ++ } while (0) ++ ++#define Cho(x, y, z) ((x & y) + (~x & z)) ++ ++#define Maj(z, x, y) ((x & y) + (z & (x ^ y))) ++ ++#define Sum0(x) (ror (x, 2) ^ ror (x ^ ror (x, 22-13), 13)) ++ ++#define Sum1(x) (ror (x, 6) ^ ror (x, 11) ^ ror (x, 25)) ++ ++ ++/* Message expansion on general purpose registers */ ++#define S0(x) (ror ((x), 7) ^ ror ((x), 18) ^ ((x) >> 3)) ++#define S1(x) (ror ((x), 17) ^ ror ((x), 19) ^ ((x) >> 10)) ++ ++#define I(i) ( w[i] = buf_get_be32(data + i * 4) ) ++#define WN(i) ({ w[i&0x0f] += w[(i-7) &0x0f]; \ ++ w[i&0x0f] += S0(w[(i-15)&0x0f]); \ ++ w[i&0x0f] += S1(w[(i-2) &0x0f]); \ ++ w[i&0x0f]; }) ++#define W(i) ({ u32 r = w[i&0x0f]; WN(i); r; }) ++#define L(i) w[i&0x0f] ++ ++ ++unsigned int ASM_FUNC_ATTR ++_gcry_sha256_transform_ppc9(u32 state[8], const unsigned char *data, ++ size_t nblks) ++{ ++ /* GPRs used for round function and message expansion as vector intrinsics ++ * based generates slower code for POWER9. */ ++ u32 a, b, c, d, e, f, g, h, t1, t2; ++ u32 w[16]; ++ ++ a = state[0]; ++ b = state[1]; ++ c = state[2]; ++ d = state[3]; ++ e = state[4]; ++ f = state[5]; ++ g = state[6]; ++ h = state[7]; ++ ++ while (nblks >= 2) ++ { ++ I(0); I(1); I(2); I(3); ++ I(4); I(5); I(6); I(7); ++ I(8); I(9); I(10); I(11); ++ I(12); I(13); I(14); I(15); ++ data += 64; ++ R(a, b, c, d, e, f, g, h, K[0], W(0)); ++ R(h, a, b, c, d, e, f, g, K[1], W(1)); ++ R(g, h, a, b, c, d, e, f, K[2], W(2)); ++ R(f, g, h, a, b, c, d, e, K[3], W(3)); ++ R(e, f, g, h, a, b, c, d, K[4], W(4)); ++ R(d, e, f, g, h, a, b, c, K[5], W(5)); ++ R(c, d, e, f, g, h, a, b, K[6], W(6)); ++ R(b, c, d, e, f, g, h, a, K[7], W(7)); ++ R(a, b, c, d, e, f, g, h, K[8], W(8)); ++ R(h, a, b, c, d, e, f, g, K[9], W(9)); ++ R(g, h, a, b, c, d, e, f, K[10], W(10)); ++ R(f, g, h, a, b, c, d, e, K[11], W(11)); ++ R(e, f, g, h, a, b, c, d, K[12], W(12)); ++ R(d, e, f, g, h, a, b, c, K[13], W(13)); ++ R(c, d, e, f, g, h, a, b, K[14], W(14)); ++ R(b, c, d, e, f, g, h, a, K[15], W(15)); ++ ++ R(a, b, c, d, e, f, g, h, K[16], W(16)); ++ R(h, a, b, c, d, e, f, g, K[17], W(17)); ++ R(g, h, a, b, c, d, e, f, K[18], W(18)); ++ R(f, g, h, a, b, c, d, e, K[19], W(19)); ++ R(e, f, g, h, a, b, c, d, K[20], W(20)); ++ R(d, e, f, g, h, a, b, c, K[21], W(21)); ++ R(c, d, e, f, g, h, a, b, K[22], W(22)); ++ R(b, c, d, e, f, g, h, a, K[23], W(23)); ++ R(a, b, c, d, e, f, g, h, K[24], W(24)); ++ R(h, a, b, c, d, e, f, g, K[25], W(25)); ++ R(g, h, a, b, c, d, e, f, K[26], W(26)); ++ R(f, g, h, a, b, c, d, e, K[27], W(27)); ++ R(e, f, g, h, a, b, c, d, K[28], W(28)); ++ R(d, e, f, g, h, a, b, c, K[29], W(29)); ++ R(c, d, e, f, g, h, a, b, K[30], W(30)); ++ R(b, c, d, e, f, g, h, a, K[31], W(31)); ++ ++ R(a, b, c, d, e, f, g, h, K[32], W(32)); ++ R(h, a, b, c, d, e, f, g, K[33], W(33)); ++ R(g, h, a, b, c, d, e, f, K[34], W(34)); ++ R(f, g, h, a, b, c, d, e, K[35], W(35)); ++ R(e, f, g, h, a, b, c, d, K[36], W(36)); ++ R(d, e, f, g, h, a, b, c, K[37], W(37)); ++ R(c, d, e, f, g, h, a, b, K[38], W(38)); ++ R(b, c, d, e, f, g, h, a, K[39], W(39)); ++ R(a, b, c, d, e, f, g, h, K[40], W(40)); ++ R(h, a, b, c, d, e, f, g, K[41], W(41)); ++ R(g, h, a, b, c, d, e, f, K[42], W(42)); ++ R(f, g, h, a, b, c, d, e, K[43], W(43)); ++ R(e, f, g, h, a, b, c, d, K[44], W(44)); ++ R(d, e, f, g, h, a, b, c, K[45], W(45)); ++ R(c, d, e, f, g, h, a, b, K[46], W(46)); ++ R(b, c, d, e, f, g, h, a, K[47], W(47)); ++ ++ R(a, b, c, d, e, f, g, h, K[48], L(48)); ++ R(h, a, b, c, d, e, f, g, K[49], L(49)); ++ R(g, h, a, b, c, d, e, f, K[50], L(50)); ++ R(f, g, h, a, b, c, d, e, K[51], L(51)); ++ I(0); I(1); I(2); I(3); ++ R(e, f, g, h, a, b, c, d, K[52], L(52)); ++ R(d, e, f, g, h, a, b, c, K[53], L(53)); ++ R(c, d, e, f, g, h, a, b, K[54], L(54)); ++ R(b, c, d, e, f, g, h, a, K[55], L(55)); ++ I(4); I(5); I(6); I(7); ++ R(a, b, c, d, e, f, g, h, K[56], L(56)); ++ R(h, a, b, c, d, e, f, g, K[57], L(57)); ++ R(g, h, a, b, c, d, e, f, K[58], L(58)); ++ R(f, g, h, a, b, c, d, e, K[59], L(59)); ++ I(8); I(9); I(10); I(11); ++ R(e, f, g, h, a, b, c, d, K[60], L(60)); ++ R(d, e, f, g, h, a, b, c, K[61], L(61)); ++ R(c, d, e, f, g, h, a, b, K[62], L(62)); ++ R(b, c, d, e, f, g, h, a, K[63], L(63)); ++ I(12); I(13); I(14); I(15); ++ data += 64; ++ ++ a += state[0]; ++ b += state[1]; ++ c += state[2]; ++ d += state[3]; ++ e += state[4]; ++ f += state[5]; ++ g += state[6]; ++ h += state[7]; ++ state[0] = a; ++ state[1] = b; ++ state[2] = c; ++ state[3] = d; ++ state[4] = e; ++ state[5] = f; ++ state[6] = g; ++ state[7] = h; ++ ++ R(a, b, c, d, e, f, g, h, K[0], W(0)); ++ R(h, a, b, c, d, e, f, g, K[1], W(1)); ++ R(g, h, a, b, c, d, e, f, K[2], W(2)); ++ R(f, g, h, a, b, c, d, e, K[3], W(3)); ++ R(e, f, g, h, a, b, c, d, K[4], W(4)); ++ R(d, e, f, g, h, a, b, c, K[5], W(5)); ++ R(c, d, e, f, g, h, a, b, K[6], W(6)); ++ R(b, c, d, e, f, g, h, a, K[7], W(7)); ++ R(a, b, c, d, e, f, g, h, K[8], W(8)); ++ R(h, a, b, c, d, e, f, g, K[9], W(9)); ++ R(g, h, a, b, c, d, e, f, K[10], W(10)); ++ R(f, g, h, a, b, c, d, e, K[11], W(11)); ++ R(e, f, g, h, a, b, c, d, K[12], W(12)); ++ R(d, e, f, g, h, a, b, c, K[13], W(13)); ++ R(c, d, e, f, g, h, a, b, K[14], W(14)); ++ R(b, c, d, e, f, g, h, a, K[15], W(15)); ++ ++ R(a, b, c, d, e, f, g, h, K[16], W(16)); ++ R(h, a, b, c, d, e, f, g, K[17], W(17)); ++ R(g, h, a, b, c, d, e, f, K[18], W(18)); ++ R(f, g, h, a, b, c, d, e, K[19], W(19)); ++ R(e, f, g, h, a, b, c, d, K[20], W(20)); ++ R(d, e, f, g, h, a, b, c, K[21], W(21)); ++ R(c, d, e, f, g, h, a, b, K[22], W(22)); ++ R(b, c, d, e, f, g, h, a, K[23], W(23)); ++ R(a, b, c, d, e, f, g, h, K[24], W(24)); ++ R(h, a, b, c, d, e, f, g, K[25], W(25)); ++ R(g, h, a, b, c, d, e, f, K[26], W(26)); ++ R(f, g, h, a, b, c, d, e, K[27], W(27)); ++ R(e, f, g, h, a, b, c, d, K[28], W(28)); ++ R(d, e, f, g, h, a, b, c, K[29], W(29)); ++ R(c, d, e, f, g, h, a, b, K[30], W(30)); ++ R(b, c, d, e, f, g, h, a, K[31], W(31)); ++ ++ R(a, b, c, d, e, f, g, h, K[32], W(32)); ++ R(h, a, b, c, d, e, f, g, K[33], W(33)); ++ R(g, h, a, b, c, d, e, f, K[34], W(34)); ++ R(f, g, h, a, b, c, d, e, K[35], W(35)); ++ R(e, f, g, h, a, b, c, d, K[36], W(36)); ++ R(d, e, f, g, h, a, b, c, K[37], W(37)); ++ R(c, d, e, f, g, h, a, b, K[38], W(38)); ++ R(b, c, d, e, f, g, h, a, K[39], W(39)); ++ R(a, b, c, d, e, f, g, h, K[40], W(40)); ++ R(h, a, b, c, d, e, f, g, K[41], W(41)); ++ R(g, h, a, b, c, d, e, f, K[42], W(42)); ++ R(f, g, h, a, b, c, d, e, K[43], W(43)); ++ R(e, f, g, h, a, b, c, d, K[44], W(44)); ++ R(d, e, f, g, h, a, b, c, K[45], W(45)); ++ R(c, d, e, f, g, h, a, b, K[46], W(46)); ++ R(b, c, d, e, f, g, h, a, K[47], W(47)); ++ ++ R(a, b, c, d, e, f, g, h, K[48], L(48)); ++ R(h, a, b, c, d, e, f, g, K[49], L(49)); ++ R(g, h, a, b, c, d, e, f, K[50], L(50)); ++ R(f, g, h, a, b, c, d, e, K[51], L(51)); ++ R(e, f, g, h, a, b, c, d, K[52], L(52)); ++ R(d, e, f, g, h, a, b, c, K[53], L(53)); ++ R(c, d, e, f, g, h, a, b, K[54], L(54)); ++ R(b, c, d, e, f, g, h, a, K[55], L(55)); ++ R(a, b, c, d, e, f, g, h, K[56], L(56)); ++ R(h, a, b, c, d, e, f, g, K[57], L(57)); ++ R(g, h, a, b, c, d, e, f, K[58], L(58)); ++ R(f, g, h, a, b, c, d, e, K[59], L(59)); ++ R(e, f, g, h, a, b, c, d, K[60], L(60)); ++ R(d, e, f, g, h, a, b, c, K[61], L(61)); ++ R(c, d, e, f, g, h, a, b, K[62], L(62)); ++ R(b, c, d, e, f, g, h, a, K[63], L(63)); ++ ++ a += state[0]; ++ b += state[1]; ++ c += state[2]; ++ d += state[3]; ++ e += state[4]; ++ f += state[5]; ++ g += state[6]; ++ h += state[7]; ++ state[0] = a; ++ state[1] = b; ++ state[2] = c; ++ state[3] = d; ++ state[4] = e; ++ state[5] = f; ++ state[6] = g; ++ state[7] = h; ++ ++ nblks -= 2; ++ } ++ ++ while (nblks) ++ { ++ I(0); I(1); I(2); I(3); ++ I(4); I(5); I(6); I(7); ++ I(8); I(9); I(10); I(11); ++ I(12); I(13); I(14); I(15); ++ data += 64; ++ R(a, b, c, d, e, f, g, h, K[0], W(0)); ++ R(h, a, b, c, d, e, f, g, K[1], W(1)); ++ R(g, h, a, b, c, d, e, f, K[2], W(2)); ++ R(f, g, h, a, b, c, d, e, K[3], W(3)); ++ R(e, f, g, h, a, b, c, d, K[4], W(4)); ++ R(d, e, f, g, h, a, b, c, K[5], W(5)); ++ R(c, d, e, f, g, h, a, b, K[6], W(6)); ++ R(b, c, d, e, f, g, h, a, K[7], W(7)); ++ R(a, b, c, d, e, f, g, h, K[8], W(8)); ++ R(h, a, b, c, d, e, f, g, K[9], W(9)); ++ R(g, h, a, b, c, d, e, f, K[10], W(10)); ++ R(f, g, h, a, b, c, d, e, K[11], W(11)); ++ R(e, f, g, h, a, b, c, d, K[12], W(12)); ++ R(d, e, f, g, h, a, b, c, K[13], W(13)); ++ R(c, d, e, f, g, h, a, b, K[14], W(14)); ++ R(b, c, d, e, f, g, h, a, K[15], W(15)); ++ ++ R(a, b, c, d, e, f, g, h, K[16], W(16)); ++ R(h, a, b, c, d, e, f, g, K[17], W(17)); ++ R(g, h, a, b, c, d, e, f, K[18], W(18)); ++ R(f, g, h, a, b, c, d, e, K[19], W(19)); ++ R(e, f, g, h, a, b, c, d, K[20], W(20)); ++ R(d, e, f, g, h, a, b, c, K[21], W(21)); ++ R(c, d, e, f, g, h, a, b, K[22], W(22)); ++ R(b, c, d, e, f, g, h, a, K[23], W(23)); ++ R(a, b, c, d, e, f, g, h, K[24], W(24)); ++ R(h, a, b, c, d, e, f, g, K[25], W(25)); ++ R(g, h, a, b, c, d, e, f, K[26], W(26)); ++ R(f, g, h, a, b, c, d, e, K[27], W(27)); ++ R(e, f, g, h, a, b, c, d, K[28], W(28)); ++ R(d, e, f, g, h, a, b, c, K[29], W(29)); ++ R(c, d, e, f, g, h, a, b, K[30], W(30)); ++ R(b, c, d, e, f, g, h, a, K[31], W(31)); ++ ++ R(a, b, c, d, e, f, g, h, K[32], W(32)); ++ R(h, a, b, c, d, e, f, g, K[33], W(33)); ++ R(g, h, a, b, c, d, e, f, K[34], W(34)); ++ R(f, g, h, a, b, c, d, e, K[35], W(35)); ++ R(e, f, g, h, a, b, c, d, K[36], W(36)); ++ R(d, e, f, g, h, a, b, c, K[37], W(37)); ++ R(c, d, e, f, g, h, a, b, K[38], W(38)); ++ R(b, c, d, e, f, g, h, a, K[39], W(39)); ++ R(a, b, c, d, e, f, g, h, K[40], W(40)); ++ R(h, a, b, c, d, e, f, g, K[41], W(41)); ++ R(g, h, a, b, c, d, e, f, K[42], W(42)); ++ R(f, g, h, a, b, c, d, e, K[43], W(43)); ++ R(e, f, g, h, a, b, c, d, K[44], W(44)); ++ R(d, e, f, g, h, a, b, c, K[45], W(45)); ++ R(c, d, e, f, g, h, a, b, K[46], W(46)); ++ R(b, c, d, e, f, g, h, a, K[47], W(47)); ++ ++ R(a, b, c, d, e, f, g, h, K[48], L(48)); ++ R(h, a, b, c, d, e, f, g, K[49], L(49)); ++ R(g, h, a, b, c, d, e, f, K[50], L(50)); ++ R(f, g, h, a, b, c, d, e, K[51], L(51)); ++ R(e, f, g, h, a, b, c, d, K[52], L(52)); ++ R(d, e, f, g, h, a, b, c, K[53], L(53)); ++ R(c, d, e, f, g, h, a, b, K[54], L(54)); ++ R(b, c, d, e, f, g, h, a, K[55], L(55)); ++ R(a, b, c, d, e, f, g, h, K[56], L(56)); ++ R(h, a, b, c, d, e, f, g, K[57], L(57)); ++ R(g, h, a, b, c, d, e, f, K[58], L(58)); ++ R(f, g, h, a, b, c, d, e, K[59], L(59)); ++ R(e, f, g, h, a, b, c, d, K[60], L(60)); ++ R(d, e, f, g, h, a, b, c, K[61], L(61)); ++ R(c, d, e, f, g, h, a, b, K[62], L(62)); ++ R(b, c, d, e, f, g, h, a, K[63], L(63)); ++ ++ a += state[0]; ++ b += state[1]; ++ c += state[2]; ++ d += state[3]; ++ e += state[4]; ++ f += state[5]; ++ g += state[6]; ++ h += state[7]; ++ state[0] = a; ++ state[1] = b; ++ state[2] = c; ++ state[3] = d; ++ state[4] = e; ++ state[5] = f; ++ state[6] = g; ++ state[7] = h; ++ ++ nblks--; ++ } ++ ++ return sizeof(w); ++} ++ ++#endif /* ENABLE_PPC_CRYPTO_SUPPORT */ +diff --git a/cipher/sha256.c b/cipher/sha256.c +index d174321d..6d49b6c2 100644 +--- a/cipher/sha256.c ++++ b/cipher/sha256.c +@@ -90,6 +90,18 @@ + # endif + #endif + ++/* USE_PPC_CRYPTO indicates whether to enable PowerPC vector crypto ++ * accelerated code. */ ++#undef USE_PPC_CRYPTO ++#ifdef ENABLE_PPC_CRYPTO_SUPPORT ++# if defined(HAVE_COMPATIBLE_CC_PPC_ALTIVEC) && \ ++ defined(HAVE_GCC_INLINE_ASM_PPC_ALTIVEC) ++# if __GNUC__ >= 4 ++# define USE_PPC_CRYPTO 1 ++# endif ++# endif ++#endif ++ + + typedef struct { + gcry_md_block_ctx_t bctx; +@@ -108,28 +120,41 @@ typedef struct { + #endif + } SHA256_CONTEXT; + ++#ifdef USE_PPC_CRYPTO ++unsigned int _gcry_sha256_transform_ppc8(u32 state[8], ++ const unsigned char *input_data, ++ size_t num_blks); ++ ++unsigned int _gcry_sha256_transform_ppc9(u32 state[8], ++ const unsigned char *input_data, ++ size_t num_blks); ++ ++static unsigned int ++do_sha256_transform_ppc8(void *ctx, const unsigned char *data, size_t nblks) ++{ ++ SHA256_CONTEXT *hd = ctx; ++ return _gcry_sha256_transform_ppc8 (&hd->h0, data, nblks); ++} ++ ++static unsigned int ++do_sha256_transform_ppc9(void *ctx, const unsigned char *data, size_t nblks) ++{ ++ SHA256_CONTEXT *hd = ctx; ++ return _gcry_sha256_transform_ppc9 (&hd->h0, data, nblks); ++} ++#endif ++ ++ + + static unsigned int + transform (void *c, const unsigned char *data, size_t nblks); + + + static void +-sha256_init (void *context, unsigned int flags) ++sha256_common_init (SHA256_CONTEXT *hd) + { +- SHA256_CONTEXT *hd = context; + unsigned int features = _gcry_get_hw_features (); + +- (void)flags; +- +- hd->h0 = 0x6a09e667; +- hd->h1 = 0xbb67ae85; +- hd->h2 = 0x3c6ef372; +- hd->h3 = 0xa54ff53a; +- hd->h4 = 0x510e527f; +- hd->h5 = 0x9b05688c; +- hd->h6 = 0x1f83d9ab; +- hd->h7 = 0x5be0cd19; +- + hd->bctx.nblocks = 0; + hd->bctx.nblocks_high = 0; + hd->bctx.count = 0; +@@ -149,16 +174,41 @@ sha256_init (void *context, unsigned int flags) + #endif + #ifdef USE_ARM_CE + hd->use_arm_ce = (features & HWF_ARM_SHA2) != 0; ++#endif ++#ifdef USE_PPC_CRYPTO ++ if ((features & HWF_PPC_VCRYPTO) != 0) ++ hd->bctx.bwrite = do_sha256_transform_ppc8; ++ if ((features & HWF_PPC_VCRYPTO) != 0 && (features & HWF_PPC_ARCH_3_00) != 0) ++ hd->bctx.bwrite = do_sha256_transform_ppc9; + #endif + (void)features; + } + + ++static void ++sha256_init (void *context, unsigned int flags) ++{ ++ SHA256_CONTEXT *hd = context; ++ ++ (void)flags; ++ ++ hd->h0 = 0x6a09e667; ++ hd->h1 = 0xbb67ae85; ++ hd->h2 = 0x3c6ef372; ++ hd->h3 = 0xa54ff53a; ++ hd->h4 = 0x510e527f; ++ hd->h5 = 0x9b05688c; ++ hd->h6 = 0x1f83d9ab; ++ hd->h7 = 0x5be0cd19; ++ ++ sha256_common_init (hd); ++} ++ ++ + static void + sha224_init (void *context, unsigned int flags) + { + SHA256_CONTEXT *hd = context; +- unsigned int features = _gcry_get_hw_features (); + + (void)flags; + +@@ -171,27 +221,7 @@ sha224_init (void *context, unsigned int flags) + hd->h6 = 0x64f98fa7; + hd->h7 = 0xbefa4fa4; + +- hd->bctx.nblocks = 0; +- hd->bctx.nblocks_high = 0; +- hd->bctx.count = 0; +- hd->bctx.blocksize = 64; +- hd->bctx.bwrite = transform; +- +-#ifdef USE_SSSE3 +- hd->use_ssse3 = (features & HWF_INTEL_SSSE3) != 0; +-#endif +-#ifdef USE_AVX +- /* AVX implementation uses SHLD which is known to be slow on non-Intel CPUs. +- * Therefore use this implementation on Intel CPUs only. */ +- hd->use_avx = (features & HWF_INTEL_AVX) && (features & HWF_INTEL_FAST_SHLD); +-#endif +-#ifdef USE_AVX2 +- hd->use_avx2 = (features & HWF_INTEL_AVX2) && (features & HWF_INTEL_BMI2); +-#endif +-#ifdef USE_ARM_CE +- hd->use_arm_ce = (features & HWF_ARM_SHA2) != 0; +-#endif +- (void)features; ++ sha256_common_init (hd); + } + + +diff --git a/cipher/sha512-ppc.c b/cipher/sha512-ppc.c +new file mode 100644 +index 00000000..a758e1ea +--- /dev/null ++++ b/cipher/sha512-ppc.c +@@ -0,0 +1,921 @@ ++/* sha512-ppc.c - PowerPC vcrypto implementation of SHA-512 transform ++ * Copyright (C) 2019 Jussi Kivilinna ++ * ++ * This file is part of Libgcrypt. ++ * ++ * Libgcrypt is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU Lesser General Public License as ++ * published by the Free Software Foundation; either version 2.1 of ++ * the License, or (at your option) any later version. ++ * ++ * Libgcrypt is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU Lesser General Public License for more details. ++ * ++ * You should have received a copy of the GNU Lesser General Public ++ * License along with this program; if not, see . ++ */ ++ ++#include ++ ++#if defined(ENABLE_PPC_CRYPTO_SUPPORT) && \ ++ defined(HAVE_COMPATIBLE_CC_PPC_ALTIVEC) && \ ++ defined(HAVE_GCC_INLINE_ASM_PPC_ALTIVEC) && \ ++ defined(USE_SHA512) && \ ++ __GNUC__ >= 4 ++ ++#include ++#include "bufhelp.h" ++ ++ ++typedef vector unsigned char vector16x_u8; ++typedef vector unsigned long long vector2x_u64; ++ ++ ++#define ALWAYS_INLINE inline __attribute__((always_inline)) ++#define NO_INLINE __attribute__((noinline)) ++#define NO_INSTRUMENT_FUNCTION __attribute__((no_instrument_function)) ++ ++#define ASM_FUNC_ATTR NO_INSTRUMENT_FUNCTION ++#define ASM_FUNC_ATTR_INLINE ASM_FUNC_ATTR ALWAYS_INLINE ++#define ASM_FUNC_ATTR_NOINLINE ASM_FUNC_ATTR NO_INLINE ++ ++ ++static const u64 K[80] = ++ { ++ U64_C(0x428a2f98d728ae22), U64_C(0x7137449123ef65cd), ++ U64_C(0xb5c0fbcfec4d3b2f), U64_C(0xe9b5dba58189dbbc), ++ U64_C(0x3956c25bf348b538), U64_C(0x59f111f1b605d019), ++ U64_C(0x923f82a4af194f9b), U64_C(0xab1c5ed5da6d8118), ++ U64_C(0xd807aa98a3030242), U64_C(0x12835b0145706fbe), ++ U64_C(0x243185be4ee4b28c), U64_C(0x550c7dc3d5ffb4e2), ++ U64_C(0x72be5d74f27b896f), U64_C(0x80deb1fe3b1696b1), ++ U64_C(0x9bdc06a725c71235), U64_C(0xc19bf174cf692694), ++ U64_C(0xe49b69c19ef14ad2), U64_C(0xefbe4786384f25e3), ++ U64_C(0x0fc19dc68b8cd5b5), U64_C(0x240ca1cc77ac9c65), ++ U64_C(0x2de92c6f592b0275), U64_C(0x4a7484aa6ea6e483), ++ U64_C(0x5cb0a9dcbd41fbd4), U64_C(0x76f988da831153b5), ++ U64_C(0x983e5152ee66dfab), U64_C(0xa831c66d2db43210), ++ U64_C(0xb00327c898fb213f), U64_C(0xbf597fc7beef0ee4), ++ U64_C(0xc6e00bf33da88fc2), U64_C(0xd5a79147930aa725), ++ U64_C(0x06ca6351e003826f), U64_C(0x142929670a0e6e70), ++ U64_C(0x27b70a8546d22ffc), U64_C(0x2e1b21385c26c926), ++ U64_C(0x4d2c6dfc5ac42aed), U64_C(0x53380d139d95b3df), ++ U64_C(0x650a73548baf63de), U64_C(0x766a0abb3c77b2a8), ++ U64_C(0x81c2c92e47edaee6), U64_C(0x92722c851482353b), ++ U64_C(0xa2bfe8a14cf10364), U64_C(0xa81a664bbc423001), ++ U64_C(0xc24b8b70d0f89791), U64_C(0xc76c51a30654be30), ++ U64_C(0xd192e819d6ef5218), U64_C(0xd69906245565a910), ++ U64_C(0xf40e35855771202a), U64_C(0x106aa07032bbd1b8), ++ U64_C(0x19a4c116b8d2d0c8), U64_C(0x1e376c085141ab53), ++ U64_C(0x2748774cdf8eeb99), U64_C(0x34b0bcb5e19b48a8), ++ U64_C(0x391c0cb3c5c95a63), U64_C(0x4ed8aa4ae3418acb), ++ U64_C(0x5b9cca4f7763e373), U64_C(0x682e6ff3d6b2b8a3), ++ U64_C(0x748f82ee5defb2fc), U64_C(0x78a5636f43172f60), ++ U64_C(0x84c87814a1f0ab72), U64_C(0x8cc702081a6439ec), ++ U64_C(0x90befffa23631e28), U64_C(0xa4506cebde82bde9), ++ U64_C(0xbef9a3f7b2c67915), U64_C(0xc67178f2e372532b), ++ U64_C(0xca273eceea26619c), U64_C(0xd186b8c721c0c207), ++ U64_C(0xeada7dd6cde0eb1e), U64_C(0xf57d4f7fee6ed178), ++ U64_C(0x06f067aa72176fba), U64_C(0x0a637dc5a2c898a6), ++ U64_C(0x113f9804bef90dae), U64_C(0x1b710b35131c471b), ++ U64_C(0x28db77f523047d84), U64_C(0x32caab7b40c72493), ++ U64_C(0x3c9ebe0a15c9bebc), U64_C(0x431d67c49c100d4c), ++ U64_C(0x4cc5d4becb3e42b6), U64_C(0x597f299cfc657e2a), ++ U64_C(0x5fcb6fab3ad6faec), U64_C(0x6c44198c4a475817) ++ }; ++ ++ ++static ASM_FUNC_ATTR_INLINE u64 ++ror64 (u64 v, u64 shift) ++{ ++ return (v >> (shift & 63)) ^ (v << ((64 - shift) & 63)); ++} ++ ++ ++static ASM_FUNC_ATTR_INLINE vector2x_u64 ++vec_rol_elems(vector2x_u64 v, unsigned int idx) ++{ ++#ifndef WORDS_BIGENDIAN ++ return vec_sld (v, v, (16 - (8 * idx)) & 15); ++#else ++ return vec_sld (v, v, (8 * idx) & 15); ++#endif ++} ++ ++ ++static ASM_FUNC_ATTR_INLINE vector2x_u64 ++vec_merge_idx0_elems(vector2x_u64 v0, vector2x_u64 v1) ++{ ++ return vec_mergeh (v0, v1); ++} ++ ++ ++static ASM_FUNC_ATTR_INLINE vector2x_u64 ++vec_vshasigma_u64(vector2x_u64 v, unsigned int a, unsigned int b) ++{ ++ asm ("vshasigmad %0,%1,%2,%3" ++ : "=v" (v) ++ : "v" (v), "g" (a), "g" (b) ++ : "memory"); ++ return v; ++} ++ ++ ++/* SHA2 round in vector registers */ ++#define R(a,b,c,d,e,f,g,h,k,w) do \ ++ { \ ++ t1 = (h); \ ++ t1 += ((k) + (w)); \ ++ t1 += Cho((e),(f),(g)); \ ++ t1 += Sum1((e)); \ ++ t2 = Sum0((a)); \ ++ t2 += Maj((a),(b),(c)); \ ++ d += t1; \ ++ h = t1 + t2; \ ++ } while (0) ++ ++#define Cho(b, c, d) (vec_sel(d, c, b)) ++ ++#define Maj(c, d, b) (vec_sel(c, b, c ^ d)) ++ ++#define Sum0(x) (vec_vshasigma_u64(x, 1, 0)) ++ ++#define Sum1(x) (vec_vshasigma_u64(x, 1, 15)) ++ ++ ++/* Message expansion on general purpose registers */ ++#define S0(x) (ror64 ((x), 1) ^ ror64 ((x), 8) ^ ((x) >> 7)) ++#define S1(x) (ror64 ((x), 19) ^ ror64 ((x), 61) ^ ((x) >> 6)) ++ ++#define I(i) ( w[i] = buf_get_be64(data + i * 8) ) ++#define WN(i) ({ w[i&0x0f] += w[(i-7) &0x0f]; \ ++ w[i&0x0f] += S0(w[(i-15)&0x0f]); \ ++ w[i&0x0f] += S1(w[(i-2) &0x0f]); \ ++ w[i&0x0f]; }) ++#define W(i) ({ u64 r = w[i&0x0f]; WN(i); r; }) ++#define L(i) w[i&0x0f] ++ ++ ++unsigned int ASM_FUNC_ATTR ++_gcry_sha512_transform_ppc8(u64 state[8], ++ const unsigned char *data, size_t nblks) ++{ ++ /* GPRs used for message expansion as vector intrinsics based generates ++ * slower code. */ ++ vector2x_u64 h0, h1, h2, h3, h4, h5, h6, h7; ++ vector2x_u64 a, b, c, d, e, f, g, h, t1, t2; ++ u64 w[16]; ++ ++ h0 = vec_vsx_ld (8 * 0, (unsigned long long *)state); ++ h1 = vec_rol_elems (h0, 1); ++ h2 = vec_vsx_ld (8 * 2, (unsigned long long *)state); ++ h3 = vec_rol_elems (h2, 1); ++ h4 = vec_vsx_ld (8 * 4, (unsigned long long *)state); ++ h5 = vec_rol_elems (h4, 1); ++ h6 = vec_vsx_ld (8 * 6, (unsigned long long *)state); ++ h7 = vec_rol_elems (h6, 1); ++ ++ while (nblks >= 2) ++ { ++ a = h0; ++ b = h1; ++ c = h2; ++ d = h3; ++ e = h4; ++ f = h5; ++ g = h6; ++ h = h7; ++ ++ I(0); I(1); I(2); I(3); ++ I(4); I(5); I(6); I(7); ++ I(8); I(9); I(10); I(11); ++ I(12); I(13); I(14); I(15); ++ data += 128; ++ R(a, b, c, d, e, f, g, h, K[0], W(0)); ++ R(h, a, b, c, d, e, f, g, K[1], W(1)); ++ R(g, h, a, b, c, d, e, f, K[2], W(2)); ++ R(f, g, h, a, b, c, d, e, K[3], W(3)); ++ R(e, f, g, h, a, b, c, d, K[4], W(4)); ++ R(d, e, f, g, h, a, b, c, K[5], W(5)); ++ R(c, d, e, f, g, h, a, b, K[6], W(6)); ++ R(b, c, d, e, f, g, h, a, K[7], W(7)); ++ R(a, b, c, d, e, f, g, h, K[8], W(8)); ++ R(h, a, b, c, d, e, f, g, K[9], W(9)); ++ R(g, h, a, b, c, d, e, f, K[10], W(10)); ++ R(f, g, h, a, b, c, d, e, K[11], W(11)); ++ R(e, f, g, h, a, b, c, d, K[12], W(12)); ++ R(d, e, f, g, h, a, b, c, K[13], W(13)); ++ R(c, d, e, f, g, h, a, b, K[14], W(14)); ++ R(b, c, d, e, f, g, h, a, K[15], W(15)); ++ ++ R(a, b, c, d, e, f, g, h, K[16], W(16)); ++ R(h, a, b, c, d, e, f, g, K[17], W(17)); ++ R(g, h, a, b, c, d, e, f, K[18], W(18)); ++ R(f, g, h, a, b, c, d, e, K[19], W(19)); ++ R(e, f, g, h, a, b, c, d, K[20], W(20)); ++ R(d, e, f, g, h, a, b, c, K[21], W(21)); ++ R(c, d, e, f, g, h, a, b, K[22], W(22)); ++ R(b, c, d, e, f, g, h, a, K[23], W(23)); ++ R(a, b, c, d, e, f, g, h, K[24], W(24)); ++ R(h, a, b, c, d, e, f, g, K[25], W(25)); ++ R(g, h, a, b, c, d, e, f, K[26], W(26)); ++ R(f, g, h, a, b, c, d, e, K[27], W(27)); ++ R(e, f, g, h, a, b, c, d, K[28], W(28)); ++ R(d, e, f, g, h, a, b, c, K[29], W(29)); ++ R(c, d, e, f, g, h, a, b, K[30], W(30)); ++ R(b, c, d, e, f, g, h, a, K[31], W(31)); ++ ++ R(a, b, c, d, e, f, g, h, K[32], W(32)); ++ R(h, a, b, c, d, e, f, g, K[33], W(33)); ++ R(g, h, a, b, c, d, e, f, K[34], W(34)); ++ R(f, g, h, a, b, c, d, e, K[35], W(35)); ++ R(e, f, g, h, a, b, c, d, K[36], W(36)); ++ R(d, e, f, g, h, a, b, c, K[37], W(37)); ++ R(c, d, e, f, g, h, a, b, K[38], W(38)); ++ R(b, c, d, e, f, g, h, a, K[39], W(39)); ++ R(a, b, c, d, e, f, g, h, K[40], W(40)); ++ R(h, a, b, c, d, e, f, g, K[41], W(41)); ++ R(g, h, a, b, c, d, e, f, K[42], W(42)); ++ R(f, g, h, a, b, c, d, e, K[43], W(43)); ++ R(e, f, g, h, a, b, c, d, K[44], W(44)); ++ R(d, e, f, g, h, a, b, c, K[45], W(45)); ++ R(c, d, e, f, g, h, a, b, K[46], W(46)); ++ R(b, c, d, e, f, g, h, a, K[47], W(47)); ++ ++ R(a, b, c, d, e, f, g, h, K[48], W(48)); ++ R(h, a, b, c, d, e, f, g, K[49], W(49)); ++ R(g, h, a, b, c, d, e, f, K[50], W(50)); ++ R(f, g, h, a, b, c, d, e, K[51], W(51)); ++ R(e, f, g, h, a, b, c, d, K[52], W(52)); ++ R(d, e, f, g, h, a, b, c, K[53], W(53)); ++ R(c, d, e, f, g, h, a, b, K[54], W(54)); ++ R(b, c, d, e, f, g, h, a, K[55], W(55)); ++ R(a, b, c, d, e, f, g, h, K[56], W(56)); ++ R(h, a, b, c, d, e, f, g, K[57], W(57)); ++ R(g, h, a, b, c, d, e, f, K[58], W(58)); ++ R(f, g, h, a, b, c, d, e, K[59], W(59)); ++ R(e, f, g, h, a, b, c, d, K[60], W(60)); ++ R(d, e, f, g, h, a, b, c, K[61], W(61)); ++ R(c, d, e, f, g, h, a, b, K[62], W(62)); ++ R(b, c, d, e, f, g, h, a, K[63], W(63)); ++ ++ R(a, b, c, d, e, f, g, h, K[64], L(64)); ++ R(h, a, b, c, d, e, f, g, K[65], L(65)); ++ R(g, h, a, b, c, d, e, f, K[66], L(66)); ++ R(f, g, h, a, b, c, d, e, K[67], L(67)); ++ I(0); I(1); I(2); I(3); ++ R(e, f, g, h, a, b, c, d, K[68], L(68)); ++ R(d, e, f, g, h, a, b, c, K[69], L(69)); ++ R(c, d, e, f, g, h, a, b, K[70], L(70)); ++ R(b, c, d, e, f, g, h, a, K[71], L(71)); ++ I(4); I(5); I(6); I(7); ++ R(a, b, c, d, e, f, g, h, K[72], L(72)); ++ R(h, a, b, c, d, e, f, g, K[73], L(73)); ++ R(g, h, a, b, c, d, e, f, K[74], L(74)); ++ R(f, g, h, a, b, c, d, e, K[75], L(75)); ++ I(8); I(9); I(10); I(11); ++ R(e, f, g, h, a, b, c, d, K[76], L(76)); ++ R(d, e, f, g, h, a, b, c, K[77], L(77)); ++ R(c, d, e, f, g, h, a, b, K[78], L(78)); ++ R(b, c, d, e, f, g, h, a, K[79], L(79)); ++ I(12); I(13); I(14); I(15); ++ data += 128; ++ ++ h0 += a; ++ h1 += b; ++ h2 += c; ++ h3 += d; ++ h4 += e; ++ h5 += f; ++ h6 += g; ++ h7 += h; ++ a = h0; ++ b = h1; ++ c = h2; ++ d = h3; ++ e = h4; ++ f = h5; ++ g = h6; ++ h = h7; ++ ++ R(a, b, c, d, e, f, g, h, K[0], W(0)); ++ R(h, a, b, c, d, e, f, g, K[1], W(1)); ++ R(g, h, a, b, c, d, e, f, K[2], W(2)); ++ R(f, g, h, a, b, c, d, e, K[3], W(3)); ++ R(e, f, g, h, a, b, c, d, K[4], W(4)); ++ R(d, e, f, g, h, a, b, c, K[5], W(5)); ++ R(c, d, e, f, g, h, a, b, K[6], W(6)); ++ R(b, c, d, e, f, g, h, a, K[7], W(7)); ++ R(a, b, c, d, e, f, g, h, K[8], W(8)); ++ R(h, a, b, c, d, e, f, g, K[9], W(9)); ++ R(g, h, a, b, c, d, e, f, K[10], W(10)); ++ R(f, g, h, a, b, c, d, e, K[11], W(11)); ++ R(e, f, g, h, a, b, c, d, K[12], W(12)); ++ R(d, e, f, g, h, a, b, c, K[13], W(13)); ++ R(c, d, e, f, g, h, a, b, K[14], W(14)); ++ R(b, c, d, e, f, g, h, a, K[15], W(15)); ++ ++ R(a, b, c, d, e, f, g, h, K[16], W(16)); ++ R(h, a, b, c, d, e, f, g, K[17], W(17)); ++ R(g, h, a, b, c, d, e, f, K[18], W(18)); ++ R(f, g, h, a, b, c, d, e, K[19], W(19)); ++ R(e, f, g, h, a, b, c, d, K[20], W(20)); ++ R(d, e, f, g, h, a, b, c, K[21], W(21)); ++ R(c, d, e, f, g, h, a, b, K[22], W(22)); ++ R(b, c, d, e, f, g, h, a, K[23], W(23)); ++ R(a, b, c, d, e, f, g, h, K[24], W(24)); ++ R(h, a, b, c, d, e, f, g, K[25], W(25)); ++ R(g, h, a, b, c, d, e, f, K[26], W(26)); ++ R(f, g, h, a, b, c, d, e, K[27], W(27)); ++ R(e, f, g, h, a, b, c, d, K[28], W(28)); ++ R(d, e, f, g, h, a, b, c, K[29], W(29)); ++ R(c, d, e, f, g, h, a, b, K[30], W(30)); ++ R(b, c, d, e, f, g, h, a, K[31], W(31)); ++ ++ R(a, b, c, d, e, f, g, h, K[32], W(32)); ++ R(h, a, b, c, d, e, f, g, K[33], W(33)); ++ R(g, h, a, b, c, d, e, f, K[34], W(34)); ++ R(f, g, h, a, b, c, d, e, K[35], W(35)); ++ R(e, f, g, h, a, b, c, d, K[36], W(36)); ++ R(d, e, f, g, h, a, b, c, K[37], W(37)); ++ R(c, d, e, f, g, h, a, b, K[38], W(38)); ++ R(b, c, d, e, f, g, h, a, K[39], W(39)); ++ R(a, b, c, d, e, f, g, h, K[40], W(40)); ++ R(h, a, b, c, d, e, f, g, K[41], W(41)); ++ R(g, h, a, b, c, d, e, f, K[42], W(42)); ++ R(f, g, h, a, b, c, d, e, K[43], W(43)); ++ R(e, f, g, h, a, b, c, d, K[44], W(44)); ++ R(d, e, f, g, h, a, b, c, K[45], W(45)); ++ R(c, d, e, f, g, h, a, b, K[46], W(46)); ++ R(b, c, d, e, f, g, h, a, K[47], W(47)); ++ ++ R(a, b, c, d, e, f, g, h, K[48], W(48)); ++ R(h, a, b, c, d, e, f, g, K[49], W(49)); ++ R(g, h, a, b, c, d, e, f, K[50], W(50)); ++ R(f, g, h, a, b, c, d, e, K[51], W(51)); ++ R(e, f, g, h, a, b, c, d, K[52], W(52)); ++ R(d, e, f, g, h, a, b, c, K[53], W(53)); ++ R(c, d, e, f, g, h, a, b, K[54], W(54)); ++ R(b, c, d, e, f, g, h, a, K[55], W(55)); ++ R(a, b, c, d, e, f, g, h, K[56], W(56)); ++ R(h, a, b, c, d, e, f, g, K[57], W(57)); ++ R(g, h, a, b, c, d, e, f, K[58], W(58)); ++ R(f, g, h, a, b, c, d, e, K[59], W(59)); ++ R(e, f, g, h, a, b, c, d, K[60], W(60)); ++ R(d, e, f, g, h, a, b, c, K[61], W(61)); ++ R(c, d, e, f, g, h, a, b, K[62], W(62)); ++ R(b, c, d, e, f, g, h, a, K[63], W(63)); ++ ++ R(a, b, c, d, e, f, g, h, K[64], L(64)); ++ R(h, a, b, c, d, e, f, g, K[65], L(65)); ++ R(g, h, a, b, c, d, e, f, K[66], L(66)); ++ R(f, g, h, a, b, c, d, e, K[67], L(67)); ++ R(e, f, g, h, a, b, c, d, K[68], L(68)); ++ R(d, e, f, g, h, a, b, c, K[69], L(69)); ++ R(c, d, e, f, g, h, a, b, K[70], L(70)); ++ R(b, c, d, e, f, g, h, a, K[71], L(71)); ++ R(a, b, c, d, e, f, g, h, K[72], L(72)); ++ R(h, a, b, c, d, e, f, g, K[73], L(73)); ++ R(g, h, a, b, c, d, e, f, K[74], L(74)); ++ R(f, g, h, a, b, c, d, e, K[75], L(75)); ++ R(e, f, g, h, a, b, c, d, K[76], L(76)); ++ R(d, e, f, g, h, a, b, c, K[77], L(77)); ++ R(c, d, e, f, g, h, a, b, K[78], L(78)); ++ R(b, c, d, e, f, g, h, a, K[79], L(79)); ++ ++ h0 += a; ++ h1 += b; ++ h2 += c; ++ h3 += d; ++ h4 += e; ++ h5 += f; ++ h6 += g; ++ h7 += h; ++ ++ nblks -= 2; ++ } ++ ++ while (nblks) ++ { ++ a = h0; ++ b = h1; ++ c = h2; ++ d = h3; ++ e = h4; ++ f = h5; ++ g = h6; ++ h = h7; ++ ++ I(0); I(1); I(2); I(3); ++ I(4); I(5); I(6); I(7); ++ I(8); I(9); I(10); I(11); ++ I(12); I(13); I(14); I(15); ++ data += 128; ++ R(a, b, c, d, e, f, g, h, K[0], W(0)); ++ R(h, a, b, c, d, e, f, g, K[1], W(1)); ++ R(g, h, a, b, c, d, e, f, K[2], W(2)); ++ R(f, g, h, a, b, c, d, e, K[3], W(3)); ++ R(e, f, g, h, a, b, c, d, K[4], W(4)); ++ R(d, e, f, g, h, a, b, c, K[5], W(5)); ++ R(c, d, e, f, g, h, a, b, K[6], W(6)); ++ R(b, c, d, e, f, g, h, a, K[7], W(7)); ++ R(a, b, c, d, e, f, g, h, K[8], W(8)); ++ R(h, a, b, c, d, e, f, g, K[9], W(9)); ++ R(g, h, a, b, c, d, e, f, K[10], W(10)); ++ R(f, g, h, a, b, c, d, e, K[11], W(11)); ++ R(e, f, g, h, a, b, c, d, K[12], W(12)); ++ R(d, e, f, g, h, a, b, c, K[13], W(13)); ++ R(c, d, e, f, g, h, a, b, K[14], W(14)); ++ R(b, c, d, e, f, g, h, a, K[15], W(15)); ++ ++ R(a, b, c, d, e, f, g, h, K[16], W(16)); ++ R(h, a, b, c, d, e, f, g, K[17], W(17)); ++ R(g, h, a, b, c, d, e, f, K[18], W(18)); ++ R(f, g, h, a, b, c, d, e, K[19], W(19)); ++ R(e, f, g, h, a, b, c, d, K[20], W(20)); ++ R(d, e, f, g, h, a, b, c, K[21], W(21)); ++ R(c, d, e, f, g, h, a, b, K[22], W(22)); ++ R(b, c, d, e, f, g, h, a, K[23], W(23)); ++ R(a, b, c, d, e, f, g, h, K[24], W(24)); ++ R(h, a, b, c, d, e, f, g, K[25], W(25)); ++ R(g, h, a, b, c, d, e, f, K[26], W(26)); ++ R(f, g, h, a, b, c, d, e, K[27], W(27)); ++ R(e, f, g, h, a, b, c, d, K[28], W(28)); ++ R(d, e, f, g, h, a, b, c, K[29], W(29)); ++ R(c, d, e, f, g, h, a, b, K[30], W(30)); ++ R(b, c, d, e, f, g, h, a, K[31], W(31)); ++ ++ R(a, b, c, d, e, f, g, h, K[32], W(32)); ++ R(h, a, b, c, d, e, f, g, K[33], W(33)); ++ R(g, h, a, b, c, d, e, f, K[34], W(34)); ++ R(f, g, h, a, b, c, d, e, K[35], W(35)); ++ R(e, f, g, h, a, b, c, d, K[36], W(36)); ++ R(d, e, f, g, h, a, b, c, K[37], W(37)); ++ R(c, d, e, f, g, h, a, b, K[38], W(38)); ++ R(b, c, d, e, f, g, h, a, K[39], W(39)); ++ R(a, b, c, d, e, f, g, h, K[40], W(40)); ++ R(h, a, b, c, d, e, f, g, K[41], W(41)); ++ R(g, h, a, b, c, d, e, f, K[42], W(42)); ++ R(f, g, h, a, b, c, d, e, K[43], W(43)); ++ R(e, f, g, h, a, b, c, d, K[44], W(44)); ++ R(d, e, f, g, h, a, b, c, K[45], W(45)); ++ R(c, d, e, f, g, h, a, b, K[46], W(46)); ++ R(b, c, d, e, f, g, h, a, K[47], W(47)); ++ ++ R(a, b, c, d, e, f, g, h, K[48], W(48)); ++ R(h, a, b, c, d, e, f, g, K[49], W(49)); ++ R(g, h, a, b, c, d, e, f, K[50], W(50)); ++ R(f, g, h, a, b, c, d, e, K[51], W(51)); ++ R(e, f, g, h, a, b, c, d, K[52], W(52)); ++ R(d, e, f, g, h, a, b, c, K[53], W(53)); ++ R(c, d, e, f, g, h, a, b, K[54], W(54)); ++ R(b, c, d, e, f, g, h, a, K[55], W(55)); ++ R(a, b, c, d, e, f, g, h, K[56], W(56)); ++ R(h, a, b, c, d, e, f, g, K[57], W(57)); ++ R(g, h, a, b, c, d, e, f, K[58], W(58)); ++ R(f, g, h, a, b, c, d, e, K[59], W(59)); ++ R(e, f, g, h, a, b, c, d, K[60], W(60)); ++ R(d, e, f, g, h, a, b, c, K[61], W(61)); ++ R(c, d, e, f, g, h, a, b, K[62], W(62)); ++ R(b, c, d, e, f, g, h, a, K[63], W(63)); ++ ++ R(a, b, c, d, e, f, g, h, K[64], L(64)); ++ R(h, a, b, c, d, e, f, g, K[65], L(65)); ++ R(g, h, a, b, c, d, e, f, K[66], L(66)); ++ R(f, g, h, a, b, c, d, e, K[67], L(67)); ++ R(e, f, g, h, a, b, c, d, K[68], L(68)); ++ R(d, e, f, g, h, a, b, c, K[69], L(69)); ++ R(c, d, e, f, g, h, a, b, K[70], L(70)); ++ R(b, c, d, e, f, g, h, a, K[71], L(71)); ++ R(a, b, c, d, e, f, g, h, K[72], L(72)); ++ R(h, a, b, c, d, e, f, g, K[73], L(73)); ++ R(g, h, a, b, c, d, e, f, K[74], L(74)); ++ R(f, g, h, a, b, c, d, e, K[75], L(75)); ++ R(e, f, g, h, a, b, c, d, K[76], L(76)); ++ R(d, e, f, g, h, a, b, c, K[77], L(77)); ++ R(c, d, e, f, g, h, a, b, K[78], L(78)); ++ R(b, c, d, e, f, g, h, a, K[79], L(79)); ++ ++ h0 += a; ++ h1 += b; ++ h2 += c; ++ h3 += d; ++ h4 += e; ++ h5 += f; ++ h6 += g; ++ h7 += h; ++ ++ nblks--; ++ } ++ ++ h0 = vec_merge_idx0_elems (h0, h1); ++ h2 = vec_merge_idx0_elems (h2, h3); ++ h4 = vec_merge_idx0_elems (h4, h5); ++ h6 = vec_merge_idx0_elems (h6, h7); ++ vec_vsx_st (h0, 8 * 0, (unsigned long long *)state); ++ vec_vsx_st (h2, 8 * 2, (unsigned long long *)state); ++ vec_vsx_st (h4, 8 * 4, (unsigned long long *)state); ++ vec_vsx_st (h6, 8 * 6, (unsigned long long *)state); ++ ++ return sizeof(w); ++} ++#undef R ++#undef Cho ++#undef Maj ++#undef Sum0 ++#undef Sum1 ++#undef S0 ++#undef S1 ++#undef I ++#undef W ++#undef I2 ++#undef W2 ++#undef R2 ++ ++ ++/* SHA2 round in general purpose registers */ ++#define R(a,b,c,d,e,f,g,h,k,w) do \ ++ { \ ++ t1 = (h) + Sum1((e)) + Cho((e),(f),(g)) + ((k) + (w));\ ++ t2 = Sum0((a)) + Maj((a),(b),(c)); \ ++ d += t1; \ ++ h = t1 + t2; \ ++ } while (0) ++ ++#define Cho(x, y, z) ((x & y) + (~x & z)) ++ ++#define Maj(z, x, y) ((x & y) + (z & (x ^ y))) ++ ++#define Sum0(x) (ror64(x, 28) ^ ror64(x ^ ror64(x, 39-34), 34)) ++ ++#define Sum1(x) (ror64(x, 14) ^ ror64(x, 18) ^ ror64(x, 41)) ++ ++ ++/* Message expansion on general purpose registers */ ++#define S0(x) (ror64 ((x), 1) ^ ror64 ((x), 8) ^ ((x) >> 7)) ++#define S1(x) (ror64 ((x), 19) ^ ror64 ((x), 61) ^ ((x) >> 6)) ++ ++#define I(i) ( w[i] = buf_get_be64(data + i * 8) ) ++#define WN(i) ({ w[i&0x0f] += w[(i-7) &0x0f]; \ ++ w[i&0x0f] += S0(w[(i-15)&0x0f]); \ ++ w[i&0x0f] += S1(w[(i-2) &0x0f]); \ ++ w[i&0x0f]; }) ++#define W(i) ({ u64 r = w[i&0x0f]; WN(i); r; }) ++#define L(i) w[i&0x0f] ++ ++ ++unsigned int ASM_FUNC_ATTR ++_gcry_sha512_transform_ppc9(u64 state[8], const unsigned char *data, ++ size_t nblks) ++{ ++ /* GPRs used for round function and message expansion as vector intrinsics ++ * based generates slower code for POWER9. */ ++ u64 a, b, c, d, e, f, g, h, t1, t2; ++ u64 w[16]; ++ ++ a = state[0]; ++ b = state[1]; ++ c = state[2]; ++ d = state[3]; ++ e = state[4]; ++ f = state[5]; ++ g = state[6]; ++ h = state[7]; ++ ++ while (nblks >= 2) ++ { ++ I(0); I(1); I(2); I(3); ++ I(4); I(5); I(6); I(7); ++ I(8); I(9); I(10); I(11); ++ I(12); I(13); I(14); I(15); ++ data += 128; ++ R(a, b, c, d, e, f, g, h, K[0], W(0)); ++ R(h, a, b, c, d, e, f, g, K[1], W(1)); ++ R(g, h, a, b, c, d, e, f, K[2], W(2)); ++ R(f, g, h, a, b, c, d, e, K[3], W(3)); ++ R(e, f, g, h, a, b, c, d, K[4], W(4)); ++ R(d, e, f, g, h, a, b, c, K[5], W(5)); ++ R(c, d, e, f, g, h, a, b, K[6], W(6)); ++ R(b, c, d, e, f, g, h, a, K[7], W(7)); ++ R(a, b, c, d, e, f, g, h, K[8], W(8)); ++ R(h, a, b, c, d, e, f, g, K[9], W(9)); ++ R(g, h, a, b, c, d, e, f, K[10], W(10)); ++ R(f, g, h, a, b, c, d, e, K[11], W(11)); ++ R(e, f, g, h, a, b, c, d, K[12], W(12)); ++ R(d, e, f, g, h, a, b, c, K[13], W(13)); ++ R(c, d, e, f, g, h, a, b, K[14], W(14)); ++ R(b, c, d, e, f, g, h, a, K[15], W(15)); ++ ++ R(a, b, c, d, e, f, g, h, K[16], W(16)); ++ R(h, a, b, c, d, e, f, g, K[17], W(17)); ++ R(g, h, a, b, c, d, e, f, K[18], W(18)); ++ R(f, g, h, a, b, c, d, e, K[19], W(19)); ++ R(e, f, g, h, a, b, c, d, K[20], W(20)); ++ R(d, e, f, g, h, a, b, c, K[21], W(21)); ++ R(c, d, e, f, g, h, a, b, K[22], W(22)); ++ R(b, c, d, e, f, g, h, a, K[23], W(23)); ++ R(a, b, c, d, e, f, g, h, K[24], W(24)); ++ R(h, a, b, c, d, e, f, g, K[25], W(25)); ++ R(g, h, a, b, c, d, e, f, K[26], W(26)); ++ R(f, g, h, a, b, c, d, e, K[27], W(27)); ++ R(e, f, g, h, a, b, c, d, K[28], W(28)); ++ R(d, e, f, g, h, a, b, c, K[29], W(29)); ++ R(c, d, e, f, g, h, a, b, K[30], W(30)); ++ R(b, c, d, e, f, g, h, a, K[31], W(31)); ++ ++ R(a, b, c, d, e, f, g, h, K[32], W(32)); ++ R(h, a, b, c, d, e, f, g, K[33], W(33)); ++ R(g, h, a, b, c, d, e, f, K[34], W(34)); ++ R(f, g, h, a, b, c, d, e, K[35], W(35)); ++ R(e, f, g, h, a, b, c, d, K[36], W(36)); ++ R(d, e, f, g, h, a, b, c, K[37], W(37)); ++ R(c, d, e, f, g, h, a, b, K[38], W(38)); ++ R(b, c, d, e, f, g, h, a, K[39], W(39)); ++ R(a, b, c, d, e, f, g, h, K[40], W(40)); ++ R(h, a, b, c, d, e, f, g, K[41], W(41)); ++ R(g, h, a, b, c, d, e, f, K[42], W(42)); ++ R(f, g, h, a, b, c, d, e, K[43], W(43)); ++ R(e, f, g, h, a, b, c, d, K[44], W(44)); ++ R(d, e, f, g, h, a, b, c, K[45], W(45)); ++ R(c, d, e, f, g, h, a, b, K[46], W(46)); ++ R(b, c, d, e, f, g, h, a, K[47], W(47)); ++ ++ R(a, b, c, d, e, f, g, h, K[48], W(48)); ++ R(h, a, b, c, d, e, f, g, K[49], W(49)); ++ R(g, h, a, b, c, d, e, f, K[50], W(50)); ++ R(f, g, h, a, b, c, d, e, K[51], W(51)); ++ R(e, f, g, h, a, b, c, d, K[52], W(52)); ++ R(d, e, f, g, h, a, b, c, K[53], W(53)); ++ R(c, d, e, f, g, h, a, b, K[54], W(54)); ++ R(b, c, d, e, f, g, h, a, K[55], W(55)); ++ R(a, b, c, d, e, f, g, h, K[56], W(56)); ++ R(h, a, b, c, d, e, f, g, K[57], W(57)); ++ R(g, h, a, b, c, d, e, f, K[58], W(58)); ++ R(f, g, h, a, b, c, d, e, K[59], W(59)); ++ R(e, f, g, h, a, b, c, d, K[60], W(60)); ++ R(d, e, f, g, h, a, b, c, K[61], W(61)); ++ R(c, d, e, f, g, h, a, b, K[62], W(62)); ++ R(b, c, d, e, f, g, h, a, K[63], W(63)); ++ ++ R(a, b, c, d, e, f, g, h, K[64], L(64)); ++ R(h, a, b, c, d, e, f, g, K[65], L(65)); ++ R(g, h, a, b, c, d, e, f, K[66], L(66)); ++ R(f, g, h, a, b, c, d, e, K[67], L(67)); ++ I(0); I(1); I(2); I(3); ++ R(e, f, g, h, a, b, c, d, K[68], L(68)); ++ R(d, e, f, g, h, a, b, c, K[69], L(69)); ++ R(c, d, e, f, g, h, a, b, K[70], L(70)); ++ R(b, c, d, e, f, g, h, a, K[71], L(71)); ++ I(4); I(5); I(6); I(7); ++ R(a, b, c, d, e, f, g, h, K[72], L(72)); ++ R(h, a, b, c, d, e, f, g, K[73], L(73)); ++ R(g, h, a, b, c, d, e, f, K[74], L(74)); ++ R(f, g, h, a, b, c, d, e, K[75], L(75)); ++ I(8); I(9); I(10); I(11); ++ R(e, f, g, h, a, b, c, d, K[76], L(76)); ++ R(d, e, f, g, h, a, b, c, K[77], L(77)); ++ R(c, d, e, f, g, h, a, b, K[78], L(78)); ++ R(b, c, d, e, f, g, h, a, K[79], L(79)); ++ I(12); I(13); I(14); I(15); ++ data += 128; ++ ++ a += state[0]; ++ b += state[1]; ++ c += state[2]; ++ d += state[3]; ++ e += state[4]; ++ f += state[5]; ++ g += state[6]; ++ h += state[7]; ++ state[0] = a; ++ state[1] = b; ++ state[2] = c; ++ state[3] = d; ++ state[4] = e; ++ state[5] = f; ++ state[6] = g; ++ state[7] = h; ++ ++ R(a, b, c, d, e, f, g, h, K[0], W(0)); ++ R(h, a, b, c, d, e, f, g, K[1], W(1)); ++ R(g, h, a, b, c, d, e, f, K[2], W(2)); ++ R(f, g, h, a, b, c, d, e, K[3], W(3)); ++ R(e, f, g, h, a, b, c, d, K[4], W(4)); ++ R(d, e, f, g, h, a, b, c, K[5], W(5)); ++ R(c, d, e, f, g, h, a, b, K[6], W(6)); ++ R(b, c, d, e, f, g, h, a, K[7], W(7)); ++ R(a, b, c, d, e, f, g, h, K[8], W(8)); ++ R(h, a, b, c, d, e, f, g, K[9], W(9)); ++ R(g, h, a, b, c, d, e, f, K[10], W(10)); ++ R(f, g, h, a, b, c, d, e, K[11], W(11)); ++ R(e, f, g, h, a, b, c, d, K[12], W(12)); ++ R(d, e, f, g, h, a, b, c, K[13], W(13)); ++ R(c, d, e, f, g, h, a, b, K[14], W(14)); ++ R(b, c, d, e, f, g, h, a, K[15], W(15)); ++ ++ R(a, b, c, d, e, f, g, h, K[16], W(16)); ++ R(h, a, b, c, d, e, f, g, K[17], W(17)); ++ R(g, h, a, b, c, d, e, f, K[18], W(18)); ++ R(f, g, h, a, b, c, d, e, K[19], W(19)); ++ R(e, f, g, h, a, b, c, d, K[20], W(20)); ++ R(d, e, f, g, h, a, b, c, K[21], W(21)); ++ R(c, d, e, f, g, h, a, b, K[22], W(22)); ++ R(b, c, d, e, f, g, h, a, K[23], W(23)); ++ R(a, b, c, d, e, f, g, h, K[24], W(24)); ++ R(h, a, b, c, d, e, f, g, K[25], W(25)); ++ R(g, h, a, b, c, d, e, f, K[26], W(26)); ++ R(f, g, h, a, b, c, d, e, K[27], W(27)); ++ R(e, f, g, h, a, b, c, d, K[28], W(28)); ++ R(d, e, f, g, h, a, b, c, K[29], W(29)); ++ R(c, d, e, f, g, h, a, b, K[30], W(30)); ++ R(b, c, d, e, f, g, h, a, K[31], W(31)); ++ ++ R(a, b, c, d, e, f, g, h, K[32], W(32)); ++ R(h, a, b, c, d, e, f, g, K[33], W(33)); ++ R(g, h, a, b, c, d, e, f, K[34], W(34)); ++ R(f, g, h, a, b, c, d, e, K[35], W(35)); ++ R(e, f, g, h, a, b, c, d, K[36], W(36)); ++ R(d, e, f, g, h, a, b, c, K[37], W(37)); ++ R(c, d, e, f, g, h, a, b, K[38], W(38)); ++ R(b, c, d, e, f, g, h, a, K[39], W(39)); ++ R(a, b, c, d, e, f, g, h, K[40], W(40)); ++ R(h, a, b, c, d, e, f, g, K[41], W(41)); ++ R(g, h, a, b, c, d, e, f, K[42], W(42)); ++ R(f, g, h, a, b, c, d, e, K[43], W(43)); ++ R(e, f, g, h, a, b, c, d, K[44], W(44)); ++ R(d, e, f, g, h, a, b, c, K[45], W(45)); ++ R(c, d, e, f, g, h, a, b, K[46], W(46)); ++ R(b, c, d, e, f, g, h, a, K[47], W(47)); ++ ++ R(a, b, c, d, e, f, g, h, K[48], W(48)); ++ R(h, a, b, c, d, e, f, g, K[49], W(49)); ++ R(g, h, a, b, c, d, e, f, K[50], W(50)); ++ R(f, g, h, a, b, c, d, e, K[51], W(51)); ++ R(e, f, g, h, a, b, c, d, K[52], W(52)); ++ R(d, e, f, g, h, a, b, c, K[53], W(53)); ++ R(c, d, e, f, g, h, a, b, K[54], W(54)); ++ R(b, c, d, e, f, g, h, a, K[55], W(55)); ++ R(a, b, c, d, e, f, g, h, K[56], W(56)); ++ R(h, a, b, c, d, e, f, g, K[57], W(57)); ++ R(g, h, a, b, c, d, e, f, K[58], W(58)); ++ R(f, g, h, a, b, c, d, e, K[59], W(59)); ++ R(e, f, g, h, a, b, c, d, K[60], W(60)); ++ R(d, e, f, g, h, a, b, c, K[61], W(61)); ++ R(c, d, e, f, g, h, a, b, K[62], W(62)); ++ R(b, c, d, e, f, g, h, a, K[63], W(63)); ++ ++ R(a, b, c, d, e, f, g, h, K[64], L(64)); ++ R(h, a, b, c, d, e, f, g, K[65], L(65)); ++ R(g, h, a, b, c, d, e, f, K[66], L(66)); ++ R(f, g, h, a, b, c, d, e, K[67], L(67)); ++ R(e, f, g, h, a, b, c, d, K[68], L(68)); ++ R(d, e, f, g, h, a, b, c, K[69], L(69)); ++ R(c, d, e, f, g, h, a, b, K[70], L(70)); ++ R(b, c, d, e, f, g, h, a, K[71], L(71)); ++ R(a, b, c, d, e, f, g, h, K[72], L(72)); ++ R(h, a, b, c, d, e, f, g, K[73], L(73)); ++ R(g, h, a, b, c, d, e, f, K[74], L(74)); ++ R(f, g, h, a, b, c, d, e, K[75], L(75)); ++ R(e, f, g, h, a, b, c, d, K[76], L(76)); ++ R(d, e, f, g, h, a, b, c, K[77], L(77)); ++ R(c, d, e, f, g, h, a, b, K[78], L(78)); ++ R(b, c, d, e, f, g, h, a, K[79], L(79)); ++ ++ a += state[0]; ++ b += state[1]; ++ c += state[2]; ++ d += state[3]; ++ e += state[4]; ++ f += state[5]; ++ g += state[6]; ++ h += state[7]; ++ state[0] = a; ++ state[1] = b; ++ state[2] = c; ++ state[3] = d; ++ state[4] = e; ++ state[5] = f; ++ state[6] = g; ++ state[7] = h; ++ ++ nblks -= 2; ++ } ++ ++ while (nblks) ++ { ++ I(0); I(1); I(2); I(3); ++ I(4); I(5); I(6); I(7); ++ I(8); I(9); I(10); I(11); ++ I(12); I(13); I(14); I(15); ++ data += 128; ++ R(a, b, c, d, e, f, g, h, K[0], W(0)); ++ R(h, a, b, c, d, e, f, g, K[1], W(1)); ++ R(g, h, a, b, c, d, e, f, K[2], W(2)); ++ R(f, g, h, a, b, c, d, e, K[3], W(3)); ++ R(e, f, g, h, a, b, c, d, K[4], W(4)); ++ R(d, e, f, g, h, a, b, c, K[5], W(5)); ++ R(c, d, e, f, g, h, a, b, K[6], W(6)); ++ R(b, c, d, e, f, g, h, a, K[7], W(7)); ++ R(a, b, c, d, e, f, g, h, K[8], W(8)); ++ R(h, a, b, c, d, e, f, g, K[9], W(9)); ++ R(g, h, a, b, c, d, e, f, K[10], W(10)); ++ R(f, g, h, a, b, c, d, e, K[11], W(11)); ++ R(e, f, g, h, a, b, c, d, K[12], W(12)); ++ R(d, e, f, g, h, a, b, c, K[13], W(13)); ++ R(c, d, e, f, g, h, a, b, K[14], W(14)); ++ R(b, c, d, e, f, g, h, a, K[15], W(15)); ++ ++ R(a, b, c, d, e, f, g, h, K[16], W(16)); ++ R(h, a, b, c, d, e, f, g, K[17], W(17)); ++ R(g, h, a, b, c, d, e, f, K[18], W(18)); ++ R(f, g, h, a, b, c, d, e, K[19], W(19)); ++ R(e, f, g, h, a, b, c, d, K[20], W(20)); ++ R(d, e, f, g, h, a, b, c, K[21], W(21)); ++ R(c, d, e, f, g, h, a, b, K[22], W(22)); ++ R(b, c, d, e, f, g, h, a, K[23], W(23)); ++ R(a, b, c, d, e, f, g, h, K[24], W(24)); ++ R(h, a, b, c, d, e, f, g, K[25], W(25)); ++ R(g, h, a, b, c, d, e, f, K[26], W(26)); ++ R(f, g, h, a, b, c, d, e, K[27], W(27)); ++ R(e, f, g, h, a, b, c, d, K[28], W(28)); ++ R(d, e, f, g, h, a, b, c, K[29], W(29)); ++ R(c, d, e, f, g, h, a, b, K[30], W(30)); ++ R(b, c, d, e, f, g, h, a, K[31], W(31)); ++ ++ R(a, b, c, d, e, f, g, h, K[32], W(32)); ++ R(h, a, b, c, d, e, f, g, K[33], W(33)); ++ R(g, h, a, b, c, d, e, f, K[34], W(34)); ++ R(f, g, h, a, b, c, d, e, K[35], W(35)); ++ R(e, f, g, h, a, b, c, d, K[36], W(36)); ++ R(d, e, f, g, h, a, b, c, K[37], W(37)); ++ R(c, d, e, f, g, h, a, b, K[38], W(38)); ++ R(b, c, d, e, f, g, h, a, K[39], W(39)); ++ R(a, b, c, d, e, f, g, h, K[40], W(40)); ++ R(h, a, b, c, d, e, f, g, K[41], W(41)); ++ R(g, h, a, b, c, d, e, f, K[42], W(42)); ++ R(f, g, h, a, b, c, d, e, K[43], W(43)); ++ R(e, f, g, h, a, b, c, d, K[44], W(44)); ++ R(d, e, f, g, h, a, b, c, K[45], W(45)); ++ R(c, d, e, f, g, h, a, b, K[46], W(46)); ++ R(b, c, d, e, f, g, h, a, K[47], W(47)); ++ ++ R(a, b, c, d, e, f, g, h, K[48], W(48)); ++ R(h, a, b, c, d, e, f, g, K[49], W(49)); ++ R(g, h, a, b, c, d, e, f, K[50], W(50)); ++ R(f, g, h, a, b, c, d, e, K[51], W(51)); ++ R(e, f, g, h, a, b, c, d, K[52], W(52)); ++ R(d, e, f, g, h, a, b, c, K[53], W(53)); ++ R(c, d, e, f, g, h, a, b, K[54], W(54)); ++ R(b, c, d, e, f, g, h, a, K[55], W(55)); ++ R(a, b, c, d, e, f, g, h, K[56], W(56)); ++ R(h, a, b, c, d, e, f, g, K[57], W(57)); ++ R(g, h, a, b, c, d, e, f, K[58], W(58)); ++ R(f, g, h, a, b, c, d, e, K[59], W(59)); ++ R(e, f, g, h, a, b, c, d, K[60], W(60)); ++ R(d, e, f, g, h, a, b, c, K[61], W(61)); ++ R(c, d, e, f, g, h, a, b, K[62], W(62)); ++ R(b, c, d, e, f, g, h, a, K[63], W(63)); ++ ++ R(a, b, c, d, e, f, g, h, K[64], L(64)); ++ R(h, a, b, c, d, e, f, g, K[65], L(65)); ++ R(g, h, a, b, c, d, e, f, K[66], L(66)); ++ R(f, g, h, a, b, c, d, e, K[67], L(67)); ++ R(e, f, g, h, a, b, c, d, K[68], L(68)); ++ R(d, e, f, g, h, a, b, c, K[69], L(69)); ++ R(c, d, e, f, g, h, a, b, K[70], L(70)); ++ R(b, c, d, e, f, g, h, a, K[71], L(71)); ++ R(a, b, c, d, e, f, g, h, K[72], L(72)); ++ R(h, a, b, c, d, e, f, g, K[73], L(73)); ++ R(g, h, a, b, c, d, e, f, K[74], L(74)); ++ R(f, g, h, a, b, c, d, e, K[75], L(75)); ++ R(e, f, g, h, a, b, c, d, K[76], L(76)); ++ R(d, e, f, g, h, a, b, c, K[77], L(77)); ++ R(c, d, e, f, g, h, a, b, K[78], L(78)); ++ R(b, c, d, e, f, g, h, a, K[79], L(79)); ++ ++ a += state[0]; ++ b += state[1]; ++ c += state[2]; ++ d += state[3]; ++ e += state[4]; ++ f += state[5]; ++ g += state[6]; ++ h += state[7]; ++ state[0] = a; ++ state[1] = b; ++ state[2] = c; ++ state[3] = d; ++ state[4] = e; ++ state[5] = f; ++ state[6] = g; ++ state[7] = h; ++ ++ nblks--; ++ } ++ ++ return sizeof(w); ++} ++ ++#endif /* ENABLE_PPC_CRYPTO_SUPPORT */ +diff --git a/cipher/sha512.c b/cipher/sha512.c +index 06e8a2b9..b8035eca 100644 +--- a/cipher/sha512.c ++++ b/cipher/sha512.c +@@ -104,6 +104,19 @@ + #endif + + ++/* USE_PPC_CRYPTO indicates whether to enable PowerPC vector crypto ++ * accelerated code. */ ++#undef USE_PPC_CRYPTO ++#ifdef ENABLE_PPC_CRYPTO_SUPPORT ++# if defined(HAVE_COMPATIBLE_CC_PPC_ALTIVEC) && \ ++ defined(HAVE_GCC_INLINE_ASM_PPC_ALTIVEC) ++# if __GNUC__ >= 4 ++# define USE_PPC_CRYPTO 1 ++# endif ++# endif ++#endif ++ ++ + typedef struct + { + u64 h0, h1, h2, h3, h4, h5, h6, h7; +@@ -130,6 +143,31 @@ typedef struct + static unsigned int + transform (void *context, const unsigned char *data, size_t nblks); + ++#ifdef USE_PPC_CRYPTO ++unsigned int _gcry_sha512_transform_ppc8(u64 state[8], ++ const unsigned char *input_data, ++ size_t num_blks); ++ ++unsigned int _gcry_sha512_transform_ppc9(u64 state[8], ++ const unsigned char *input_data, ++ size_t num_blks); ++ ++static unsigned int ++do_sha512_transform_ppc8(void *ctx, const unsigned char *data, size_t nblks) ++{ ++ SHA512_CONTEXT *hd = ctx; ++ return _gcry_sha512_transform_ppc8 (&hd->state.h0, data, nblks); ++} ++ ++static unsigned int ++do_sha512_transform_ppc9(void *ctx, const unsigned char *data, size_t nblks) ++{ ++ SHA512_CONTEXT *hd = ctx; ++ return _gcry_sha512_transform_ppc9 (&hd->state.h0, data, nblks); ++} ++#endif ++ ++ + static void + sha512_init (void *context, unsigned int flags) + { +@@ -166,6 +204,12 @@ sha512_init (void *context, unsigned int flags) + #ifdef USE_AVX2 + ctx->use_avx2 = (features & HWF_INTEL_AVX2) && (features & HWF_INTEL_BMI2); + #endif ++#ifdef USE_PPC_CRYPTO ++ if ((features & HWF_PPC_VCRYPTO) != 0) ++ ctx->bctx.bwrite = do_sha512_transform_ppc8; ++ if ((features & HWF_PPC_VCRYPTO) != 0 && (features & HWF_PPC_ARCH_3_00) != 0) ++ ctx->bctx.bwrite = do_sha512_transform_ppc9; ++#endif + + (void)features; + } +diff --git a/configure.ac b/configure.ac +index 06e122c9..953a20e9 100644 +--- a/configure.ac ++++ b/configure.ac +@@ -1840,6 +1840,115 @@ if test "$gcry_cv_gcc_inline_asm_ppc_arch_3_00" = "yes" ; then + fi + + ++# ++# Check whether PowerPC AltiVec/VSX intrinsics ++# ++AC_CACHE_CHECK([whether compiler supports PowerPC AltiVec/VSX intrinsics], ++ [gcry_cv_cc_ppc_altivec], ++ [if test "$mpi_cpu_arch" != "ppc" ; then ++ gcry_cv_cc_ppc_altivec="n/a" ++ else ++ gcry_cv_cc_ppc_altivec=no ++ AC_COMPILE_IFELSE([AC_LANG_SOURCE( ++ [[#include ++ typedef vector unsigned char block; ++ block fn(block in) ++ { ++ block t = vec_perm (in, in, vec_vsx_ld (0, (unsigned char*)0)); ++ return vec_cipher_be (t, in); ++ } ++ ]])], ++ [gcry_cv_cc_ppc_altivec=yes]) ++ fi]) ++if test "$gcry_cv_cc_ppc_altivec" = "yes" ; then ++ AC_DEFINE(HAVE_COMPATIBLE_CC_PPC_ALTIVEC,1, ++ [Defined if underlying compiler supports PowerPC AltiVec/VSX/crypto intrinsics]) ++fi ++ ++_gcc_cflags_save=$CFLAGS ++CFLAGS="$CFLAGS -maltivec -mvsx -mcrypto" ++ ++if test "$gcry_cv_cc_ppc_altivec" = "no" && ++ test "$mpi_cpu_arch" = "ppc" ; then ++ AC_CACHE_CHECK([whether compiler supports PowerPC AltiVec/VSX/crypto intrinsics with extra GCC flags], ++ [gcry_cv_cc_ppc_altivec_cflags], ++ [gcry_cv_cc_ppc_altivec_cflags=no ++ AC_COMPILE_IFELSE([AC_LANG_SOURCE( ++ [[#include ++ typedef vector unsigned char block; ++ block fn(block in) ++ { ++ block t = vec_perm (in, in, vec_vsx_ld (0, (unsigned char*)0)); ++ return vec_cipher_be (t, in); ++ }]])], ++ [gcry_cv_cc_ppc_altivec_cflags=yes])]) ++ if test "$gcry_cv_cc_ppc_altivec_cflags" = "yes" ; then ++ AC_DEFINE(HAVE_COMPATIBLE_CC_PPC_ALTIVEC,1, ++ [Defined if underlying compiler supports PowerPC AltiVec/VSX/crypto intrinsics]) ++ AC_DEFINE(HAVE_COMPATIBLE_CC_PPC_ALTIVEC_WITH_CFLAGS,1, ++ [Defined if underlying compiler supports PowerPC AltiVec/VSX/crypto intrinsics with extra GCC flags]) ++ fi ++fi ++ ++AM_CONDITIONAL(ENABLE_PPC_VCRYPTO_EXTRA_CFLAGS, ++ test "$gcry_cv_cc_ppc_altivec_cflags" = "yes") ++ ++# Restore flags. ++CFLAGS=$_gcc_cflags_save; ++ ++ ++# ++# Check whether GCC inline assembler supports PowerPC AltiVec/VSX/crypto instructions ++# ++AC_CACHE_CHECK([whether GCC inline assembler supports PowerPC AltiVec/VSX/crypto instructions], ++ [gcry_cv_gcc_inline_asm_ppc_altivec], ++ [if test "$mpi_cpu_arch" != "ppc" ; then ++ gcry_cv_gcc_inline_asm_ppc_altivec="n/a" ++ else ++ gcry_cv_gcc_inline_asm_ppc_altivec=no ++ AC_COMPILE_IFELSE([AC_LANG_SOURCE( ++ [[__asm__(".globl testfn;\n" ++ "testfn:\n" ++ "stvx %v31,%r12,%r0;\n" ++ "lvx %v20,%r12,%r0;\n" ++ "vcipher %v0, %v1, %v22;\n" ++ "lxvw4x %vs32, %r0, %r1;\n" ++ "vadduwm %v0, %v1, %v22;\n" ++ "vshasigmaw %v0, %v1, 0, 15;\n" ++ "vshasigmad %v0, %v1, 0, 15;\n" ++ ); ++ ]])], ++ [gcry_cv_gcc_inline_asm_ppc_altivec=yes]) ++ fi]) ++if test "$gcry_cv_gcc_inline_asm_ppc_altivec" = "yes" ; then ++ AC_DEFINE(HAVE_GCC_INLINE_ASM_PPC_ALTIVEC,1, ++ [Defined if inline assembler supports PowerPC AltiVec/VSX/crypto instructions]) ++fi ++ ++ ++# ++# Check whether GCC inline assembler supports PowerISA 3.00 instructions ++# ++AC_CACHE_CHECK([whether GCC inline assembler supports PowerISA 3.00 instructions], ++ [gcry_cv_gcc_inline_asm_ppc_arch_3_00], ++ [if test "$mpi_cpu_arch" != "ppc" ; then ++ gcry_cv_gcc_inline_asm_ppc_arch_3_00="n/a" ++ else ++ gcry_cv_gcc_inline_asm_ppc_arch_3_00=no ++ AC_COMPILE_IFELSE([AC_LANG_SOURCE( ++ [[__asm__(".globl testfn;\n" ++ "testfn:\n" ++ "stxvb16x %r1,%v12,%v30;\n" ++ ); ++ ]])], ++ [gcry_cv_gcc_inline_asm_ppc_arch_3_00=yes]) ++ fi]) ++if test "$gcry_cv_gcc_inline_asm_ppc_arch_3_00" = "yes" ; then ++ AC_DEFINE(HAVE_GCC_INLINE_ASM_PPC_ARCH_3_00,1, ++ [Defined if inline assembler supports PowerISA 3.00 instructions]) ++fi ++ ++ + ####################################### + #### Checks for library functions. #### + ####################################### +@@ -2510,6 +2619,19 @@ if test "$found" = "1" ; then + # Build with the assembly implementation + GCRYPT_DIGESTS="$GCRYPT_DIGESTS sha256-armv8-aarch64-ce.lo" + ;; ++ powerpc64le-*-*) ++ # Build with the crypto extension implementation ++ GCRYPT_CIPHERS="$GCRYPT_CIPHERS sha256-ppc.lo" ++ ;; ++ powerpc64-*-*) ++ # Big-Endian. ++ # Build with the crypto extension implementation ++ GCRYPT_CIPHERS="$GCRYPT_CIPHERS sha256-ppc.lo" ++ ;; ++ powerpc-*-*) ++ # Big-Endian. ++ # Build with the crypto extension implementation ++ GCRYPT_CIPHERS="$GCRYPT_CIPHERS sha256-ppc.lo" + esac + fi + +@@ -2529,6 +2651,19 @@ if test "$found" = "1" ; then + # Build with the assembly implementation + GCRYPT_DIGESTS="$GCRYPT_DIGESTS sha512-arm.lo" + ;; ++ powerpc64le-*-*) ++ # Build with the crypto extension implementation ++ GCRYPT_CIPHERS="$GCRYPT_CIPHERS sha512-ppc.lo" ++ ;; ++ powerpc64-*-*) ++ # Big-Endian. ++ # Build with the crypto extension implementation ++ GCRYPT_CIPHERS="$GCRYPT_CIPHERS sha512-ppc.lo" ++ ;; ++ powerpc-*-*) ++ # Big-Endian. ++ # Build with the crypto extension implementation ++ GCRYPT_CIPHERS="$GCRYPT_CIPHERS sha512-ppc.lo" + esac + + if test x"$neonsupport" = xyes ; then diff --git a/SPECS/libgcrypt.spec b/SPECS/libgcrypt.spec index f41c9c9..0d45717 100644 --- a/SPECS/libgcrypt.spec +++ b/SPECS/libgcrypt.spec @@ -1,6 +1,6 @@ Name: libgcrypt Version: 1.8.5 -Release: 4%{?dist} +Release: 5%{?dist} URL: http://www.gnupg.org/ Source0: libgcrypt-%{version}-hobbled.tar.xz # The original libgcrypt sources now contain potentially patented ECC @@ -53,6 +53,14 @@ Patch30: libgcrypt-1.8.5-fips-module.patch Patch31: libgcrypt-1.8.5-aes-perf.patch # FIPS selftest for PBKDF2 Patch32: libgcrypt-1.8.5-kdf-selftest.patch +# ppc64 performance for SHA2 (#1855231) +Patch33: libgcrypt-1.8.5-ppc-sha2.patch +# ppc64 performance for CRC32 (#1855231) +Patch34: libgcrypt-1.8.5-ppc-crc32.patch +# ppc64 bugfixes (#1855231) +Patch35: libgcrypt-1.8.5-ppc-bugfix.patch +# ppc64 performance AES-GCM (#1855231) +Patch36: libgcrypt-1.8.5-ppc-aes-gcm.patch %define gcrylibdir %{_libdir} @@ -106,6 +114,10 @@ applications using libgcrypt. %patch30 -p1 -b .fips-module %patch31 -p1 -b .aes-perf %patch32 -p1 -b .kdf-selftest +%patch33 -p1 -b .ppc-sha2 +%patch34 -p1 -b .ppc-crc32 +%patch35 -p1 -b .ppc-bugfix +%patch36 -p1 -b .ppc-aes-gcm cp %{SOURCE4} cipher/ cp %{SOURCE5} %{SOURCE6} tests/ @@ -221,6 +233,9 @@ exit 0 %license COPYING %changelog +* Thu May 13 2021 Jakub Jelen - 1.8.5-5 +- Performance enchancements for AES-GCM, CRC32 and SHA2 (#1855231) + * Mon Jun 15 2020 Tomáš Mráz 1.8.5-4 - add PBKDF2 selftest for FIPS POST