diff --git a/.gitignore b/.gitignore
index 8220a73..8e65f74 100644
--- a/.gitignore
+++ b/.gitignore
@@ -1 +1 @@
-SOURCES/libdrm-2.4.67.tar.bz2
+SOURCES/libdrm-2.4.74.tar.bz2
diff --git a/.libdrm.metadata b/.libdrm.metadata
index 07da110..9942d01 100644
--- a/.libdrm.metadata
+++ b/.libdrm.metadata
@@ -1 +1 @@
-21d43437219ddd1e409fb4b7d77254cd129e8075 SOURCES/libdrm-2.4.67.tar.bz2
+0d9c02d5d2c6c2fac862cb687bf45bc20d129017 SOURCES/libdrm-2.4.74.tar.bz2
diff --git a/SOURCES/0001-intel-Add-more-Kabylake-PCI-IDs.patch b/SOURCES/0001-intel-Add-more-Kabylake-PCI-IDs.patch
deleted file mode 100644
index 957175c..0000000
--- a/SOURCES/0001-intel-Add-more-Kabylake-PCI-IDs.patch
+++ /dev/null
@@ -1,65 +0,0 @@
-From 22b6e33fe2e8346138ed7d8bd440c05ec4e6465f Mon Sep 17 00:00:00 2001
-From: Rodrigo Vivi <rodrigo.vivi@intel.com>
-Date: Thu, 23 Jun 2016 14:01:33 -0700
-Subject: [PATCH 1/2] intel: Add more Kabylake PCI IDs.
-
-The spec has been updated adding new PCI IDs.
-
-v2: Avoid using "H" instead of HALO to keep names uniform - DK.
-
-Reviewed-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
-Acked-by: Kenneth Graunke <kenneth@whitecape.org>
-Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
----
- intel/intel_chipset.h | 14 ++++++++++----
- 1 file changed, 10 insertions(+), 4 deletions(-)
-
-diff --git a/intel/intel_chipset.h b/intel/intel_chipset.h
-index e2554c3..6b8d4e9 100644
---- a/intel/intel_chipset.h
-+++ b/intel/intel_chipset.h
-@@ -194,7 +194,9 @@
- #define PCI_CHIP_KABYLAKE_ULT_GT2 0x5916
- #define PCI_CHIP_KABYLAKE_ULT_GT1_5 0x5913
- #define PCI_CHIP_KABYLAKE_ULT_GT1 0x5906
--#define PCI_CHIP_KABYLAKE_ULT_GT3 0x5926
-+#define PCI_CHIP_KABYLAKE_ULT_GT3_0 0x5923
-+#define PCI_CHIP_KABYLAKE_ULT_GT3_1 0x5926
-+#define PCI_CHIP_KABYLAKE_ULT_GT3_2 0x5927
- #define PCI_CHIP_KABYLAKE_ULT_GT2F 0x5921
- #define PCI_CHIP_KABYLAKE_ULX_GT1_5 0x5915
- #define PCI_CHIP_KABYLAKE_ULX_GT1 0x590E
-@@ -206,7 +208,8 @@
- #define PCI_CHIP_KABYLAKE_HALO_GT2 0x591B
- #define PCI_CHIP_KABYLAKE_HALO_GT4 0x593B
- #define PCI_CHIP_KABYLAKE_HALO_GT3 0x592B
--#define PCI_CHIP_KABYLAKE_HALO_GT1 0x590B
-+#define PCI_CHIP_KABYLAKE_HALO_GT1_0 0x5908
-+#define PCI_CHIP_KABYLAKE_HALO_GT1_1 0x590B
- #define PCI_CHIP_KABYLAKE_SRV_GT2 0x591A
- #define PCI_CHIP_KABYLAKE_SRV_GT3 0x592A
- #define PCI_CHIP_KABYLAKE_SRV_GT1 0x590A
-@@ -414,7 +417,8 @@
- (devid) == PCI_CHIP_KABYLAKE_ULT_GT1 || \
- (devid) == PCI_CHIP_KABYLAKE_ULX_GT1 || \
- (devid) == PCI_CHIP_KABYLAKE_DT_GT1 || \
-- (devid) == PCI_CHIP_KABYLAKE_HALO_GT1 || \
-+ (devid) == PCI_CHIP_KABYLAKE_HALO_GT1_0 || \
-+ (devid) == PCI_CHIP_KABYLAKE_HALO_GT1_1 || \
- (devid) == PCI_CHIP_KABYLAKE_SRV_GT1)
-
- #define IS_KBL_GT2(devid) ((devid) == PCI_CHIP_KABYLAKE_ULT_GT2 || \
-@@ -425,7 +429,9 @@
- (devid) == PCI_CHIP_KABYLAKE_SRV_GT2 || \
- (devid) == PCI_CHIP_KABYLAKE_WKS_GT2)
-
--#define IS_KBL_GT3(devid) ((devid) == PCI_CHIP_KABYLAKE_ULT_GT3 || \
-+#define IS_KBL_GT3(devid) ((devid) == PCI_CHIP_KABYLAKE_ULT_GT3_0 || \
-+ (devid) == PCI_CHIP_KABYLAKE_ULT_GT3_1 || \
-+ (devid) == PCI_CHIP_KABYLAKE_ULT_GT3_2 || \
- (devid) == PCI_CHIP_KABYLAKE_HALO_GT3 || \
- (devid) == PCI_CHIP_KABYLAKE_SRV_GT3)
-
---
-2.7.4
-
diff --git a/SOURCES/0001-intel-Adding-missing-Broxton-PCI-IDs.patch b/SOURCES/0001-intel-Adding-missing-Broxton-PCI-IDs.patch
deleted file mode 100644
index 088fe41..0000000
--- a/SOURCES/0001-intel-Adding-missing-Broxton-PCI-IDs.patch
+++ /dev/null
@@ -1,47 +0,0 @@
-From ea07de92da8f51c0c1b78a10f197ad6ab1a39aa0 Mon Sep 17 00:00:00 2001
-From: Rodrigo Vivi <rodrigo.vivi@intel.com>
-Date: Tue, 1 Mar 2016 17:07:04 -0800
-Subject: [PATCH] intel: Adding missing Broxton PCI IDs.
-
-These IDs were already part of the kernel since:
-
-kernel commit 985dd4360fdf2533fe48a33a4a2094f2e4718dc0
-Author: Imre Deak <imre.deak@intel.com>
-Date: Thu Jan 28 16:04:12 2016 +0200
-
- drm/i915/bxt: update list of PCIIDs
-
-Cc: Venkateswarlu Vinjamuri <venkateswarlu.v.vinjamuri@intel.com>
-Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
-Reviewed-by: Clint Taylor <Clinton.A.Taylor@intel.com>
----
- intel/intel_chipset.h | 6 +++++-
- 1 file changed, 5 insertions(+), 1 deletion(-)
-
-diff --git a/intel/intel_chipset.h b/intel/intel_chipset.h
-index 35148e5..8e42a40 100644
---- a/intel/intel_chipset.h
-+++ b/intel/intel_chipset.h
-@@ -213,6 +213,8 @@
- #define PCI_CHIP_BROXTON_0 0x0A84
- #define PCI_CHIP_BROXTON_1 0x1A84
- #define PCI_CHIP_BROXTON_2 0x5A84
-+#define PCI_CHIP_BROXTON_3 0x1A85
-+#define PCI_CHIP_BROXTON_4 0x5A85
-
- #define IS_MOBILE(devid) ((devid) == PCI_CHIP_I855_GM || \
- (devid) == PCI_CHIP_I915_GM || \
-@@ -436,7 +438,9 @@
-
- #define IS_BROXTON(devid) ((devid) == PCI_CHIP_BROXTON_0 || \
- (devid) == PCI_CHIP_BROXTON_1 || \
-- (devid) == PCI_CHIP_BROXTON_2)
-+ (devid) == PCI_CHIP_BROXTON_2 || \
-+ (devid) == PCI_CHIP_BROXTON_3 || \
-+ (devid) == PCI_CHIP_BROXTON_4)
-
- #define IS_GEN9(devid) (IS_SKYLAKE(devid) || \
- IS_BROXTON(devid) || \
---
-2.5.5
-
diff --git a/SOURCES/0001-intel-skl-Add-missing-SKL-PCI-IDs.patch b/SOURCES/0001-intel-skl-Add-missing-SKL-PCI-IDs.patch
deleted file mode 100644
index 1679d82..0000000
--- a/SOURCES/0001-intel-skl-Add-missing-SKL-PCI-IDs.patch
+++ /dev/null
@@ -1,81 +0,0 @@
-From e3623d34cad0ac3f181b0deee0931df202b8f909 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Micha=C5=82=20Winiarski?= <michal.winiarski@intel.com>
-Date: Wed, 17 Feb 2016 11:40:19 +0100
-Subject: [PATCH] intel/skl: Add missing SKL PCI IDs
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Used by production devices:
- Intel(R) HD Graphics 510
- Intel(R) HD Graphics 535
- Intel(R) Iris(TM) Graphics 550
- Intel(R) Iris(TM) Graphics P555
-
-Signed-off-by: Michał Winiarski <michal.winiarski@intel.com>
-Tested-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
-Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
----
- intel/intel_chipset.h | 24 ++++++++++++++++--------
- 1 file changed, 16 insertions(+), 8 deletions(-)
-
-diff --git a/intel/intel_chipset.h b/intel/intel_chipset.h
-index 8e42a40..e2554c3 100644
---- a/intel/intel_chipset.h
-+++ b/intel/intel_chipset.h
-@@ -168,6 +168,7 @@
- #define PCI_CHIP_SKYLAKE_DT_GT1 0x1902
- #define PCI_CHIP_SKYLAKE_ULT_GT1 0x1906
- #define PCI_CHIP_SKYLAKE_SRV_GT1 0x190A /* Reserved */
-+#define PCI_CHIP_SKYLAKE_H_GT1 0x190B
- #define PCI_CHIP_SKYLAKE_ULX_GT1 0x190E /* Reserved */
- #define PCI_CHIP_SKYLAKE_DT_GT2 0x1912
- #define PCI_CHIP_SKYLAKE_FUSED0_GT2 0x1913 /* Reserved */
-@@ -179,9 +180,12 @@
- #define PCI_CHIP_SKYLAKE_WKS_GT2 0x191D
- #define PCI_CHIP_SKYLAKE_ULX_GT2 0x191E
- #define PCI_CHIP_SKYLAKE_MOBILE_GT2 0x1921 /* Reserved */
--#define PCI_CHIP_SKYLAKE_GT3 0x1926
--#define PCI_CHIP_SKYLAKE_HALO_GT3 0x192B /* Reserved */
-+#define PCI_CHIP_SKYLAKE_ULT_GT3_0 0x1923
-+#define PCI_CHIP_SKYLAKE_ULT_GT3_1 0x1926
-+#define PCI_CHIP_SKYLAKE_ULT_GT3_2 0x1927
- #define PCI_CHIP_SKYLAKE_SRV_GT4 0x192A
-+#define PCI_CHIP_SKYLAKE_HALO_GT3 0x192B /* Reserved */
-+#define PCI_CHIP_SKYLAKE_SRV_GT3 0x192D
- #define PCI_CHIP_SKYLAKE_DT_GT4 0x1932
- #define PCI_CHIP_SKYLAKE_SRV_GT4X 0x193A
- #define PCI_CHIP_SKYLAKE_H_GT4 0x193B
-@@ -375,10 +379,11 @@
- #define IS_GEN8(devid) (IS_BROADWELL(devid) || \
- IS_CHERRYVIEW(devid))
-
--#define IS_SKL_GT1(devid) ((devid) == PCI_CHIP_SKYLAKE_ULT_GT1 || \
-- (devid) == PCI_CHIP_SKYLAKE_ULX_GT1 || \
-- (devid) == PCI_CHIP_SKYLAKE_DT_GT1 || \
-- (devid) == PCI_CHIP_SKYLAKE_SRV_GT1)
-+#define IS_SKL_GT1(devid) ((devid) == PCI_CHIP_SKYLAKE_DT_GT1 || \
-+ (devid) == PCI_CHIP_SKYLAKE_ULT_GT1 || \
-+ (devid) == PCI_CHIP_SKYLAKE_SRV_GT1 || \
-+ (devid) == PCI_CHIP_SKYLAKE_H_GT1 || \
-+ (devid) == PCI_CHIP_SKYLAKE_ULX_GT1)
-
- #define IS_SKL_GT2(devid) ((devid) == PCI_CHIP_SKYLAKE_DT_GT2 || \
- (devid) == PCI_CHIP_SKYLAKE_FUSED0_GT2 || \
-@@ -391,8 +396,11 @@
- (devid) == PCI_CHIP_SKYLAKE_ULX_GT2 || \
- (devid) == PCI_CHIP_SKYLAKE_MOBILE_GT2)
-
--#define IS_SKL_GT3(devid) ((devid) == PCI_CHIP_SKYLAKE_GT3 || \
-- (devid) == PCI_CHIP_SKYLAKE_HALO_GT3)
-+#define IS_SKL_GT3(devid) ((devid) == PCI_CHIP_SKYLAKE_ULT_GT3_0 || \
-+ (devid) == PCI_CHIP_SKYLAKE_ULT_GT3_1 || \
-+ (devid) == PCI_CHIP_SKYLAKE_ULT_GT3_2 || \
-+ (devid) == PCI_CHIP_SKYLAKE_HALO_GT3 || \
-+ (devid) == PCI_CHIP_SKYLAKE_SRV_GT3)
-
- #define IS_SKL_GT4(devid) ((devid) == PCI_CHIP_SKYLAKE_SRV_GT4 || \
- (devid) == PCI_CHIP_SKYLAKE_DT_GT4 || \
---
-2.5.5
-
diff --git a/SOURCES/0002-intel-Removing-PCI-IDs-that-are-no-longer-listed-as-.patch b/SOURCES/0002-intel-Removing-PCI-IDs-that-are-no-longer-listed-as-.patch
deleted file mode 100644
index c498176..0000000
--- a/SOURCES/0002-intel-Removing-PCI-IDs-that-are-no-longer-listed-as-.patch
+++ /dev/null
@@ -1,69 +0,0 @@
-From 7996a8707eacd59a45e7128a543393dca2776e26 Mon Sep 17 00:00:00 2001
-From: Rodrigo Vivi <rodrigo.vivi@intel.com>
-Date: Mon, 27 Jun 2016 17:02:34 -0700
-Subject: [PATCH 2/2] intel: Removing PCI IDs that are no longer listed as
- Kabylake.
-
-This is unusual. Usually IDs listed on early stages of platform
-definition are kept there as reserved for later use.
-
-However these IDs here are not listed anymore in any of steppings
-and devices IDs tables for Kabylake on configurations overview
-section of BSpec.
-
-So it is better removing them before they become used in any
-other future platform.
-
-v2: Rebase.
-
-Reviewed-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
-Acked-by: Kenneth Graunke <kenneth@whitecape.org>
-Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
----
- intel/intel_chipset.h | 16 +++-------------
- 1 file changed, 3 insertions(+), 13 deletions(-)
-
-diff --git a/intel/intel_chipset.h b/intel/intel_chipset.h
-index 6b8d4e9..514f659 100644
---- a/intel/intel_chipset.h
-+++ b/intel/intel_chipset.h
-@@ -204,18 +204,13 @@
- #define PCI_CHIP_KABYLAKE_DT_GT2 0x5912
- #define PCI_CHIP_KABYLAKE_DT_GT1_5 0x5917
- #define PCI_CHIP_KABYLAKE_DT_GT1 0x5902
--#define PCI_CHIP_KABYLAKE_DT_GT4 0x5932
- #define PCI_CHIP_KABYLAKE_HALO_GT2 0x591B
- #define PCI_CHIP_KABYLAKE_HALO_GT4 0x593B
--#define PCI_CHIP_KABYLAKE_HALO_GT3 0x592B
- #define PCI_CHIP_KABYLAKE_HALO_GT1_0 0x5908
- #define PCI_CHIP_KABYLAKE_HALO_GT1_1 0x590B
- #define PCI_CHIP_KABYLAKE_SRV_GT2 0x591A
--#define PCI_CHIP_KABYLAKE_SRV_GT3 0x592A
- #define PCI_CHIP_KABYLAKE_SRV_GT1 0x590A
--#define PCI_CHIP_KABYLAKE_SRV_GT4 0x593A
- #define PCI_CHIP_KABYLAKE_WKS_GT2 0x591D
--#define PCI_CHIP_KABYLAKE_WKS_GT4 0x593D
-
- #define PCI_CHIP_BROXTON_0 0x0A84
- #define PCI_CHIP_BROXTON_1 0x1A84
-@@ -431,14 +426,9 @@
-
- #define IS_KBL_GT3(devid) ((devid) == PCI_CHIP_KABYLAKE_ULT_GT3_0 || \
- (devid) == PCI_CHIP_KABYLAKE_ULT_GT3_1 || \
-- (devid) == PCI_CHIP_KABYLAKE_ULT_GT3_2 || \
-- (devid) == PCI_CHIP_KABYLAKE_HALO_GT3 || \
-- (devid) == PCI_CHIP_KABYLAKE_SRV_GT3)
--
--#define IS_KBL_GT4(devid) ((devid) == PCI_CHIP_KABYLAKE_DT_GT4 || \
-- (devid) == PCI_CHIP_KABYLAKE_HALO_GT4 || \
-- (devid) == PCI_CHIP_KABYLAKE_SRV_GT4 || \
-- (devid) == PCI_CHIP_KABYLAKE_WKS_GT4)
-+ (devid) == PCI_CHIP_KABYLAKE_ULT_GT3_2)
-+
-+#define IS_KBL_GT4(devid) ((devid) == PCI_CHIP_KABYLAKE_HALO_GT4)
-
- #define IS_KABYLAKE(devid) (IS_KBL_GT1(devid) || \
- IS_KBL_GT2(devid) || \
---
-2.7.4
-
diff --git a/SOURCES/libdrm-2.4.0-no-bc.patch b/SOURCES/libdrm-2.4.0-no-bc.patch
index e3624a6..9433ae9 100644
--- a/SOURCES/libdrm-2.4.0-no-bc.patch
+++ b/SOURCES/libdrm-2.4.0-no-bc.patch
@@ -1,51 +1,51 @@
-diff -up libdrm-2.4.60/xf86drm.c.no-bc libdrm-2.4.60/xf86drm.c
---- libdrm-2.4.60/xf86drm.c.no-bc 2015-03-23 09:04:17.272458959 +1000
-+++ libdrm-2.4.60/xf86drm.c 2015-03-23 09:07:36.856720490 +1000
-@@ -482,11 +482,6 @@ int drmAvailable(void)
+diff -up libdrm-2.4.74/xf86drm.c.no-bc libdrm-2.4.74/xf86drm.c
+--- libdrm-2.4.74/xf86drm.c.no-bc 2017-01-18 13:39:38.878473110 +1000
++++ libdrm-2.4.74/xf86drm.c 2017-01-18 13:40:30.603848193 +1000
+@@ -484,11 +484,6 @@ int drmAvailable(void)
int fd;
if ((fd = drmOpenMinor(0, 1, DRM_NODE_PRIMARY)) < 0) {
-#ifdef __linux__
-- /* Try proc for backward Linux compatibility */
-- if (!access("/proc/dri/0", R_OK))
-- return 1;
+- /* Try proc for backward Linux compatibility */
+- if (!access("/proc/dri/0", R_OK))
+- return 1;
-#endif
- return 0;
+ return 0;
}
-
-@@ -659,38 +654,6 @@ static int drmOpenByName(const char *nam
- }
+
+@@ -661,38 +656,6 @@ static int drmOpenByName(const char *nam
+ }
}
-#ifdef __linux__
- /* Backward-compatibility /proc support */
- for (i = 0; i < 8; i++) {
-- char proc_name[64], buf[512];
-- char *driver, *pt, *devstring;
-- int retcode;
--
-- sprintf(proc_name, "/proc/dri/%d/name", i);
-- if ((fd = open(proc_name, 0, 0)) >= 0) {
-- retcode = read(fd, buf, sizeof(buf)-1);
-- close(fd);
-- if (retcode) {
-- buf[retcode-1] = '\0';
-- for (driver = pt = buf; *pt && *pt != ' '; ++pt)
-- ;
-- if (*pt) { /* Device is next */
-- *pt = '\0';
-- if (!strcmp(driver, name)) { /* Match */
-- for (devstring = ++pt; *pt && *pt != ' '; ++pt)
-- ;
-- if (*pt) { /* Found busid */
-- return drmOpenByBusid(++pt, type);
-- } else { /* No busid */
-- return drmOpenDevice(strtol(devstring, NULL, 0),i, type);
-- }
-- }
-- }
-- }
-- }
+- char proc_name[64], buf[512];
+- char *driver, *pt, *devstring;
+- int retcode;
+-
+- sprintf(proc_name, "/proc/dri/%d/name", i);
+- if ((fd = open(proc_name, 0, 0)) >= 0) {
+- retcode = read(fd, buf, sizeof(buf)-1);
+- close(fd);
+- if (retcode) {
+- buf[retcode-1] = '\0';
+- for (driver = pt = buf; *pt && *pt != ' '; ++pt)
+- ;
+- if (*pt) { /* Device is next */
+- *pt = '\0';
+- if (!strcmp(driver, name)) { /* Match */
+- for (devstring = ++pt; *pt && *pt != ' '; ++pt)
+- ;
+- if (*pt) { /* Found busid */
+- return drmOpenByBusid(++pt, type);
+- } else { /* No busid */
+- return drmOpenDevice(strtol(devstring, NULL, 0),i, type);
+- }
+- }
+- }
+- }
+- }
- }
-#endif
-
diff --git a/SPECS/libdrm.spec b/SPECS/libdrm.spec
index e5cdc6f..5d536ec 100644
--- a/SPECS/libdrm.spec
+++ b/SPECS/libdrm.spec
@@ -2,8 +2,8 @@
Summary: Direct Rendering Manager runtime library
Name: libdrm
-Version: 2.4.67
-Release: 3%{?dist}
+Version: 2.4.74
+Release: 1%{?dist}
License: MIT
Group: System Environment/Libraries
URL: http://dri.sourceforge.net
@@ -41,14 +41,6 @@ Patch4: libdrm-2.4.0-no-bc.patch
# make rule to print the list of test programs
Patch5: libdrm-2.4.25-check-programs.patch
-# Missing PCI IDs.
-Patch10: 0001-intel-Adding-missing-Broxton-PCI-IDs.patch
-Patch11: 0001-intel-skl-Add-missing-SKL-PCI-IDs.patch
-
-# Kbl PCI IDs.
-Patch12: 0001-intel-Add-more-Kabylake-PCI-IDs.patch
-Patch13: 0002-intel-Removing-PCI-IDs-that-are-no-longer-listed-as-.patch
-
%description
Direct Rendering Manager runtime library
@@ -75,10 +67,6 @@ Utility programs for the kernel DRM interface. Will void your warranty.
%patch3 -p1 -b .forceperms
%patch4 -p1 -b .no-bc
%patch5 -p1 -b .check
-%patch10 -p1 -b .bxtid
-%patch11 -p1 -b .sklid
-%patch12 -p1 -b .kblid1
-%patch13 -p1 -b .kblid2
%build
autoreconf -v --install || exit 1
@@ -177,6 +165,7 @@ done
# FIXME should be in drm/ too
%{_includedir}/xf86drm.h
%{_includedir}/xf86drmMode.h
+%{_includedir}/libsync.h
%dir %{_includedir}/libdrm
%{_includedir}/libdrm/drm.h
%{_includedir}/libdrm/drm_fourcc.h
@@ -249,6 +238,9 @@ done
%{_mandir}/man7/drm*.7*
%changelog
+* Wed Jan 18 2017 Dave Airlie <airlied@redhat.com> - 2.4.74-1
+- libdrm 2.4.74
+
* Tue Aug 09 2016 Rob Clark <rclark@redhat.com> - 2.4.67-3
- kbl pci ids.