diff --git a/.gitignore b/.gitignore index cdf10ee..8220a73 100644 --- a/.gitignore +++ b/.gitignore @@ -1 +1 @@ -SOURCES/libdrm-2.4.60.tar.bz2 +SOURCES/libdrm-2.4.67.tar.bz2 diff --git a/.libdrm.metadata b/.libdrm.metadata index e21582d..07da110 100644 --- a/.libdrm.metadata +++ b/.libdrm.metadata @@ -1 +1 @@ -4e041a5ff22b2b9132b216eb0574638bf252b7a9 SOURCES/libdrm-2.4.60.tar.bz2 +21d43437219ddd1e409fb4b7d77254cd129e8075 SOURCES/libdrm-2.4.67.tar.bz2 diff --git a/SOURCES/0001-intel-Add-more-Kabylake-PCI-IDs.patch b/SOURCES/0001-intel-Add-more-Kabylake-PCI-IDs.patch new file mode 100644 index 0000000..957175c --- /dev/null +++ b/SOURCES/0001-intel-Add-more-Kabylake-PCI-IDs.patch @@ -0,0 +1,65 @@ +From 22b6e33fe2e8346138ed7d8bd440c05ec4e6465f Mon Sep 17 00:00:00 2001 +From: Rodrigo Vivi +Date: Thu, 23 Jun 2016 14:01:33 -0700 +Subject: [PATCH 1/2] intel: Add more Kabylake PCI IDs. + +The spec has been updated adding new PCI IDs. + +v2: Avoid using "H" instead of HALO to keep names uniform - DK. + +Reviewed-by: Dhinakaran Pandiyan +Acked-by: Kenneth Graunke +Signed-off-by: Rodrigo Vivi +--- + intel/intel_chipset.h | 14 ++++++++++---- + 1 file changed, 10 insertions(+), 4 deletions(-) + +diff --git a/intel/intel_chipset.h b/intel/intel_chipset.h +index e2554c3..6b8d4e9 100644 +--- a/intel/intel_chipset.h ++++ b/intel/intel_chipset.h +@@ -194,7 +194,9 @@ + #define PCI_CHIP_KABYLAKE_ULT_GT2 0x5916 + #define PCI_CHIP_KABYLAKE_ULT_GT1_5 0x5913 + #define PCI_CHIP_KABYLAKE_ULT_GT1 0x5906 +-#define PCI_CHIP_KABYLAKE_ULT_GT3 0x5926 ++#define PCI_CHIP_KABYLAKE_ULT_GT3_0 0x5923 ++#define PCI_CHIP_KABYLAKE_ULT_GT3_1 0x5926 ++#define PCI_CHIP_KABYLAKE_ULT_GT3_2 0x5927 + #define PCI_CHIP_KABYLAKE_ULT_GT2F 0x5921 + #define PCI_CHIP_KABYLAKE_ULX_GT1_5 0x5915 + #define PCI_CHIP_KABYLAKE_ULX_GT1 0x590E +@@ -206,7 +208,8 @@ + #define PCI_CHIP_KABYLAKE_HALO_GT2 0x591B + #define PCI_CHIP_KABYLAKE_HALO_GT4 0x593B + #define PCI_CHIP_KABYLAKE_HALO_GT3 0x592B +-#define PCI_CHIP_KABYLAKE_HALO_GT1 0x590B ++#define PCI_CHIP_KABYLAKE_HALO_GT1_0 0x5908 ++#define PCI_CHIP_KABYLAKE_HALO_GT1_1 0x590B + #define PCI_CHIP_KABYLAKE_SRV_GT2 0x591A + #define PCI_CHIP_KABYLAKE_SRV_GT3 0x592A + #define PCI_CHIP_KABYLAKE_SRV_GT1 0x590A +@@ -414,7 +417,8 @@ + (devid) == PCI_CHIP_KABYLAKE_ULT_GT1 || \ + (devid) == PCI_CHIP_KABYLAKE_ULX_GT1 || \ + (devid) == PCI_CHIP_KABYLAKE_DT_GT1 || \ +- (devid) == PCI_CHIP_KABYLAKE_HALO_GT1 || \ ++ (devid) == PCI_CHIP_KABYLAKE_HALO_GT1_0 || \ ++ (devid) == PCI_CHIP_KABYLAKE_HALO_GT1_1 || \ + (devid) == PCI_CHIP_KABYLAKE_SRV_GT1) + + #define IS_KBL_GT2(devid) ((devid) == PCI_CHIP_KABYLAKE_ULT_GT2 || \ +@@ -425,7 +429,9 @@ + (devid) == PCI_CHIP_KABYLAKE_SRV_GT2 || \ + (devid) == PCI_CHIP_KABYLAKE_WKS_GT2) + +-#define IS_KBL_GT3(devid) ((devid) == PCI_CHIP_KABYLAKE_ULT_GT3 || \ ++#define IS_KBL_GT3(devid) ((devid) == PCI_CHIP_KABYLAKE_ULT_GT3_0 || \ ++ (devid) == PCI_CHIP_KABYLAKE_ULT_GT3_1 || \ ++ (devid) == PCI_CHIP_KABYLAKE_ULT_GT3_2 || \ + (devid) == PCI_CHIP_KABYLAKE_HALO_GT3 || \ + (devid) == PCI_CHIP_KABYLAKE_SRV_GT3) + +-- +2.7.4 + diff --git a/SOURCES/0001-intel-Adding-missing-Broxton-PCI-IDs.patch b/SOURCES/0001-intel-Adding-missing-Broxton-PCI-IDs.patch new file mode 100644 index 0000000..088fe41 --- /dev/null +++ b/SOURCES/0001-intel-Adding-missing-Broxton-PCI-IDs.patch @@ -0,0 +1,47 @@ +From ea07de92da8f51c0c1b78a10f197ad6ab1a39aa0 Mon Sep 17 00:00:00 2001 +From: Rodrigo Vivi +Date: Tue, 1 Mar 2016 17:07:04 -0800 +Subject: [PATCH] intel: Adding missing Broxton PCI IDs. + +These IDs were already part of the kernel since: + +kernel commit 985dd4360fdf2533fe48a33a4a2094f2e4718dc0 +Author: Imre Deak +Date: Thu Jan 28 16:04:12 2016 +0200 + + drm/i915/bxt: update list of PCIIDs + +Cc: Venkateswarlu Vinjamuri +Signed-off-by: Rodrigo Vivi +Reviewed-by: Clint Taylor +--- + intel/intel_chipset.h | 6 +++++- + 1 file changed, 5 insertions(+), 1 deletion(-) + +diff --git a/intel/intel_chipset.h b/intel/intel_chipset.h +index 35148e5..8e42a40 100644 +--- a/intel/intel_chipset.h ++++ b/intel/intel_chipset.h +@@ -213,6 +213,8 @@ + #define PCI_CHIP_BROXTON_0 0x0A84 + #define PCI_CHIP_BROXTON_1 0x1A84 + #define PCI_CHIP_BROXTON_2 0x5A84 ++#define PCI_CHIP_BROXTON_3 0x1A85 ++#define PCI_CHIP_BROXTON_4 0x5A85 + + #define IS_MOBILE(devid) ((devid) == PCI_CHIP_I855_GM || \ + (devid) == PCI_CHIP_I915_GM || \ +@@ -436,7 +438,9 @@ + + #define IS_BROXTON(devid) ((devid) == PCI_CHIP_BROXTON_0 || \ + (devid) == PCI_CHIP_BROXTON_1 || \ +- (devid) == PCI_CHIP_BROXTON_2) ++ (devid) == PCI_CHIP_BROXTON_2 || \ ++ (devid) == PCI_CHIP_BROXTON_3 || \ ++ (devid) == PCI_CHIP_BROXTON_4) + + #define IS_GEN9(devid) (IS_SKYLAKE(devid) || \ + IS_BROXTON(devid) || \ +-- +2.5.5 + diff --git a/SOURCES/0001-intel-skl-Add-missing-SKL-PCI-IDs.patch b/SOURCES/0001-intel-skl-Add-missing-SKL-PCI-IDs.patch new file mode 100644 index 0000000..1679d82 --- /dev/null +++ b/SOURCES/0001-intel-skl-Add-missing-SKL-PCI-IDs.patch @@ -0,0 +1,81 @@ +From e3623d34cad0ac3f181b0deee0931df202b8f909 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Micha=C5=82=20Winiarski?= +Date: Wed, 17 Feb 2016 11:40:19 +0100 +Subject: [PATCH] intel/skl: Add missing SKL PCI IDs +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Used by production devices: + Intel(R) HD Graphics 510 + Intel(R) HD Graphics 535 + Intel(R) Iris(TM) Graphics 550 + Intel(R) Iris(TM) Graphics P555 + +Signed-off-by: Michał Winiarski +Tested-by: Lionel Landwerlin +Reviewed-by: Kenneth Graunke +--- + intel/intel_chipset.h | 24 ++++++++++++++++-------- + 1 file changed, 16 insertions(+), 8 deletions(-) + +diff --git a/intel/intel_chipset.h b/intel/intel_chipset.h +index 8e42a40..e2554c3 100644 +--- a/intel/intel_chipset.h ++++ b/intel/intel_chipset.h +@@ -168,6 +168,7 @@ + #define PCI_CHIP_SKYLAKE_DT_GT1 0x1902 + #define PCI_CHIP_SKYLAKE_ULT_GT1 0x1906 + #define PCI_CHIP_SKYLAKE_SRV_GT1 0x190A /* Reserved */ ++#define PCI_CHIP_SKYLAKE_H_GT1 0x190B + #define PCI_CHIP_SKYLAKE_ULX_GT1 0x190E /* Reserved */ + #define PCI_CHIP_SKYLAKE_DT_GT2 0x1912 + #define PCI_CHIP_SKYLAKE_FUSED0_GT2 0x1913 /* Reserved */ +@@ -179,9 +180,12 @@ + #define PCI_CHIP_SKYLAKE_WKS_GT2 0x191D + #define PCI_CHIP_SKYLAKE_ULX_GT2 0x191E + #define PCI_CHIP_SKYLAKE_MOBILE_GT2 0x1921 /* Reserved */ +-#define PCI_CHIP_SKYLAKE_GT3 0x1926 +-#define PCI_CHIP_SKYLAKE_HALO_GT3 0x192B /* Reserved */ ++#define PCI_CHIP_SKYLAKE_ULT_GT3_0 0x1923 ++#define PCI_CHIP_SKYLAKE_ULT_GT3_1 0x1926 ++#define PCI_CHIP_SKYLAKE_ULT_GT3_2 0x1927 + #define PCI_CHIP_SKYLAKE_SRV_GT4 0x192A ++#define PCI_CHIP_SKYLAKE_HALO_GT3 0x192B /* Reserved */ ++#define PCI_CHIP_SKYLAKE_SRV_GT3 0x192D + #define PCI_CHIP_SKYLAKE_DT_GT4 0x1932 + #define PCI_CHIP_SKYLAKE_SRV_GT4X 0x193A + #define PCI_CHIP_SKYLAKE_H_GT4 0x193B +@@ -375,10 +379,11 @@ + #define IS_GEN8(devid) (IS_BROADWELL(devid) || \ + IS_CHERRYVIEW(devid)) + +-#define IS_SKL_GT1(devid) ((devid) == PCI_CHIP_SKYLAKE_ULT_GT1 || \ +- (devid) == PCI_CHIP_SKYLAKE_ULX_GT1 || \ +- (devid) == PCI_CHIP_SKYLAKE_DT_GT1 || \ +- (devid) == PCI_CHIP_SKYLAKE_SRV_GT1) ++#define IS_SKL_GT1(devid) ((devid) == PCI_CHIP_SKYLAKE_DT_GT1 || \ ++ (devid) == PCI_CHIP_SKYLAKE_ULT_GT1 || \ ++ (devid) == PCI_CHIP_SKYLAKE_SRV_GT1 || \ ++ (devid) == PCI_CHIP_SKYLAKE_H_GT1 || \ ++ (devid) == PCI_CHIP_SKYLAKE_ULX_GT1) + + #define IS_SKL_GT2(devid) ((devid) == PCI_CHIP_SKYLAKE_DT_GT2 || \ + (devid) == PCI_CHIP_SKYLAKE_FUSED0_GT2 || \ +@@ -391,8 +396,11 @@ + (devid) == PCI_CHIP_SKYLAKE_ULX_GT2 || \ + (devid) == PCI_CHIP_SKYLAKE_MOBILE_GT2) + +-#define IS_SKL_GT3(devid) ((devid) == PCI_CHIP_SKYLAKE_GT3 || \ +- (devid) == PCI_CHIP_SKYLAKE_HALO_GT3) ++#define IS_SKL_GT3(devid) ((devid) == PCI_CHIP_SKYLAKE_ULT_GT3_0 || \ ++ (devid) == PCI_CHIP_SKYLAKE_ULT_GT3_1 || \ ++ (devid) == PCI_CHIP_SKYLAKE_ULT_GT3_2 || \ ++ (devid) == PCI_CHIP_SKYLAKE_HALO_GT3 || \ ++ (devid) == PCI_CHIP_SKYLAKE_SRV_GT3) + + #define IS_SKL_GT4(devid) ((devid) == PCI_CHIP_SKYLAKE_SRV_GT4 || \ + (devid) == PCI_CHIP_SKYLAKE_DT_GT4 || \ +-- +2.5.5 + diff --git a/SOURCES/0001-nouveau-restore-check-that-avoids-multiple-user-bos-.patch b/SOURCES/0001-nouveau-restore-check-that-avoids-multiple-user-bos-.patch deleted file mode 100644 index 7c546e7..0000000 --- a/SOURCES/0001-nouveau-restore-check-that-avoids-multiple-user-bos-.patch +++ /dev/null @@ -1,45 +0,0 @@ -From 812e8fe6ce46d733c30207ee26c788c61f546294 Mon Sep 17 00:00:00 2001 -From: Ben Skeggs -Date: Wed, 6 May 2015 14:34:22 +1000 -Subject: [PATCH] nouveau: restore check that avoids multiple user bos per - kernel bo - -Lost in 5ea6f1c32628887c9df0c53bc8c199eb12633fec, triggering fdo#89842. - -Unlike the PRIME fd->handle interfaces, the GEM_OPEN interface doesn't -do anything at the kernel level to prevent this situation occuring, -and we end up with multiple GEM handles for a single kernel buffer. - -Signed-off-by: Ben Skeggs ---- - nouveau/nouveau.c | 10 ++++++++++ - 1 file changed, 10 insertions(+) - -diff --git a/nouveau/nouveau.c b/nouveau/nouveau.c -index 0071249..7393474 100644 ---- a/nouveau/nouveau.c -+++ b/nouveau/nouveau.c -@@ -480,10 +480,20 @@ nouveau_bo_name_ref(struct nouveau_device *dev, uint32_t name, - struct nouveau_bo **pbo) - { - struct nouveau_device_priv *nvdev = nouveau_device(dev); -+ struct nouveau_bo_priv *nvbo; - struct drm_gem_open req = { .name = name }; - int ret; - - pthread_mutex_lock(&nvdev->lock); -+ DRMLISTFOREACHENTRY(nvbo, &nvdev->bo_list, head) { -+ if (nvbo->name == name) { -+ ret = nouveau_bo_wrap_locked(dev, nvbo->base.handle, -+ pbo, name); -+ pthread_mutex_unlock(&nvdev->lock); -+ return ret; -+ } -+ } -+ - ret = drmIoctl(dev->fd, DRM_IOCTL_GEM_OPEN, &req); - if (ret == 0) { - ret = nouveau_bo_wrap_locked(dev, req.handle, pbo, name); --- -1.9.3 - diff --git a/SOURCES/0002-intel-Removing-PCI-IDs-that-are-no-longer-listed-as-.patch b/SOURCES/0002-intel-Removing-PCI-IDs-that-are-no-longer-listed-as-.patch new file mode 100644 index 0000000..c498176 --- /dev/null +++ b/SOURCES/0002-intel-Removing-PCI-IDs-that-are-no-longer-listed-as-.patch @@ -0,0 +1,69 @@ +From 7996a8707eacd59a45e7128a543393dca2776e26 Mon Sep 17 00:00:00 2001 +From: Rodrigo Vivi +Date: Mon, 27 Jun 2016 17:02:34 -0700 +Subject: [PATCH 2/2] intel: Removing PCI IDs that are no longer listed as + Kabylake. + +This is unusual. Usually IDs listed on early stages of platform +definition are kept there as reserved for later use. + +However these IDs here are not listed anymore in any of steppings +and devices IDs tables for Kabylake on configurations overview +section of BSpec. + +So it is better removing them before they become used in any +other future platform. + +v2: Rebase. + +Reviewed-by: Dhinakaran Pandiyan +Acked-by: Kenneth Graunke +Signed-off-by: Rodrigo Vivi +--- + intel/intel_chipset.h | 16 +++------------- + 1 file changed, 3 insertions(+), 13 deletions(-) + +diff --git a/intel/intel_chipset.h b/intel/intel_chipset.h +index 6b8d4e9..514f659 100644 +--- a/intel/intel_chipset.h ++++ b/intel/intel_chipset.h +@@ -204,18 +204,13 @@ + #define PCI_CHIP_KABYLAKE_DT_GT2 0x5912 + #define PCI_CHIP_KABYLAKE_DT_GT1_5 0x5917 + #define PCI_CHIP_KABYLAKE_DT_GT1 0x5902 +-#define PCI_CHIP_KABYLAKE_DT_GT4 0x5932 + #define PCI_CHIP_KABYLAKE_HALO_GT2 0x591B + #define PCI_CHIP_KABYLAKE_HALO_GT4 0x593B +-#define PCI_CHIP_KABYLAKE_HALO_GT3 0x592B + #define PCI_CHIP_KABYLAKE_HALO_GT1_0 0x5908 + #define PCI_CHIP_KABYLAKE_HALO_GT1_1 0x590B + #define PCI_CHIP_KABYLAKE_SRV_GT2 0x591A +-#define PCI_CHIP_KABYLAKE_SRV_GT3 0x592A + #define PCI_CHIP_KABYLAKE_SRV_GT1 0x590A +-#define PCI_CHIP_KABYLAKE_SRV_GT4 0x593A + #define PCI_CHIP_KABYLAKE_WKS_GT2 0x591D +-#define PCI_CHIP_KABYLAKE_WKS_GT4 0x593D + + #define PCI_CHIP_BROXTON_0 0x0A84 + #define PCI_CHIP_BROXTON_1 0x1A84 +@@ -431,14 +426,9 @@ + + #define IS_KBL_GT3(devid) ((devid) == PCI_CHIP_KABYLAKE_ULT_GT3_0 || \ + (devid) == PCI_CHIP_KABYLAKE_ULT_GT3_1 || \ +- (devid) == PCI_CHIP_KABYLAKE_ULT_GT3_2 || \ +- (devid) == PCI_CHIP_KABYLAKE_HALO_GT3 || \ +- (devid) == PCI_CHIP_KABYLAKE_SRV_GT3) +- +-#define IS_KBL_GT4(devid) ((devid) == PCI_CHIP_KABYLAKE_DT_GT4 || \ +- (devid) == PCI_CHIP_KABYLAKE_HALO_GT4 || \ +- (devid) == PCI_CHIP_KABYLAKE_SRV_GT4 || \ +- (devid) == PCI_CHIP_KABYLAKE_WKS_GT4) ++ (devid) == PCI_CHIP_KABYLAKE_ULT_GT3_2) ++ ++#define IS_KBL_GT4(devid) ((devid) == PCI_CHIP_KABYLAKE_HALO_GT4) + + #define IS_KABYLAKE(devid) (IS_KBL_GT1(devid) || \ + IS_KBL_GT2(devid) || \ +-- +2.7.4 + diff --git a/SOURCES/libdrm-2.4.25-check-programs.patch b/SOURCES/libdrm-2.4.25-check-programs.patch index 29949ee..9901755 100644 --- a/SOURCES/libdrm-2.4.25-check-programs.patch +++ b/SOURCES/libdrm-2.4.25-check-programs.patch @@ -1,10 +1,10 @@ -diff -up libdrm-2.4.25/tests/Makefile.am.jx libdrm-2.4.25/tests/Makefile.am ---- libdrm-2.4.25/tests/Makefile.am.jx 2011-03-21 09:39:24.000000000 -0400 -+++ libdrm-2.4.25/tests/Makefile.am 2011-04-18 11:40:17.000000000 -0400 -@@ -58,3 +58,6 @@ endif - check_PROGRAMS += $(TESTS) - +diff -up libdrm-2.4.67/tests/Makefile.am.check libdrm-2.4.67/tests/Makefile.am +--- libdrm-2.4.67/tests/Makefile.am.check 2016-02-19 15:32:46.197712477 +1000 ++++ libdrm-2.4.67/tests/Makefile.am 2016-02-19 15:33:33.300996618 +1000 +@@ -73,3 +73,6 @@ TESTS += \ endif + + check_PROGRAMS += $(TESTS) + +check-programs: + @echo $(check_PROGRAMS) diff --git a/SOURCES/libdrm-make-dri-perms-okay.patch b/SOURCES/libdrm-make-dri-perms-okay.patch index 0d82319..f4c25cd 100644 --- a/SOURCES/libdrm-make-dri-perms-okay.patch +++ b/SOURCES/libdrm-make-dri-perms-okay.patch @@ -1,12 +1,12 @@ -diff -up libdrm-20080303/xf86drm.h.da libdrm-20080303/xf86drm.h ---- libdrm-20080303/xf86drm.h.da 2008-03-19 15:26:31.000000000 +1000 -+++ libdrm-20080303/xf86drm.h 2008-03-19 15:26:46.000000000 +1000 -@@ -45,7 +45,7 @@ +diff -up libdrm-2.4.67/xf86drm.h.forceperms libdrm-2.4.67/xf86drm.h +--- libdrm-2.4.67/xf86drm.h.forceperms 2016-02-19 15:31:44.026017537 +1000 ++++ libdrm-2.4.67/xf86drm.h 2016-02-19 15:32:21.070027440 +1000 +@@ -74,7 +74,7 @@ extern "C" { /* Default /dev/dri directory permissions 0755 */ #define DRM_DEV_DIRMODE \ (S_IRUSR|S_IWUSR|S_IXUSR|S_IRGRP|S_IXGRP|S_IROTH|S_IXOTH) -#define DRM_DEV_MODE (S_IRUSR|S_IWUSR|S_IRGRP|S_IWGRP) +#define DRM_DEV_MODE (S_IRUSR|S_IWUSR|S_IRGRP|S_IWGRP|S_IROTH|S_IWOTH) - #define DRM_DIR_NAME "/dev/dri" - #define DRM_DEV_NAME "%s/card%d" + #ifdef __OpenBSD__ + #define DRM_DIR_NAME "/dev" diff --git a/SPECS/libdrm.spec b/SPECS/libdrm.spec index 5d42731..e5cdc6f 100644 --- a/SPECS/libdrm.spec +++ b/SPECS/libdrm.spec @@ -2,7 +2,7 @@ Summary: Direct Rendering Manager runtime library Name: libdrm -Version: 2.4.60 +Version: 2.4.67 Release: 3%{?dist} License: MIT Group: System Environment/Libraries @@ -30,6 +30,7 @@ BuildRequires: libxslt docbook-style-xsl %ifarch %{ix86} x86_64 ppc ppc64 ppc64le s390x armv7hl aarch64 BuildRequires: valgrind-devel %endif +BuildRequires: xorg-x11-util-macros Source2: 91-drm-modeset.rules @@ -40,8 +41,13 @@ Patch4: libdrm-2.4.0-no-bc.patch # make rule to print the list of test programs Patch5: libdrm-2.4.25-check-programs.patch -# backport nouveau fix -Patch10: 0001-nouveau-restore-check-that-avoids-multiple-user-bos-.patch +# Missing PCI IDs. +Patch10: 0001-intel-Adding-missing-Broxton-PCI-IDs.patch +Patch11: 0001-intel-skl-Add-missing-SKL-PCI-IDs.patch + +# Kbl PCI IDs. +Patch12: 0001-intel-Add-more-Kabylake-PCI-IDs.patch +Patch13: 0002-intel-Removing-PCI-IDs-that-are-no-longer-listed-as-.patch %description Direct Rendering Manager runtime library @@ -69,7 +75,10 @@ Utility programs for the kernel DRM interface. Will void your warranty. %patch3 -p1 -b .forceperms %patch4 -p1 -b .no-bc %patch5 -p1 -b .check -%patch10 -p1 -b .nouveau +%patch10 -p1 -b .bxtid +%patch11 -p1 -b .sklid +%patch12 -p1 -b .kblid1 +%patch13 -p1 -b .kblid2 %build autoreconf -v --install || exit 1 @@ -91,7 +100,7 @@ make install DESTDIR=$RPM_BUILD_ROOT pushd tests mkdir -p $RPM_BUILD_ROOT%{_bindir} for foo in $(make check-programs) ; do - install -m 0755 .libs/$foo $RPM_BUILD_ROOT%{_bindir} +libtool --mode=install install -m 0755 $foo %{buildroot}%{_bindir} done popd # SUBDIRS=libdrm @@ -129,6 +138,8 @@ done %{_libdir}/libdrm_freedreno.so.1 %{_libdir}/libdrm_freedreno.so.1.0.0 %endif +%{_libdir}/libdrm_amdgpu.so.1 +%{_libdir}/libdrm_amdgpu.so.1.0.0 %{_libdir}/libdrm_radeon.so.1 %{_libdir}/libdrm_radeon.so.1.0.1 %{_libdir}/libdrm_nouveau.so.2 @@ -141,6 +152,7 @@ done %defattr(-,root,root,-) %{_bindir}/dristat %{_bindir}/drmstat +%{_bindir}/drmdevice %{_bindir}/getclient %{_bindir}/getstats %{_bindir}/getversion @@ -152,7 +164,13 @@ done %{_bindir}/modeprint %{_bindir}/vbltest %{_bindir}/kmstest +%{_bindir}/kms-steal-crtc +%{_bindir}/kms-universal-planes %exclude %{_bindir}/exynos* +%exclude %{_bindir}/drmsl +%exclude %{_bindir}/hash +%exclude %{_bindir}/proptest +%exclude %{_bindir}/random %files devel %defattr(-,root,root,-) @@ -178,7 +196,10 @@ done %endif %ifarch %{arm} aarch64 %{_includedir}/freedreno/ +%{_includedir}/libdrm/vc4_packet.h +%{_includedir}/libdrm/vc4_qpu_defines.h %endif +%{_includedir}/libdrm/amdgpu.h %{_includedir}/libdrm/radeon_bo.h %{_includedir}/libdrm/radeon_bo_gem.h %{_includedir}/libdrm/radeon_bo_int.h @@ -187,8 +208,9 @@ done %{_includedir}/libdrm/radeon_cs_int.h %{_includedir}/libdrm/radeon_surface.h %{_includedir}/libdrm/r600_pci_ids.h -%{_includedir}/libdrm/nouveau.h %{_includedir}/libdrm/*_drm.h +%{_includedir}/libdrm/nouveau/*.h +%{_includedir}/libdrm/nouveau/nvif/*.h %{_includedir}/libkms %{_libdir}/libdrm.so %ifarch %{ix86} x86_64 ia64 @@ -203,6 +225,7 @@ done %{_libdir}/libdrm_freedreno.so %endif %{_libdir}/libdrm_radeon.so +%{_libdir}/libdrm_amdgpu.so %{_libdir}/libdrm_nouveau.so %{_libdir}/libkms.so %{_libdir}/pkgconfig/libdrm.pc @@ -216,14 +239,25 @@ done %endif %ifarch %{arm} aarch64 %{_libdir}/pkgconfig/libdrm_freedreno.pc +%{_libdir}/pkgconfig/libdrm_vc4.pc %endif %{_libdir}/pkgconfig/libdrm_radeon.pc +%{_libdir}/pkgconfig/libdrm_amdgpu.pc %{_libdir}/pkgconfig/libdrm_nouveau.pc %{_libdir}/pkgconfig/libkms.pc %{_mandir}/man3/drm*.3* %{_mandir}/man7/drm*.7* %changelog +* Tue Aug 09 2016 Rob Clark - 2.4.67-3 +- kbl pci ids. + +* Tue Jun 14 2016 Dave Airlie - 2.4.67-2 +- add missing intel pci ids. + +* Fri Feb 19 2016 Dave Airlie 2.4.67-1 +- libdrm 2.4.67 + * Fri May 22 2015 Dave Airlie 2.4.60-3 - backport nouveau fix from 2.4.61