Blame SOURCES/libaio-add-arm64-support.patch

8b4eb7
diff -up libaio-0.3.109/src/libaio.h.orig libaio-0.3.109/src/libaio.h
8b4eb7
--- libaio-0.3.109/src/libaio.h.orig	2009-10-09 14:17:02.000000000 -0400
8b4eb7
+++ libaio-0.3.109/src/libaio.h	2014-03-13 10:22:47.062638753 -0400
8b4eb7
@@ -83,6 +83,16 @@ typedef enum io_iocb_cmd {
8b4eb7
 #define PADDEDptr(x, y)	x; unsigned y
8b4eb7
 #define PADDEDul(x, y)	unsigned long x; unsigned y
8b4eb7
 #  endif
8b4eb7
+#elif defined(__aarch64__)
8b4eb7
+#  if defined (__AARCH64EB__) /* big endian, 64 bits */
8b4eb7
+#define PADDED(x, y)    unsigned y; x
8b4eb7
+#define PADDEDptr(x,y)  x
8b4eb7
+#define PADDEDul(x, y)  unsigned long x
8b4eb7
+#  elif defined(__AARCH64EL__) /* little endian, 64 bits */
8b4eb7
+#define PADDED(x, y)    x, y
8b4eb7
+#define PADDEDptr(x, y) x
8b4eb7
+#define PADDEDul(x, y)  unsigned long x
8b4eb7
+#  endif
8b4eb7
 #else
8b4eb7
 #error	endian?
8b4eb7
 #endif
8b4eb7
diff -up libaio-0.3.109/src/syscall-arm64.h.orig libaio-0.3.109/src/syscall-arm64.h
8b4eb7
--- libaio-0.3.109/src/syscall-arm64.h.orig	2014-03-13 10:21:16.090895733 -0400
8b4eb7
+++ libaio-0.3.109/src/syscall-arm64.h	2014-03-13 10:21:16.090895733 -0400
8b4eb7
@@ -0,0 +1,101 @@
8b4eb7
+/*
8b4eb7
+ *  linux/include/asm-arm/unistd.h
8b4eb7
+ *
8b4eb7
+ *  Copyright (C) 2001-2005 Russell King
8b4eb7
+ *
8b4eb7
+ * This program is free software; you can redistribute it and/or modify
8b4eb7
+ * it under the terms of the GNU General Public License version 2 as
8b4eb7
+ * published by the Free Software Foundation.
8b4eb7
+ *
8b4eb7
+ * Please forward _all_ changes to this file to rmk@arm.linux.org.uk,
8b4eb7
+ * no matter what the change is.  Thanks!
8b4eb7
+ */
8b4eb7
+
8b4eb7
+#define __NR_io_setup			0
8b4eb7
+#define __NR_io_destroy			1
8b4eb7
+#define __NR_io_submit			2
8b4eb7
+#define __NR_io_cancel			3
8b4eb7
+#define __NR_io_getevents		4
8b4eb7
+
8b4eb7
+#define __sys2(x) #x
8b4eb7
+#define __sys1(x) __sys2(x)
8b4eb7
+
8b4eb7
+#define __SYS_REG(name) register long __sysreg __asm__("w8") = __NR_##name;
8b4eb7
+#define __SYS_REG_LIST(regs...) "r" (__sysreg) , ##regs
8b4eb7
+#define __syscall(name) "svc\t#0"
8b4eb7
+
8b4eb7
+#define io_syscall1(type,fname,sname,type1,arg1)			\
8b4eb7
+type fname(type1 arg1) {						\
8b4eb7
+  __SYS_REG(sname)							\
8b4eb7
+  register long __x0 __asm__("x0") = (long)arg1;			\
8b4eb7
+  register long __res_x0 __asm__("x0");					\
8b4eb7
+  __asm__ __volatile__ (						\
8b4eb7
+  __syscall(sname)							\
8b4eb7
+	: "=r" (__res_x0)						\
8b4eb7
+	: __SYS_REG_LIST( "0" (__x0) )					\
8b4eb7
+	: "memory" );							\
8b4eb7
+  return (type) __res_x0;						\
8b4eb7
+}
8b4eb7
+
8b4eb7
+#define io_syscall2(type,fname,sname,type1,arg1,type2,arg2)		\
8b4eb7
+type fname(type1 arg1,type2 arg2) {					\
8b4eb7
+  __SYS_REG(sname)							\
8b4eb7
+  register long __x0 __asm__("x0") = (long)arg1;			\
8b4eb7
+  register long __x1 __asm__("x1") = (long)arg2;			\
8b4eb7
+  register long __res_x0 __asm__("x0");					\
8b4eb7
+  __asm__ __volatile__ (						\
8b4eb7
+  __syscall(sname)							\
8b4eb7
+	: "=r" (__res_x0)						\
8b4eb7
+	: __SYS_REG_LIST( "0" (__x0), "r" (__x1) )			\
8b4eb7
+	: "memory" );							\
8b4eb7
+  return (type) __res_x0;						\
8b4eb7
+}
8b4eb7
+
8b4eb7
+#define io_syscall3(type,fname,sname,type1,arg1,type2,arg2,type3,arg3)	\
8b4eb7
+type fname(type1 arg1,type2 arg2,type3 arg3) {				\
8b4eb7
+  __SYS_REG(sname)							\
8b4eb7
+  register long __x0 __asm__("x0") = (long)arg1;			\
8b4eb7
+  register long __x1 __asm__("x1") = (long)arg2;			\
8b4eb7
+  register long __x2 __asm__("x2") = (long)arg3;			\
8b4eb7
+  register long __res_x0 __asm__("x0");					\
8b4eb7
+  __asm__ __volatile__ (						\
8b4eb7
+  __syscall(sname)							\
8b4eb7
+	: "=r" (__res_x0)						\
8b4eb7
+	: __SYS_REG_LIST( "0" (__x0), "r" (__x1), "r" (__x2) )		\
8b4eb7
+	: "memory" );							\
8b4eb7
+  return (type) __res_x0;						\
8b4eb7
+}
8b4eb7
+
8b4eb7
+#define io_syscall4(type,fname,sname,type1,arg1,type2,arg2,type3,arg3,type4,arg4)\
8b4eb7
+type fname(type1 arg1, type2 arg2, type3 arg3, type4 arg4) {		\
8b4eb7
+  __SYS_REG(sname)							\
8b4eb7
+  register long __x0 __asm__("x0") = (long)arg1;			\
8b4eb7
+  register long __x1 __asm__("x1") = (long)arg2;			\
8b4eb7
+  register long __x2 __asm__("x2") = (long)arg3;			\
8b4eb7
+  register long __x3 __asm__("x3") = (long)arg4;			\
8b4eb7
+  register long __res_x0 __asm__("x0");					\
8b4eb7
+  __asm__ __volatile__ (						\
8b4eb7
+  __syscall(sname)							\
8b4eb7
+	: "=r" (__res_x0)						\
8b4eb7
+	: __SYS_REG_LIST( "0" (__x0), "r" (__x1), "r" (__x2), "r" (__x3) ) \
8b4eb7
+	: "memory" );							\
8b4eb7
+  return (type) __res_x0;						\
8b4eb7
+}
8b4eb7
+
8b4eb7
+#define io_syscall5(type,fname,sname,type1,arg1,type2,arg2,type3,arg3,type4,arg4,type5,arg5)	\
8b4eb7
+type fname(type1 arg1, type2 arg2, type3 arg3, type4 arg4, type5 arg5) {\
8b4eb7
+  __SYS_REG(sname)							\
8b4eb7
+  register long __x0 __asm__("x0") = (long)arg1;			\
8b4eb7
+  register long __x1 __asm__("x1") = (long)arg2;			\
8b4eb7
+  register long __x2 __asm__("x2") = (long)arg3;			\
8b4eb7
+  register long __x3 __asm__("x3") = (long)arg4;			\
8b4eb7
+  register long __x4 __asm__("x4") = (long)arg5;			\
8b4eb7
+  register long __res_x0 __asm__("x0");					\
8b4eb7
+  __asm__ __volatile__ (						\
8b4eb7
+  __syscall(sname)							\
8b4eb7
+	: "=r" (__res_x0)						\
8b4eb7
+	: __SYS_REG_LIST( "0" (__x0), "r" (__x1), "r" (__x2),		\
8b4eb7
+			  "r" (__x3), "r" (__x4) )			\
8b4eb7
+	: "memory" );							\
8b4eb7
+  return (type) __res_x0;						\
8b4eb7
+}
8b4eb7
diff -up libaio-0.3.109/src/syscall.h.orig libaio-0.3.109/src/syscall.h
8b4eb7
--- libaio-0.3.109/src/syscall.h.orig	2009-10-09 14:17:02.000000000 -0400
8b4eb7
+++ libaio-0.3.109/src/syscall.h	2014-03-13 10:23:14.039452006 -0400
8b4eb7
@@ -24,6 +24,8 @@
8b4eb7
 #include "syscall-alpha.h"
8b4eb7
 #elif defined(__arm__)
8b4eb7
 #include "syscall-arm.h"
8b4eb7
+#elif defined(__aarch64__)
8b4eb7
+#include "syscall-arm64.h"
8b4eb7
 #else
8b4eb7
 #error "add syscall-arch.h"
8b4eb7
 #endif