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d8f823 |
From 98de485b333df8c2d5a2cc823b4718e410b4a5a3 Mon Sep 17 00:00:00 2001
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d8f823 |
From: Alaa Hleihel <ahleihel@redhat.com>
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d8f823 |
Date: Tue, 12 May 2020 10:55:07 -0400
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d8f823 |
Subject: [PATCH 191/312] [netdrv] net/mlx5: DR, Improve log messages
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d8f823 |
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d8f823 |
Message-id: <20200512105530.4207-102-ahleihel@redhat.com>
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d8f823 |
Patchwork-id: 306974
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d8f823 |
Patchwork-instance: patchwork
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d8f823 |
O-Subject: [RHEL8.3 BZ 1789382 101/124] net/mlx5: DR, Improve log messages
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d8f823 |
Bugzilla: 1789384 1789382
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d8f823 |
RH-Acked-by: Tony Camuso <tcamuso@redhat.com>
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d8f823 |
RH-Acked-by: Kamal Heib <kheib@redhat.com>
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d8f823 |
RH-Acked-by: Jarod Wilson <jarod@redhat.com>
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d8f823 |
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d8f823 |
Bugzilla: http://bugzilla.redhat.com/1789382
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d8f823 |
Bugzilla: http://bugzilla.redhat.com/1789384
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d8f823 |
Upstream: v5.7-rc1
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d8f823 |
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d8f823 |
commit b7d0db5520d87c5ddf0c2388f1e542e622ebfdc5
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d8f823 |
Author: Erez Shitrit <erezsh@mellanox.com>
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d8f823 |
Date: Sun Jan 12 10:55:54 2020 +0200
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d8f823 |
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d8f823 |
net/mlx5: DR, Improve log messages
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d8f823 |
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d8f823 |
Few print messages are in debug level where they should be in error, and
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d8f823 |
few messages are missing.
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d8f823 |
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d8f823 |
Signed-off-by: Erez Shitrit <erezsh@mellanox.com>
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d8f823 |
Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
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d8f823 |
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d8f823 |
Signed-off-by: Alaa Hleihel <ahleihel@redhat.com>
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d8f823 |
Signed-off-by: Frantisek Hrbata <fhrbata@redhat.com>
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d8f823 |
---
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d8f823 |
.../ethernet/mellanox/mlx5/core/steering/dr_action.c | 10 +++++-----
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d8f823 |
.../ethernet/mellanox/mlx5/core/steering/dr_domain.c | 17 ++++++++++-------
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d8f823 |
.../ethernet/mellanox/mlx5/core/steering/dr_icm_pool.c | 2 +-
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d8f823 |
.../ethernet/mellanox/mlx5/core/steering/dr_matcher.c | 10 +++++-----
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d8f823 |
.../net/ethernet/mellanox/mlx5/core/steering/dr_rule.c | 18 +++++++++---------
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d8f823 |
.../net/ethernet/mellanox/mlx5/core/steering/dr_send.c | 16 ++++++++++++----
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d8f823 |
.../net/ethernet/mellanox/mlx5/core/steering/dr_ste.c | 2 +-
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d8f823 |
.../ethernet/mellanox/mlx5/core/steering/dr_table.c | 8 ++++++--
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d8f823 |
8 files changed, 49 insertions(+), 34 deletions(-)
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d8f823 |
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d8f823 |
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_action.c b/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_action.c
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d8f823 |
index 2d93228ff633..1d90378b155c 100644
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d8f823 |
--- a/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_action.c
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d8f823 |
+++ b/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_action.c
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d8f823 |
@@ -672,7 +672,7 @@ int mlx5dr_actions_build_ste_arr(struct mlx5dr_matcher *matcher,
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d8f823 |
dest_action = action;
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d8f823 |
if (!action->dest_tbl.is_fw_tbl) {
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d8f823 |
if (action->dest_tbl.tbl->dmn != dmn) {
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d8f823 |
- mlx5dr_dbg(dmn,
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d8f823 |
+ mlx5dr_err(dmn,
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d8f823 |
"Destination table belongs to a different domain\n");
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d8f823 |
goto out_invalid_arg;
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d8f823 |
}
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d8f823 |
@@ -703,7 +703,7 @@ int mlx5dr_actions_build_ste_arr(struct mlx5dr_matcher *matcher,
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d8f823 |
action->dest_tbl.fw_tbl.rx_icm_addr =
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d8f823 |
output.sw_owner_icm_root_0;
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d8f823 |
} else {
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d8f823 |
- mlx5dr_dbg(dmn,
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d8f823 |
+ mlx5dr_err(dmn,
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d8f823 |
"Failed mlx5_cmd_query_flow_table ret: %d\n",
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d8f823 |
ret);
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d8f823 |
return ret;
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d8f823 |
@@ -772,7 +772,7 @@ int mlx5dr_actions_build_ste_arr(struct mlx5dr_matcher *matcher,
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d8f823 |
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d8f823 |
/* Check action duplication */
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d8f823 |
if (++action_type_set[action_type] > max_actions_type) {
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d8f823 |
- mlx5dr_dbg(dmn, "Action type %d supports only max %d time(s)\n",
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d8f823 |
+ mlx5dr_err(dmn, "Action type %d supports only max %d time(s)\n",
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d8f823 |
action_type, max_actions_type);
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d8f823 |
goto out_invalid_arg;
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d8f823 |
}
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d8f823 |
@@ -781,7 +781,7 @@ int mlx5dr_actions_build_ste_arr(struct mlx5dr_matcher *matcher,
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d8f823 |
if (dr_action_validate_and_get_next_state(action_domain,
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d8f823 |
action_type,
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d8f823 |
&state)) {
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d8f823 |
- mlx5dr_dbg(dmn, "Invalid action sequence provided\n");
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d8f823 |
+ mlx5dr_err(dmn, "Invalid action sequence provided\n");
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d8f823 |
return -EOPNOTSUPP;
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d8f823 |
}
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d8f823 |
}
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d8f823 |
@@ -797,7 +797,7 @@ int mlx5dr_actions_build_ste_arr(struct mlx5dr_matcher *matcher,
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d8f823 |
rx_rule && recalc_cs_required && dest_action) {
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d8f823 |
ret = dr_action_handle_cs_recalc(dmn, dest_action, &attr.final_icm_addr);
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d8f823 |
if (ret) {
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d8f823 |
- mlx5dr_dbg(dmn,
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d8f823 |
+ mlx5dr_err(dmn,
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d8f823 |
"Failed to handle checksum recalculation err %d\n",
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d8f823 |
ret);
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d8f823 |
return ret;
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d8f823 |
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_domain.c b/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_domain.c
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d8f823 |
index a9da961d4d2f..48b6358b6845 100644
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d8f823 |
--- a/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_domain.c
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d8f823 |
+++ b/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_domain.c
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d8f823 |
@@ -59,7 +59,7 @@ static int dr_domain_init_resources(struct mlx5dr_domain *dmn)
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d8f823 |
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d8f823 |
ret = mlx5_core_alloc_pd(dmn->mdev, &dmn->pdn);
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d8f823 |
if (ret) {
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d8f823 |
- mlx5dr_dbg(dmn, "Couldn't allocate PD\n");
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d8f823 |
+ mlx5dr_err(dmn, "Couldn't allocate PD, ret: %d", ret);
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d8f823 |
return ret;
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d8f823 |
}
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d8f823 |
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d8f823 |
@@ -192,7 +192,7 @@ static int dr_domain_query_fdb_caps(struct mlx5_core_dev *mdev,
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d8f823 |
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d8f823 |
ret = dr_domain_query_vports(dmn);
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d8f823 |
if (ret) {
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d8f823 |
- mlx5dr_dbg(dmn, "Failed to query vports caps\n");
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d8f823 |
+ mlx5dr_err(dmn, "Failed to query vports caps (err: %d)", ret);
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d8f823 |
goto free_vports_caps;
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d8f823 |
}
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d8f823 |
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d8f823 |
@@ -213,7 +213,7 @@ static int dr_domain_caps_init(struct mlx5_core_dev *mdev,
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d8f823 |
int ret;
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d8f823 |
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d8f823 |
if (MLX5_CAP_GEN(mdev, port_type) != MLX5_CAP_PORT_TYPE_ETH) {
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d8f823 |
- mlx5dr_dbg(dmn, "Failed to allocate domain, bad link type\n");
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d8f823 |
+ mlx5dr_err(dmn, "Failed to allocate domain, bad link type\n");
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d8f823 |
return -EOPNOTSUPP;
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d8f823 |
}
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d8f823 |
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d8f823 |
@@ -257,7 +257,7 @@ static int dr_domain_caps_init(struct mlx5_core_dev *mdev,
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d8f823 |
dmn->info.tx.ste_type = MLX5DR_STE_TYPE_TX;
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d8f823 |
vport_cap = mlx5dr_get_vport_cap(&dmn->info.caps, 0);
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d8f823 |
if (!vport_cap) {
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d8f823 |
- mlx5dr_dbg(dmn, "Failed to get esw manager vport\n");
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d8f823 |
+ mlx5dr_err(dmn, "Failed to get esw manager vport\n");
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d8f823 |
return -ENOENT;
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d8f823 |
}
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d8f823 |
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d8f823 |
@@ -268,7 +268,7 @@ static int dr_domain_caps_init(struct mlx5_core_dev *mdev,
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d8f823 |
dmn->info.tx.drop_icm_addr = dmn->info.caps.esw_tx_drop_address;
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d8f823 |
break;
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d8f823 |
default:
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d8f823 |
- mlx5dr_dbg(dmn, "Invalid domain\n");
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d8f823 |
+ mlx5dr_err(dmn, "Invalid domain\n");
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d8f823 |
ret = -EINVAL;
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d8f823 |
break;
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d8f823 |
}
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d8f823 |
@@ -300,7 +300,7 @@ mlx5dr_domain_create(struct mlx5_core_dev *mdev, enum mlx5dr_domain_type type)
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d8f823 |
mutex_init(&dmn->mutex);
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d8f823 |
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d8f823 |
if (dr_domain_caps_init(mdev, dmn)) {
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d8f823 |
- mlx5dr_dbg(dmn, "Failed init domain, no caps\n");
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d8f823 |
+ mlx5dr_err(dmn, "Failed init domain, no caps\n");
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d8f823 |
goto free_domain;
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d8f823 |
}
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d8f823 |
|
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d8f823 |
@@ -348,8 +348,11 @@ int mlx5dr_domain_sync(struct mlx5dr_domain *dmn, u32 flags)
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d8f823 |
mutex_lock(&dmn->mutex);
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d8f823 |
ret = mlx5dr_send_ring_force_drain(dmn);
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d8f823 |
mutex_unlock(&dmn->mutex);
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d8f823 |
- if (ret)
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d8f823 |
+ if (ret) {
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d8f823 |
+ mlx5dr_err(dmn, "Force drain failed flags: %d, ret: %d\n",
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d8f823 |
+ flags, ret);
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d8f823 |
return ret;
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d8f823 |
+ }
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d8f823 |
}
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d8f823 |
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d8f823 |
if (flags & MLX5DR_DOMAIN_SYNC_FLAGS_HW)
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d8f823 |
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_icm_pool.c b/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_icm_pool.c
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d8f823 |
index d7c7467e2d53..30d2d7376f56 100644
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d8f823 |
--- a/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_icm_pool.c
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d8f823 |
+++ b/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_icm_pool.c
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d8f823 |
@@ -468,7 +468,7 @@ mlx5dr_icm_alloc_chunk(struct mlx5dr_icm_pool *pool,
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d8f823 |
err = mlx5dr_cmd_sync_steering(pool->dmn->mdev);
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|
d8f823 |
if (err) {
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|
d8f823 |
dr_icm_chill_buckets_abort(pool, bucket, buckets);
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|
d8f823 |
- mlx5dr_dbg(pool->dmn, "Sync_steering failed\n");
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|
d8f823 |
+ mlx5dr_err(pool->dmn, "Sync_steering failed\n");
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d8f823 |
chunk = NULL;
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d8f823 |
goto out;
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d8f823 |
}
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d8f823 |
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_matcher.c b/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_matcher.c
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d8f823 |
index 2ecec4429070..a95938874798 100644
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d8f823 |
--- a/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_matcher.c
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d8f823 |
+++ b/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_matcher.c
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d8f823 |
@@ -388,14 +388,14 @@ static int dr_matcher_set_ste_builders(struct mlx5dr_matcher *matcher,
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d8f823 |
mlx5dr_ste_build_empty_always_hit(&sb[idx++], rx);
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d8f823 |
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d8f823 |
if (idx == 0) {
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|
d8f823 |
- mlx5dr_dbg(dmn, "Cannot generate any valid rules from mask\n");
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|
d8f823 |
+ mlx5dr_err(dmn, "Cannot generate any valid rules from mask\n");
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|
d8f823 |
return -EINVAL;
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|
d8f823 |
}
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|
d8f823 |
|
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|
d8f823 |
/* Check that all mask fields were consumed */
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|
d8f823 |
for (i = 0; i < sizeof(struct mlx5dr_match_param); i++) {
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|
d8f823 |
if (((u8 *)&mask)[i] != 0) {
|
|
|
d8f823 |
- mlx5dr_info(dmn, "Mask contains unsupported parameters\n");
|
|
|
d8f823 |
+ mlx5dr_err(dmn, "Mask contains unsupported parameters\n");
|
|
|
d8f823 |
return -EOPNOTSUPP;
|
|
|
d8f823 |
}
|
|
|
d8f823 |
}
|
|
|
d8f823 |
@@ -563,7 +563,7 @@ static int dr_matcher_set_all_ste_builders(struct mlx5dr_matcher *matcher,
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|
|
d8f823 |
dr_matcher_set_ste_builders(matcher, nic_matcher, DR_RULE_IPV6, DR_RULE_IPV6);
|
|
|
d8f823 |
|
|
|
d8f823 |
if (!nic_matcher->ste_builder) {
|
|
|
d8f823 |
- mlx5dr_dbg(dmn, "Cannot generate IPv4 or IPv6 rules with given mask\n");
|
|
|
d8f823 |
+ mlx5dr_err(dmn, "Cannot generate IPv4 or IPv6 rules with given mask\n");
|
|
|
d8f823 |
return -EINVAL;
|
|
|
d8f823 |
}
|
|
|
d8f823 |
|
|
|
d8f823 |
@@ -634,13 +634,13 @@ static int dr_matcher_init(struct mlx5dr_matcher *matcher,
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|
d8f823 |
int ret;
|
|
|
d8f823 |
|
|
|
d8f823 |
if (matcher->match_criteria >= DR_MATCHER_CRITERIA_MAX) {
|
|
|
d8f823 |
- mlx5dr_info(dmn, "Invalid match criteria attribute\n");
|
|
|
d8f823 |
+ mlx5dr_err(dmn, "Invalid match criteria attribute\n");
|
|
|
d8f823 |
return -EINVAL;
|
|
|
d8f823 |
}
|
|
|
d8f823 |
|
|
|
d8f823 |
if (mask) {
|
|
|
d8f823 |
if (mask->match_sz > sizeof(struct mlx5dr_match_param)) {
|
|
|
d8f823 |
- mlx5dr_info(dmn, "Invalid match size attribute\n");
|
|
|
d8f823 |
+ mlx5dr_err(dmn, "Invalid match size attribute\n");
|
|
|
d8f823 |
return -EINVAL;
|
|
|
d8f823 |
}
|
|
|
d8f823 |
mlx5dr_ste_copy_param(matcher->match_criteria,
|
|
|
d8f823 |
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_rule.c b/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_rule.c
|
|
|
d8f823 |
index e4cff7abb348..cce3ee7a6614 100644
|
|
|
d8f823 |
--- a/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_rule.c
|
|
|
d8f823 |
+++ b/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_rule.c
|
|
|
d8f823 |
@@ -826,8 +826,8 @@ dr_rule_handle_ste_branch(struct mlx5dr_rule *rule,
|
|
|
d8f823 |
ste_location, send_ste_list);
|
|
|
d8f823 |
if (!new_htbl) {
|
|
|
d8f823 |
mlx5dr_htbl_put(cur_htbl);
|
|
|
d8f823 |
- mlx5dr_info(dmn, "failed creating rehash table, htbl-log_size: %d\n",
|
|
|
d8f823 |
- cur_htbl->chunk_size);
|
|
|
d8f823 |
+ mlx5dr_err(dmn, "Failed creating rehash table, htbl-log_size: %d\n",
|
|
|
d8f823 |
+ cur_htbl->chunk_size);
|
|
|
d8f823 |
} else {
|
|
|
d8f823 |
cur_htbl = new_htbl;
|
|
|
d8f823 |
}
|
|
|
d8f823 |
@@ -877,7 +877,7 @@ static bool dr_rule_verify(struct mlx5dr_matcher *matcher,
|
|
|
d8f823 |
if (!value_size ||
|
|
|
d8f823 |
(value_size > sizeof(struct mlx5dr_match_param) ||
|
|
|
d8f823 |
(value_size % sizeof(u32)))) {
|
|
|
d8f823 |
- mlx5dr_dbg(matcher->tbl->dmn, "Rule parameters length is incorrect\n");
|
|
|
d8f823 |
+ mlx5dr_err(matcher->tbl->dmn, "Rule parameters length is incorrect\n");
|
|
|
d8f823 |
return false;
|
|
|
d8f823 |
}
|
|
|
d8f823 |
|
|
|
d8f823 |
@@ -888,7 +888,7 @@ static bool dr_rule_verify(struct mlx5dr_matcher *matcher,
|
|
|
d8f823 |
e_idx = min(s_idx + sizeof(param->outer), value_size);
|
|
|
d8f823 |
|
|
|
d8f823 |
if (!dr_rule_cmp_value_to_mask(mask_p, param_p, s_idx, e_idx)) {
|
|
|
d8f823 |
- mlx5dr_dbg(matcher->tbl->dmn, "Rule outer parameters contains a value not specified by mask\n");
|
|
|
d8f823 |
+ mlx5dr_err(matcher->tbl->dmn, "Rule outer parameters contains a value not specified by mask\n");
|
|
|
d8f823 |
return false;
|
|
|
d8f823 |
}
|
|
|
d8f823 |
}
|
|
|
d8f823 |
@@ -898,7 +898,7 @@ static bool dr_rule_verify(struct mlx5dr_matcher *matcher,
|
|
|
d8f823 |
e_idx = min(s_idx + sizeof(param->misc), value_size);
|
|
|
d8f823 |
|
|
|
d8f823 |
if (!dr_rule_cmp_value_to_mask(mask_p, param_p, s_idx, e_idx)) {
|
|
|
d8f823 |
- mlx5dr_dbg(matcher->tbl->dmn, "Rule misc parameters contains a value not specified by mask\n");
|
|
|
d8f823 |
+ mlx5dr_err(matcher->tbl->dmn, "Rule misc parameters contains a value not specified by mask\n");
|
|
|
d8f823 |
return false;
|
|
|
d8f823 |
}
|
|
|
d8f823 |
}
|
|
|
d8f823 |
@@ -908,7 +908,7 @@ static bool dr_rule_verify(struct mlx5dr_matcher *matcher,
|
|
|
d8f823 |
e_idx = min(s_idx + sizeof(param->inner), value_size);
|
|
|
d8f823 |
|
|
|
d8f823 |
if (!dr_rule_cmp_value_to_mask(mask_p, param_p, s_idx, e_idx)) {
|
|
|
d8f823 |
- mlx5dr_dbg(matcher->tbl->dmn, "Rule inner parameters contains a value not specified by mask\n");
|
|
|
d8f823 |
+ mlx5dr_err(matcher->tbl->dmn, "Rule inner parameters contains a value not specified by mask\n");
|
|
|
d8f823 |
return false;
|
|
|
d8f823 |
}
|
|
|
d8f823 |
}
|
|
|
d8f823 |
@@ -918,7 +918,7 @@ static bool dr_rule_verify(struct mlx5dr_matcher *matcher,
|
|
|
d8f823 |
e_idx = min(s_idx + sizeof(param->misc2), value_size);
|
|
|
d8f823 |
|
|
|
d8f823 |
if (!dr_rule_cmp_value_to_mask(mask_p, param_p, s_idx, e_idx)) {
|
|
|
d8f823 |
- mlx5dr_dbg(matcher->tbl->dmn, "Rule misc2 parameters contains a value not specified by mask\n");
|
|
|
d8f823 |
+ mlx5dr_err(matcher->tbl->dmn, "Rule misc2 parameters contains a value not specified by mask\n");
|
|
|
d8f823 |
return false;
|
|
|
d8f823 |
}
|
|
|
d8f823 |
}
|
|
|
d8f823 |
@@ -928,7 +928,7 @@ static bool dr_rule_verify(struct mlx5dr_matcher *matcher,
|
|
|
d8f823 |
e_idx = min(s_idx + sizeof(param->misc3), value_size);
|
|
|
d8f823 |
|
|
|
d8f823 |
if (!dr_rule_cmp_value_to_mask(mask_p, param_p, s_idx, e_idx)) {
|
|
|
d8f823 |
- mlx5dr_dbg(matcher->tbl->dmn, "Rule misc3 parameters contains a value not specified by mask\n");
|
|
|
d8f823 |
+ mlx5dr_err(matcher->tbl->dmn, "Rule misc3 parameters contains a value not specified by mask\n");
|
|
|
d8f823 |
return false;
|
|
|
d8f823 |
}
|
|
|
d8f823 |
}
|
|
|
d8f823 |
@@ -1221,7 +1221,7 @@ dr_rule_create_rule(struct mlx5dr_matcher *matcher,
|
|
|
d8f823 |
dr_rule_remove_action_members(rule);
|
|
|
d8f823 |
free_rule:
|
|
|
d8f823 |
kfree(rule);
|
|
|
d8f823 |
- mlx5dr_info(dmn, "Failed creating rule\n");
|
|
|
d8f823 |
+ mlx5dr_err(dmn, "Failed creating rule\n");
|
|
|
d8f823 |
return NULL;
|
|
|
d8f823 |
}
|
|
|
d8f823 |
|
|
|
d8f823 |
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_send.c b/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_send.c
|
|
|
d8f823 |
index 095ec7b1399d..c0ab9cf74929 100644
|
|
|
d8f823 |
--- a/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_send.c
|
|
|
d8f823 |
+++ b/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_send.c
|
|
|
d8f823 |
@@ -136,7 +136,7 @@ static struct mlx5dr_qp *dr_create_rc_qp(struct mlx5_core_dev *mdev,
|
|
|
d8f823 |
err = mlx5_wq_qp_create(mdev, &wqp, temp_qpc, &dr_qp->wq,
|
|
|
d8f823 |
&dr_qp->wq_ctrl);
|
|
|
d8f823 |
if (err) {
|
|
|
d8f823 |
- mlx5_core_info(mdev, "Can't create QP WQ\n");
|
|
|
d8f823 |
+ mlx5_core_warn(mdev, "Can't create QP WQ\n");
|
|
|
d8f823 |
goto err_wq;
|
|
|
d8f823 |
}
|
|
|
d8f823 |
|
|
|
d8f823 |
@@ -652,8 +652,10 @@ static int dr_prepare_qp_to_rts(struct mlx5dr_domain *dmn)
|
|
|
d8f823 |
|
|
|
d8f823 |
/* Init */
|
|
|
d8f823 |
ret = dr_modify_qp_rst2init(dmn->mdev, dr_qp, port);
|
|
|
d8f823 |
- if (ret)
|
|
|
d8f823 |
+ if (ret) {
|
|
|
d8f823 |
+ mlx5dr_err(dmn, "Failed modify QP rst2init\n");
|
|
|
d8f823 |
return ret;
|
|
|
d8f823 |
+ }
|
|
|
d8f823 |
|
|
|
d8f823 |
/* RTR */
|
|
|
d8f823 |
ret = mlx5dr_cmd_query_gid(dmn->mdev, port, gid_index, &rtr_attr.dgid_attr);
|
|
|
d8f823 |
@@ -668,8 +670,10 @@ static int dr_prepare_qp_to_rts(struct mlx5dr_domain *dmn)
|
|
|
d8f823 |
rtr_attr.udp_src_port = dmn->info.caps.roce_min_src_udp;
|
|
|
d8f823 |
|
|
|
d8f823 |
ret = dr_cmd_modify_qp_init2rtr(dmn->mdev, dr_qp, &rtr_attr);
|
|
|
d8f823 |
- if (ret)
|
|
|
d8f823 |
+ if (ret) {
|
|
|
d8f823 |
+ mlx5dr_err(dmn, "Failed modify QP init2rtr\n");
|
|
|
d8f823 |
return ret;
|
|
|
d8f823 |
+ }
|
|
|
d8f823 |
|
|
|
d8f823 |
/* RTS */
|
|
|
d8f823 |
rts_attr.timeout = 14;
|
|
|
d8f823 |
@@ -677,8 +681,10 @@ static int dr_prepare_qp_to_rts(struct mlx5dr_domain *dmn)
|
|
|
d8f823 |
rts_attr.rnr_retry = 7;
|
|
|
d8f823 |
|
|
|
d8f823 |
ret = dr_cmd_modify_qp_rtr2rts(dmn->mdev, dr_qp, &rts_attr);
|
|
|
d8f823 |
- if (ret)
|
|
|
d8f823 |
+ if (ret) {
|
|
|
d8f823 |
+ mlx5dr_err(dmn, "Failed modify QP rtr2rts\n");
|
|
|
d8f823 |
return ret;
|
|
|
d8f823 |
+ }
|
|
|
d8f823 |
|
|
|
d8f823 |
return 0;
|
|
|
d8f823 |
}
|
|
|
d8f823 |
@@ -862,6 +868,7 @@ int mlx5dr_send_ring_alloc(struct mlx5dr_domain *dmn)
|
|
|
d8f823 |
cq_size = QUEUE_SIZE + 1;
|
|
|
d8f823 |
dmn->send_ring->cq = dr_create_cq(dmn->mdev, dmn->uar, cq_size);
|
|
|
d8f823 |
if (!dmn->send_ring->cq) {
|
|
|
d8f823 |
+ mlx5dr_err(dmn, "Failed creating CQ\n");
|
|
|
d8f823 |
ret = -ENOMEM;
|
|
|
d8f823 |
goto free_send_ring;
|
|
|
d8f823 |
}
|
|
|
d8f823 |
@@ -873,6 +880,7 @@ int mlx5dr_send_ring_alloc(struct mlx5dr_domain *dmn)
|
|
|
d8f823 |
|
|
|
d8f823 |
dmn->send_ring->qp = dr_create_rc_qp(dmn->mdev, &init_attr);
|
|
|
d8f823 |
if (!dmn->send_ring->qp) {
|
|
|
d8f823 |
+ mlx5dr_err(dmn, "Failed creating QP\n");
|
|
|
d8f823 |
ret = -ENOMEM;
|
|
|
d8f823 |
goto clean_cq;
|
|
|
d8f823 |
}
|
|
|
d8f823 |
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c b/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c
|
|
|
d8f823 |
index aade62a9ee5c..c0e3a1e7389d 100644
|
|
|
d8f823 |
--- a/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c
|
|
|
d8f823 |
+++ b/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c
|
|
|
d8f823 |
@@ -728,7 +728,7 @@ int mlx5dr_ste_build_pre_check(struct mlx5dr_domain *dmn,
|
|
|
d8f823 |
{
|
|
|
d8f823 |
if (!value && (match_criteria & DR_MATCHER_CRITERIA_MISC)) {
|
|
|
d8f823 |
if (mask->misc.source_port && mask->misc.source_port != 0xffff) {
|
|
|
d8f823 |
- mlx5dr_dbg(dmn, "Partial mask source_port is not supported\n");
|
|
|
d8f823 |
+ mlx5dr_err(dmn, "Partial mask source_port is not supported\n");
|
|
|
d8f823 |
return -EINVAL;
|
|
|
d8f823 |
}
|
|
|
d8f823 |
}
|
|
|
d8f823 |
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_table.c b/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_table.c
|
|
|
d8f823 |
index 14ce2d7dbb66..c2fe48d7b75a 100644
|
|
|
d8f823 |
--- a/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_table.c
|
|
|
d8f823 |
+++ b/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_table.c
|
|
|
d8f823 |
@@ -128,16 +128,20 @@ static int dr_table_init_nic(struct mlx5dr_domain *dmn,
|
|
|
d8f823 |
DR_CHUNK_SIZE_1,
|
|
|
d8f823 |
MLX5DR_STE_LU_TYPE_DONT_CARE,
|
|
|
d8f823 |
0);
|
|
|
d8f823 |
- if (!nic_tbl->s_anchor)
|
|
|
d8f823 |
+ if (!nic_tbl->s_anchor) {
|
|
|
d8f823 |
+ mlx5dr_err(dmn, "Failed allocating htbl\n");
|
|
|
d8f823 |
return -ENOMEM;
|
|
|
d8f823 |
+ }
|
|
|
d8f823 |
|
|
|
d8f823 |
info.type = CONNECT_MISS;
|
|
|
d8f823 |
info.miss_icm_addr = nic_dmn->default_icm_addr;
|
|
|
d8f823 |
ret = mlx5dr_ste_htbl_init_and_postsend(dmn, nic_dmn,
|
|
|
d8f823 |
nic_tbl->s_anchor,
|
|
|
d8f823 |
&info, true);
|
|
|
d8f823 |
- if (ret)
|
|
|
d8f823 |
+ if (ret) {
|
|
|
d8f823 |
+ mlx5dr_err(dmn, "Failed int and send htbl\n");
|
|
|
d8f823 |
goto free_s_anchor;
|
|
|
d8f823 |
+ }
|
|
|
d8f823 |
|
|
|
d8f823 |
mlx5dr_htbl_get(nic_tbl->s_anchor);
|
|
|
d8f823 |
|
|
|
d8f823 |
--
|
|
|
d8f823 |
2.13.6
|
|
|
d8f823 |
|