diff --git a/.kernel.metadata b/.kernel.metadata index c981a87..2b68fa9 100644 --- a/.kernel.metadata +++ b/.kernel.metadata @@ -1,2 +1,2 @@ ac61f2459040c09af1d5abd4ed100c3d316b443e SOURCES/linux-5.15.tar.xz -e1a7031d75bd4e3e48d363469ab0ce2a55d635cd SOURCES/patch-5.15.25.xz +20c654934c1104e8c9f908bb7fd0bfaa59e26cdc SOURCES/patch-5.15.29.xz diff --git a/SOURCES/linux-honeycomb-5.15.y.patch b/SOURCES/linux-honeycomb-5.15.y.patch index 0e7574c..0d4a341 100644 --- a/SOURCES/linux-honeycomb-5.15.y.patch +++ b/SOURCES/linux-honeycomb-5.15.y.patch @@ -1,7 +1,7 @@ From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 From: Shameer Kolothum Date: Thu, 5 Aug 2021 09:07:16 +0100 -Subject: [PATCH 01/24] iommu: Introduce a union to struct iommu_resv_region +Subject: [PATCH 01/19] iommu: Introduce a union to struct iommu_resv_region A union is introduced to struct iommu_resv_region to hold any firmware specific data. This is in preparation to add @@ -56,7 +56,7 @@ index d2f3435e7d17..d5cfd0c6a217 100644 From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 From: Shameer Kolothum Date: Thu, 5 Aug 2021 09:07:17 +0100 -Subject: [PATCH 02/24] ACPI/IORT: Add support for RMR node parsing +Subject: [PATCH 02/19] ACPI/IORT: Add support for RMR node parsing Add support for parsing RMR node information from ACPI. @@ -242,7 +242,7 @@ index f2f8f05662de..7df83d80819b 100644 From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 From: Shameer Kolothum Date: Thu, 5 Aug 2021 09:07:18 +0100 -Subject: [PATCH 03/24] iommu/dma: Introduce generic helper to retrieve RMR +Subject: [PATCH 03/19] iommu/dma: Introduce generic helper to retrieve RMR info Reserved Memory Regions(RMR) associated with an IOMMU can be @@ -342,7 +342,7 @@ index 24607dc3c2ac..7579c014e274 100644 From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 From: Shameer Kolothum Date: Thu, 5 Aug 2021 09:07:19 +0100 -Subject: [PATCH 04/24] ACPI/IORT: Add a helper to retrieve RMR memory regions +Subject: [PATCH 04/19] ACPI/IORT: Add a helper to retrieve RMR memory regions Add a helper function (iort_iommu_get_rmrs()) that retrieves RMR memory descriptors associated with a given IOMMU. This will be used @@ -467,7 +467,7 @@ index f1f0842a2cb2..d8c030c103f5 100644 From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 From: Shameer Kolothum Date: Thu, 5 Aug 2021 09:07:20 +0100 -Subject: [PATCH 05/24] iommu/arm-smmu-v3: Introduce strtab init helper +Subject: [PATCH 05/19] iommu/arm-smmu-v3: Introduce strtab init helper Introduce a helper to check the sid range and to init the l2 strtab entries(bypass). This will be useful when we have to initialize the @@ -532,7 +532,7 @@ index a388e318f86e..23acac6d89c7 100644 From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 From: Shameer Kolothum Date: Thu, 5 Aug 2021 09:07:21 +0100 -Subject: [PATCH 06/24] =?UTF-8?q?iommu/arm-smmu-v3:=20Refactor=C2=A0arm=5F?= +Subject: [PATCH 06/19] =?UTF-8?q?iommu/arm-smmu-v3:=20Refactor=C2=A0arm=5F?= =?UTF-8?q?smmu=5Finit=5Fbypass=5Fstes()=20to=20force=20bypass?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 @@ -606,7 +606,7 @@ index 23acac6d89c7..12b5c9677df8 100644 From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 From: Shameer Kolothum Date: Thu, 5 Aug 2021 09:07:22 +0100 -Subject: [PATCH 07/24] iommu/arm-smmu-v3: Get associated RMR info and install +Subject: [PATCH 07/19] iommu/arm-smmu-v3: Get associated RMR info and install bypass STE MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 @@ -678,7 +678,7 @@ index 12b5c9677df8..22fa2900ad44 100644 From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 From: Jon Nettleton Date: Thu, 5 Aug 2021 09:07:23 +0100 -Subject: [PATCH 08/24] iommu/arm-smmu: Get associated RMR info and install +Subject: [PATCH 08/19] iommu/arm-smmu: Get associated RMR info and install bypass SMR Check if there is any RMR info associated with the devices behind @@ -766,7 +766,7 @@ index 4bc75c4ce402..6c6b0b97756a 100644 From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 From: Shameer Kolothum Date: Thu, 5 Aug 2021 09:07:24 +0100 -Subject: [PATCH 09/24] iommu/dma: Reserve any RMR regions associated with a +Subject: [PATCH 09/19] iommu/dma: Reserve any RMR regions associated with a dev Get ACPI IORT RMR regions associated with a dev reserved @@ -862,7 +862,7 @@ index 9e27978ce111..7164acaafcbd 100644 From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 From: Shameer Kolothum Date: Fri, 17 Sep 2021 12:07:26 +0100 -Subject: [PATCH 10/24] iommu/dma: Update RMR mem attributes +Subject: [PATCH 10/19] iommu/dma: Update RMR mem attributes Since we dont have enough information from the IORT spec, make use of ACPI table and EFI memory map to set the RMR @@ -980,18 +980,18 @@ index d8c030c103f5..f0a3882c26d4 100644 From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 From: Makarand Pawagi Date: Tue, 21 Apr 2020 11:25:53 +0530 -Subject: [PATCH 11/24] soc: fsl: enable acpi support for Guts driver +Subject: [PATCH 11/19] soc: fsl: enable acpi support for Guts driver ACPI support is added in the Guts driver This is in accordance with the DSDT table added for Guts Signed-off-by: Makarand Pawagi --- - drivers/soc/fsl/guts.c | 27 ++++++++++++++++++++++----- - 1 file changed, 22 insertions(+), 5 deletions(-) + drivers/soc/fsl/guts.c | 27 +++++++++++++++++++++------ + 1 file changed, 21 insertions(+), 6 deletions(-) diff --git a/drivers/soc/fsl/guts.c b/drivers/soc/fsl/guts.c -index d5e9a5f2c087..4353efd07d02 100644 +index 75eabfb916cb..b080721eace7 100644 --- a/drivers/soc/fsl/guts.c +++ b/drivers/soc/fsl/guts.c @@ -3,6 +3,7 @@ @@ -1002,16 +1002,7 @@ index d5e9a5f2c087..4353efd07d02 100644 */ #include -@@ -138,7 +139,7 @@ static u32 fsl_guts_get_svr(void) - - static int fsl_guts_probe(struct platform_device *pdev) - { -- struct device_node *np = pdev->dev.of_node; -+ struct device_node *root; - struct device *dev = &pdev->dev; - struct resource *res; - const struct fsl_soc_die_attr *soc_die; -@@ -150,7 +151,8 @@ static int fsl_guts_probe(struct platform_device *pdev) +@@ -149,7 +150,8 @@ static int fsl_guts_probe(struct platform_device *pdev) if (!guts) return -ENOMEM; @@ -1021,7 +1012,7 @@ index d5e9a5f2c087..4353efd07d02 100644 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); guts->regs = devm_ioremap_resource(dev, res); -@@ -158,9 +160,17 @@ static int fsl_guts_probe(struct platform_device *pdev) +@@ -157,17 +159,23 @@ static int fsl_guts_probe(struct platform_device *pdev) return PTR_ERR(guts->regs); /* Register soc device */ @@ -1039,10 +1030,18 @@ index d5e9a5f2c087..4353efd07d02 100644 + "model", &machine); + } + - if (machine) - soc_dev_attr.machine = machine; + if (machine) { + soc_dev_attr.machine = devm_kstrdup(dev, machine, GFP_KERNEL); + if (!soc_dev_attr.machine) { +- of_node_put(root); + return -ENOMEM; + } + } +- of_node_put(root); -@@ -234,10 +244,17 @@ static const struct of_device_id fsl_guts_of_match[] = { + svr = fsl_guts_get_svr(); + soc_die = fsl_soc_die_match(svr, fsl_soc_die); +@@ -238,10 +246,17 @@ static const struct of_device_id fsl_guts_of_match[] = { }; MODULE_DEVICE_TABLE(of, fsl_guts_of_match); @@ -1067,7 +1066,7 @@ index d5e9a5f2c087..4353efd07d02 100644 From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 From: Meenakshi Aggarwal Date: Wed, 27 May 2020 21:35:11 +0530 -Subject: [PATCH 12/24] mmc: sdhci-of-esdhc: Add ACPI support +Subject: [PATCH 12/19] mmc: sdhci-of-esdhc: Add ACPI support This patch is to add acpi support in esdhc controller driver @@ -1185,7 +1184,7 @@ index 0f3658b36513..c11544f6047b 100644 From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 From: Meharbaan Date: Tue, 28 Jul 2020 17:41:31 +0530 -Subject: [PATCH 13/24] drivers/mmc/host/sdhci-of-esdhc : Fix DMA coherent +Subject: [PATCH 13/19] drivers/mmc/host/sdhci-of-esdhc : Fix DMA coherent check in ACPI mode. DMA-coherent check to set ESDHC_DMA_SNOOP mask was bypassed @@ -1294,7 +1293,7 @@ index 357513a977e5..a9009883ab9e 100644 From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 From: Jon Nettleton Date: Fri, 2 Jul 2021 07:28:21 -0400 -Subject: [PATCH 14/24] ACPI: APD: Allow apd device to override fixed_clk_rate +Subject: [PATCH 14/19] ACPI: APD: Allow apd device to override fixed_clk_rate Currently by default the apd drivers are always using the fixed_clk_rate assigned in the matched acpi_device_desc. @@ -1352,7 +1351,7 @@ index 6e02448d15d9..f79757c34a77 100644 From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 From: Russell King Date: Tue, 24 Dec 2019 14:46:48 +0000 -Subject: [PATCH 15/24] bus: fsl-mc: fix dprc object reading race +Subject: [PATCH 15/19] bus: fsl-mc: fix dprc object reading race When modifying the objects attached to a DPRC, we may end up reading the list of objects from the firmware while another thread is changing @@ -1468,7 +1467,7 @@ index 315e830b6ecd..2268869bf6ab 100644 From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 From: Russell King Date: Fri, 24 Jan 2020 17:59:49 +0000 -Subject: [PATCH 16/24] iommu: silence iommu group prints +Subject: [PATCH 16/19] iommu: silence iommu group prints On the LX2160A, there are lots (about 160) of IOMMU messages produced during boot; this is excessive. Reduce the severity of these messages @@ -1506,1206 +1505,9 @@ index 7f409e9eea4b..2dc9592ff309 100644 From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 -From: Jon Nettleton -Date: Thu, 7 Oct 2021 03:11:29 -0400 -Subject: [PATCH 17/24] arm64: Alter memcpy and memmove for better ACE compat - -Signed-off-by: Jon Nettleton ---- - arch/arm64/lib/memcpy.S | 10 +++++----- - 1 file changed, 5 insertions(+), 5 deletions(-) - -diff --git a/arch/arm64/lib/memcpy.S b/arch/arm64/lib/memcpy.S -index b82fd64ee1e1..4aa907895e45 100644 ---- a/arch/arm64/lib/memcpy.S -+++ b/arch/arm64/lib/memcpy.S -@@ -136,12 +136,12 @@ L(copy128): - stp G_l, G_h, [dstend, -64] - stp H_l, H_h, [dstend, -48] - L(copy96): -+ stp C_l, C_h, [dstend, -32] -+ stp D_l, D_h, [dstend, -16] - stp A_l, A_h, [dstin] - stp B_l, B_h, [dstin, 16] - stp E_l, E_h, [dstin, 32] - stp F_l, F_h, [dstin, 48] -- stp C_l, C_h, [dstend, -32] -- stp D_l, D_h, [dstend, -16] - ret - - .p2align 4 -@@ -236,10 +236,10 @@ L(copy64_from_start): - stp C_l, C_h, [dstend, -48] - ldp C_l, C_h, [src] - stp D_l, D_h, [dstend, -64] -- stp G_l, G_h, [dstin, 48] -- stp A_l, A_h, [dstin, 32] -- stp B_l, B_h, [dstin, 16] - stp C_l, C_h, [dstin] -+ stp B_l, B_h, [dstin, 16] -+ stp A_l, A_h, [dstin, 32] -+ stp G_l, G_h, [dstin, 48] - ret - - SYM_FUNC_END_PI(memcpy) --- -2.18.4 - - -From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 -From: Jonathan Cameron -Date: Fri, 24 Sep 2021 20:51:02 +1200 -Subject: [PATCH 18/24] topology: Represent clusters of CPUs within a die - -Both ACPI and DT provide the ability to describe additional layers of -topology between that of individual cores and higher level constructs -such as the level at which the last level cache is shared. -In ACPI this can be represented in PPTT as a Processor Hierarchy -Node Structure [1] that is the parent of the CPU cores and in turn -has a parent Processor Hierarchy Nodes Structure representing -a higher level of topology. - -For example Kunpeng 920 has 6 or 8 clusters in each NUMA node, and each -cluster has 4 cpus. All clusters share L3 cache data, but each cluster -has local L3 tag. On the other hand, each clusters will share some -internal system bus. - -+-----------------------------------+ +---------+ -| +------+ +------+ +--------------------------+ | -| | CPU0 | | cpu1 | | +-----------+ | | -| +------+ +------+ | | | | | -| +----+ L3 | | | -| +------+ +------+ cluster | | tag | | | -| | CPU2 | | CPU3 | | | | | | -| +------+ +------+ | +-----------+ | | -| | | | -+-----------------------------------+ | | -+-----------------------------------+ | | -| +------+ +------+ +--------------------------+ | -| | | | | | +-----------+ | | -| +------+ +------+ | | | | | -| | | L3 | | | -| +------+ +------+ +----+ tag | | | -| | | | | | | | | | -| +------+ +------+ | +-----------+ | | -| | | | -+-----------------------------------+ | L3 | - | data | -+-----------------------------------+ | | -| +------+ +------+ | +-----------+ | | -| | | | | | | | | | -| +------+ +------+ +----+ L3 | | | -| | | tag | | | -| +------+ +------+ | | | | | -| | | | | | +-----------+ | | -| +------+ +------+ +--------------------------+ | -+-----------------------------------| | | -+-----------------------------------| | | -| +------+ +------+ +--------------------------+ | -| | | | | | +-----------+ | | -| +------+ +------+ | | | | | -| +----+ L3 | | | -| +------+ +------+ | | tag | | | -| | | | | | | | | | -| +------+ +------+ | +-----------+ | | -| | | | -+-----------------------------------+ | | -+-----------------------------------+ | | -| +------+ +------+ +--------------------------+ | -| | | | | | +-----------+ | | -| +------+ +------+ | | | | | -| | | L3 | | | -| +------+ +------+ +---+ tag | | | -| | | | | | | | | | -| +------+ +------+ | +-----------+ | | -| | | | -+-----------------------------------+ | | -+-----------------------------------+ | | -| +------+ +------+ +--------------------------+ | -| | | | | | +-----------+ | | -| +------+ +------+ | | | | | -| | | L3 | | | -| +------+ +------+ +--+ tag | | | -| | | | | | | | | | -| +------+ +------+ | +-----------+ | | -| | +---------+ -+-----------------------------------+ - -That means spreading tasks among clusters will bring more bandwidth -while packing tasks within one cluster will lead to smaller cache -synchronization latency. So both kernel and userspace will have -a chance to leverage this topology to deploy tasks accordingly to -achieve either smaller cache latency within one cluster or an even -distribution of load among clusters for higher throughput. - -This patch exposes cluster topology to both kernel and userspace. -Libraried like hwloc will know cluster by cluster_cpus and related -sysfs attributes. PoC of HWLOC support at [2]. - -Note this patch only handle the ACPI case. - -Special consideration is needed for SMT processors, where it is -necessary to move 2 levels up the hierarchy from the leaf nodes -(thus skipping the processor core level). - -Note that arm64 / ACPI does not provide any means of identifying -a die level in the topology but that may be unrelate to the cluster -level. - -[1] ACPI Specification 6.3 - section 5.2.29.1 processor hierarchy node - structure (Type 0) -[2] https://github.com/hisilicon/hwloc/tree/linux-cluster - -Signed-off-by: Jonathan Cameron -Signed-off-by: Tian Tao -Signed-off-by: Barry Song -Signed-off-by: Peter Zijlstra (Intel) -Link: https://lore.kernel.org/r/20210924085104.44806-2-21cnbao@gmail.com ---- - .../ABI/stable/sysfs-devices-system-cpu | 15 +++++ - Documentation/admin-guide/cputopology.rst | 12 ++-- - arch/arm64/kernel/topology.c | 2 + - drivers/acpi/pptt.c | 67 +++++++++++++++++++ - drivers/base/arch_topology.c | 15 +++++ - drivers/base/topology.c | 10 +++ - include/linux/acpi.h | 5 ++ - include/linux/arch_topology.h | 5 ++ - include/linux/topology.h | 6 ++ - 9 files changed, 133 insertions(+), 4 deletions(-) - -diff --git a/Documentation/ABI/stable/sysfs-devices-system-cpu b/Documentation/ABI/stable/sysfs-devices-system-cpu -index 516dafea03eb..3965ce504484 100644 ---- a/Documentation/ABI/stable/sysfs-devices-system-cpu -+++ b/Documentation/ABI/stable/sysfs-devices-system-cpu -@@ -42,6 +42,12 @@ Description: the CPU core ID of cpuX. Typically it is the hardware platform's - architecture and platform dependent. - Values: integer - -+What: /sys/devices/system/cpu/cpuX/topology/cluster_id -+Description: the cluster ID of cpuX. Typically it is the hardware platform's -+ identifier (rather than the kernel's). The actual value is -+ architecture and platform dependent. -+Values: integer -+ - What: /sys/devices/system/cpu/cpuX/topology/book_id - Description: the book ID of cpuX. Typically it is the hardware platform's - identifier (rather than the kernel's). The actual value is -@@ -85,6 +91,15 @@ Description: human-readable list of CPUs within the same die. - The format is like 0-3, 8-11, 14,17. - Values: decimal list. - -+What: /sys/devices/system/cpu/cpuX/topology/cluster_cpus -+Description: internal kernel map of CPUs within the same cluster. -+Values: hexadecimal bitmask. -+ -+What: /sys/devices/system/cpu/cpuX/topology/cluster_cpus_list -+Description: human-readable list of CPUs within the same cluster. -+ The format is like 0-3, 8-11, 14,17. -+Values: decimal list. -+ - What: /sys/devices/system/cpu/cpuX/topology/book_siblings - Description: internal kernel map of cpuX's hardware threads within the same - book_id. it's only used on s390. -diff --git a/Documentation/admin-guide/cputopology.rst b/Documentation/admin-guide/cputopology.rst -index b085dbac60a5..6b62e182baf4 100644 ---- a/Documentation/admin-guide/cputopology.rst -+++ b/Documentation/admin-guide/cputopology.rst -@@ -19,11 +19,13 @@ these macros in include/asm-XXX/topology.h:: - - #define topology_physical_package_id(cpu) - #define topology_die_id(cpu) -+ #define topology_cluster_id(cpu) - #define topology_core_id(cpu) - #define topology_book_id(cpu) - #define topology_drawer_id(cpu) - #define topology_sibling_cpumask(cpu) - #define topology_core_cpumask(cpu) -+ #define topology_cluster_cpumask(cpu) - #define topology_die_cpumask(cpu) - #define topology_book_cpumask(cpu) - #define topology_drawer_cpumask(cpu) -@@ -39,10 +41,12 @@ not defined by include/asm-XXX/topology.h: - - 1) topology_physical_package_id: -1 - 2) topology_die_id: -1 --3) topology_core_id: 0 --4) topology_sibling_cpumask: just the given CPU --5) topology_core_cpumask: just the given CPU --6) topology_die_cpumask: just the given CPU -+3) topology_cluster_id: -1 -+4) topology_core_id: 0 -+5) topology_sibling_cpumask: just the given CPU -+6) topology_core_cpumask: just the given CPU -+7) topology_cluster_cpumask: just the given CPU -+8) topology_die_cpumask: just the given CPU - - For architectures that don't support books (CONFIG_SCHED_BOOK) there are no - default definitions for topology_book_id() and topology_book_cpumask(). -diff --git a/arch/arm64/kernel/topology.c b/arch/arm64/kernel/topology.c -index 4dd14a6620c1..9ab78ad826e2 100644 ---- a/arch/arm64/kernel/topology.c -+++ b/arch/arm64/kernel/topology.c -@@ -103,6 +103,8 @@ int __init parse_acpi_topology(void) - cpu_topology[cpu].thread_id = -1; - cpu_topology[cpu].core_id = topology_id; - } -+ topology_id = find_acpi_cpu_topology_cluster(cpu); -+ cpu_topology[cpu].cluster_id = topology_id; - topology_id = find_acpi_cpu_topology_package(cpu); - cpu_topology[cpu].package_id = topology_id; - -diff --git a/drivers/acpi/pptt.c b/drivers/acpi/pptt.c -index fe69dc518f31..701f61c01359 100644 ---- a/drivers/acpi/pptt.c -+++ b/drivers/acpi/pptt.c -@@ -746,6 +746,73 @@ int find_acpi_cpu_topology_package(unsigned int cpu) - ACPI_PPTT_PHYSICAL_PACKAGE); - } - -+/** -+ * find_acpi_cpu_topology_cluster() - Determine a unique CPU cluster value -+ * @cpu: Kernel logical CPU number -+ * -+ * Determine a topology unique cluster ID for the given CPU/thread. -+ * This ID can then be used to group peers, which will have matching ids. -+ * -+ * The cluster, if present is the level of topology above CPUs. In a -+ * multi-thread CPU, it will be the level above the CPU, not the thread. -+ * It may not exist in single CPU systems. In simple multi-CPU systems, -+ * it may be equal to the package topology level. -+ * -+ * Return: -ENOENT if the PPTT doesn't exist, the CPU cannot be found -+ * or there is no toplogy level above the CPU.. -+ * Otherwise returns a value which represents the package for this CPU. -+ */ -+ -+int find_acpi_cpu_topology_cluster(unsigned int cpu) -+{ -+ struct acpi_table_header *table; -+ acpi_status status; -+ struct acpi_pptt_processor *cpu_node, *cluster_node; -+ u32 acpi_cpu_id; -+ int retval; -+ int is_thread; -+ -+ status = acpi_get_table(ACPI_SIG_PPTT, 0, &table); -+ if (ACPI_FAILURE(status)) { -+ acpi_pptt_warn_missing(); -+ return -ENOENT; -+ } -+ -+ acpi_cpu_id = get_acpi_id_for_cpu(cpu); -+ cpu_node = acpi_find_processor_node(table, acpi_cpu_id); -+ if (cpu_node == NULL || !cpu_node->parent) { -+ retval = -ENOENT; -+ goto put_table; -+ } -+ -+ is_thread = cpu_node->flags & ACPI_PPTT_ACPI_PROCESSOR_IS_THREAD; -+ cluster_node = fetch_pptt_node(table, cpu_node->parent); -+ if (cluster_node == NULL) { -+ retval = -ENOENT; -+ goto put_table; -+ } -+ if (is_thread) { -+ if (!cluster_node->parent) { -+ retval = -ENOENT; -+ goto put_table; -+ } -+ cluster_node = fetch_pptt_node(table, cluster_node->parent); -+ if (cluster_node == NULL) { -+ retval = -ENOENT; -+ goto put_table; -+ } -+ } -+ if (cluster_node->flags & ACPI_PPTT_ACPI_PROCESSOR_ID_VALID) -+ retval = cluster_node->acpi_processor_id; -+ else -+ retval = ACPI_PTR_DIFF(cluster_node, table); -+ -+put_table: -+ acpi_put_table(table); -+ -+ return retval; -+} -+ - /** - * find_acpi_cpu_topology_hetero_id() - Get a core architecture tag - * @cpu: Kernel logical CPU number -diff --git a/drivers/base/arch_topology.c b/drivers/base/arch_topology.c -index 43407665918f..fc0836f460fb 100644 ---- a/drivers/base/arch_topology.c -+++ b/drivers/base/arch_topology.c -@@ -600,6 +600,11 @@ const struct cpumask *cpu_coregroup_mask(int cpu) - return core_mask; - } - -+const struct cpumask *cpu_clustergroup_mask(int cpu) -+{ -+ return &cpu_topology[cpu].cluster_sibling; -+} -+ - void update_siblings_masks(unsigned int cpuid) - { - struct cpu_topology *cpu_topo, *cpuid_topo = &cpu_topology[cpuid]; -@@ -617,6 +622,12 @@ void update_siblings_masks(unsigned int cpuid) - if (cpuid_topo->package_id != cpu_topo->package_id) - continue; - -+ if (cpuid_topo->cluster_id == cpu_topo->cluster_id && -+ cpuid_topo->cluster_id != -1) { -+ cpumask_set_cpu(cpu, &cpuid_topo->cluster_sibling); -+ cpumask_set_cpu(cpuid, &cpu_topo->cluster_sibling); -+ } -+ - cpumask_set_cpu(cpuid, &cpu_topo->core_sibling); - cpumask_set_cpu(cpu, &cpuid_topo->core_sibling); - -@@ -635,6 +646,9 @@ static void clear_cpu_topology(int cpu) - cpumask_clear(&cpu_topo->llc_sibling); - cpumask_set_cpu(cpu, &cpu_topo->llc_sibling); - -+ cpumask_clear(&cpu_topo->cluster_sibling); -+ cpumask_set_cpu(cpu, &cpu_topo->cluster_sibling); -+ - cpumask_clear(&cpu_topo->core_sibling); - cpumask_set_cpu(cpu, &cpu_topo->core_sibling); - cpumask_clear(&cpu_topo->thread_sibling); -@@ -650,6 +664,7 @@ void __init reset_cpu_topology(void) - - cpu_topo->thread_id = -1; - cpu_topo->core_id = -1; -+ cpu_topo->cluster_id = -1; - cpu_topo->package_id = -1; - cpu_topo->llc_id = -1; - -diff --git a/drivers/base/topology.c b/drivers/base/topology.c -index 43c0940643f5..8f2b641d0b8c 100644 ---- a/drivers/base/topology.c -+++ b/drivers/base/topology.c -@@ -48,6 +48,9 @@ static DEVICE_ATTR_RO(physical_package_id); - define_id_show_func(die_id); - static DEVICE_ATTR_RO(die_id); - -+define_id_show_func(cluster_id); -+static DEVICE_ATTR_RO(cluster_id); -+ - define_id_show_func(core_id); - static DEVICE_ATTR_RO(core_id); - -@@ -63,6 +66,10 @@ define_siblings_read_func(core_siblings, core_cpumask); - static BIN_ATTR_RO(core_siblings, 0); - static BIN_ATTR_RO(core_siblings_list, 0); - -+define_siblings_read_func(cluster_cpus, cluster_cpumask); -+static BIN_ATTR_RO(cluster_cpus, 0); -+static BIN_ATTR_RO(cluster_cpus_list, 0); -+ - define_siblings_read_func(die_cpus, die_cpumask); - static BIN_ATTR_RO(die_cpus, 0); - static BIN_ATTR_RO(die_cpus_list, 0); -@@ -94,6 +101,8 @@ static struct bin_attribute *bin_attrs[] = { - &bin_attr_thread_siblings_list, - &bin_attr_core_siblings, - &bin_attr_core_siblings_list, -+ &bin_attr_cluster_cpus, -+ &bin_attr_cluster_cpus_list, - &bin_attr_die_cpus, - &bin_attr_die_cpus_list, - &bin_attr_package_cpus, -@@ -112,6 +121,7 @@ static struct bin_attribute *bin_attrs[] = { - static struct attribute *default_attrs[] = { - &dev_attr_physical_package_id.attr, - &dev_attr_die_id.attr, -+ &dev_attr_cluster_id.attr, - &dev_attr_core_id.attr, - #ifdef CONFIG_SCHED_BOOK - &dev_attr_book_id.attr, -diff --git a/include/linux/acpi.h b/include/linux/acpi.h -index 6224b1e32681..878a62266304 100644 ---- a/include/linux/acpi.h -+++ b/include/linux/acpi.h -@@ -1362,6 +1362,7 @@ static inline int lpit_read_residency_count_address(u64 *address) - #ifdef CONFIG_ACPI_PPTT - int acpi_pptt_cpu_is_thread(unsigned int cpu); - int find_acpi_cpu_topology(unsigned int cpu, int level); -+int find_acpi_cpu_topology_cluster(unsigned int cpu); - int find_acpi_cpu_topology_package(unsigned int cpu); - int find_acpi_cpu_topology_hetero_id(unsigned int cpu); - int find_acpi_cpu_cache_topology(unsigned int cpu, int level); -@@ -1374,6 +1375,10 @@ static inline int find_acpi_cpu_topology(unsigned int cpu, int level) - { - return -EINVAL; - } -+static inline int find_acpi_cpu_topology_cluster(unsigned int cpu) -+{ -+ return -EINVAL; -+} - static inline int find_acpi_cpu_topology_package(unsigned int cpu) - { - return -EINVAL; -diff --git a/include/linux/arch_topology.h b/include/linux/arch_topology.h -index f180240dc95f..b97cea83b25e 100644 ---- a/include/linux/arch_topology.h -+++ b/include/linux/arch_topology.h -@@ -62,10 +62,12 @@ void topology_set_thermal_pressure(const struct cpumask *cpus, - struct cpu_topology { - int thread_id; - int core_id; -+ int cluster_id; - int package_id; - int llc_id; - cpumask_t thread_sibling; - cpumask_t core_sibling; -+ cpumask_t cluster_sibling; - cpumask_t llc_sibling; - }; - -@@ -73,13 +75,16 @@ struct cpu_topology { - extern struct cpu_topology cpu_topology[NR_CPUS]; - - #define topology_physical_package_id(cpu) (cpu_topology[cpu].package_id) -+#define topology_cluster_id(cpu) (cpu_topology[cpu].cluster_id) - #define topology_core_id(cpu) (cpu_topology[cpu].core_id) - #define topology_core_cpumask(cpu) (&cpu_topology[cpu].core_sibling) - #define topology_sibling_cpumask(cpu) (&cpu_topology[cpu].thread_sibling) -+#define topology_cluster_cpumask(cpu) (&cpu_topology[cpu].cluster_sibling) - #define topology_llc_cpumask(cpu) (&cpu_topology[cpu].llc_sibling) - void init_cpu_topology(void); - void store_cpu_topology(unsigned int cpuid); - const struct cpumask *cpu_coregroup_mask(int cpu); -+const struct cpumask *cpu_clustergroup_mask(int cpu); - void update_siblings_masks(unsigned int cpu); - void remove_cpu_topology(unsigned int cpuid); - void reset_cpu_topology(void); -diff --git a/include/linux/topology.h b/include/linux/topology.h -index 7634cd737061..80d27d717631 100644 ---- a/include/linux/topology.h -+++ b/include/linux/topology.h -@@ -186,6 +186,9 @@ static inline int cpu_to_mem(int cpu) - #ifndef topology_die_id - #define topology_die_id(cpu) ((void)(cpu), -1) - #endif -+#ifndef topology_cluster_id -+#define topology_cluster_id(cpu) ((void)(cpu), -1) -+#endif - #ifndef topology_core_id - #define topology_core_id(cpu) ((void)(cpu), 0) - #endif -@@ -195,6 +198,9 @@ static inline int cpu_to_mem(int cpu) - #ifndef topology_core_cpumask - #define topology_core_cpumask(cpu) cpumask_of(cpu) - #endif -+#ifndef topology_cluster_cpumask -+#define topology_cluster_cpumask(cpu) cpumask_of(cpu) -+#endif - #ifndef topology_die_cpumask - #define topology_die_cpumask(cpu) cpumask_of(cpu) - #endif --- -2.18.4 - - -From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 -From: Barry Song -Date: Fri, 24 Sep 2021 20:51:03 +1200 -Subject: [PATCH 19/24] sched: Add cluster scheduler level in core and related - Kconfig for ARM64 - -This patch adds scheduler level for clusters and automatically enables -the load balance among clusters. It will directly benefit a lot of -workload which loves more resources such as memory bandwidth, caches. - -Testing has widely been done in two different hardware configurations of -Kunpeng920: - - 24 cores in one NUMA(6 clusters in each NUMA node); - 32 cores in one NUMA(8 clusters in each NUMA node) - -Workload is running on either one NUMA node or four NUMA nodes, thus, -this can estimate the effect of cluster spreading w/ and w/o NUMA load -balance. - -* Stream benchmark: - -4threads stream (on 1NUMA * 24cores = 24cores) - stream stream - w/o patch w/ patch -MB/sec copy 29929.64 ( 0.00%) 32932.68 ( 10.03%) -MB/sec scale 29861.10 ( 0.00%) 32710.58 ( 9.54%) -MB/sec add 27034.42 ( 0.00%) 32400.68 ( 19.85%) -MB/sec triad 27225.26 ( 0.00%) 31965.36 ( 17.41%) - -6threads stream (on 1NUMA * 24cores = 24cores) - stream stream - w/o patch w/ patch -MB/sec copy 40330.24 ( 0.00%) 42377.68 ( 5.08%) -MB/sec scale 40196.42 ( 0.00%) 42197.90 ( 4.98%) -MB/sec add 37427.00 ( 0.00%) 41960.78 ( 12.11%) -MB/sec triad 37841.36 ( 0.00%) 42513.64 ( 12.35%) - -12threads stream (on 1NUMA * 24cores = 24cores) - stream stream - w/o patch w/ patch -MB/sec copy 52639.82 ( 0.00%) 53818.04 ( 2.24%) -MB/sec scale 52350.30 ( 0.00%) 53253.38 ( 1.73%) -MB/sec add 53607.68 ( 0.00%) 55198.82 ( 2.97%) -MB/sec triad 54776.66 ( 0.00%) 56360.40 ( 2.89%) - -Thus, it could help memory-bound workload especially under medium load. -Similar improvement is also seen in lkp-pbzip2: - -* lkp-pbzip2 benchmark - -2-96 threads (on 4NUMA * 24cores = 96cores) - lkp-pbzip2 lkp-pbzip2 - w/o patch w/ patch -Hmean tput-2 11062841.57 ( 0.00%) 11341817.51 * 2.52%* -Hmean tput-5 26815503.70 ( 0.00%) 27412872.65 * 2.23%* -Hmean tput-8 41873782.21 ( 0.00%) 43326212.92 * 3.47%* -Hmean tput-12 61875980.48 ( 0.00%) 64578337.51 * 4.37%* -Hmean tput-21 105814963.07 ( 0.00%) 111381851.01 * 5.26%* -Hmean tput-30 150349470.98 ( 0.00%) 156507070.73 * 4.10%* -Hmean tput-48 237195937.69 ( 0.00%) 242353597.17 * 2.17%* -Hmean tput-79 360252509.37 ( 0.00%) 362635169.23 * 0.66%* -Hmean tput-96 394571737.90 ( 0.00%) 400952978.48 * 1.62%* - -2-24 threads (on 1NUMA * 24cores = 24cores) - lkp-pbzip2 lkp-pbzip2 - w/o patch w/ patch -Hmean tput-2 11071705.49 ( 0.00%) 11296869.10 * 2.03%* -Hmean tput-4 20782165.19 ( 0.00%) 21949232.15 * 5.62%* -Hmean tput-6 30489565.14 ( 0.00%) 33023026.96 * 8.31%* -Hmean tput-8 40376495.80 ( 0.00%) 42779286.27 * 5.95%* -Hmean tput-12 61264033.85 ( 0.00%) 62995632.78 * 2.83%* -Hmean tput-18 86697139.39 ( 0.00%) 86461545.74 ( -0.27%) -Hmean tput-24 104854637.04 ( 0.00%) 104522649.46 * -0.32%* - -In the case of 6 threads and 8 threads, we see the greatest performance -improvement. - -Similar improvement can be seen on lkp-pixz though the improvement is -smaller: - -* lkp-pixz benchmark - -2-24 threads lkp-pixz (on 1NUMA * 24cores = 24cores) - lkp-pixz lkp-pixz - w/o patch w/ patch -Hmean tput-2 6486981.16 ( 0.00%) 6561515.98 * 1.15%* -Hmean tput-4 11645766.38 ( 0.00%) 11614628.43 ( -0.27%) -Hmean tput-6 15429943.96 ( 0.00%) 15957350.76 * 3.42%* -Hmean tput-8 19974087.63 ( 0.00%) 20413746.98 * 2.20%* -Hmean tput-12 28172068.18 ( 0.00%) 28751997.06 * 2.06%* -Hmean tput-18 39413409.54 ( 0.00%) 39896830.55 * 1.23%* -Hmean tput-24 49101815.85 ( 0.00%) 49418141.47 * 0.64%* - -* SPECrate benchmark - -4,8,16 copies mcf_r(on 1NUMA * 32cores = 32cores) - Base Base - Run Time Rate - ------- --------- -4 Copies w/o 580 (w/ 570) w/o 11.1 (w/ 11.3) -8 Copies w/o 647 (w/ 605) w/o 20.0 (w/ 21.4, +7%) -16 Copies w/o 844 (w/ 844) w/o 30.6 (w/ 30.6) - -32 Copies(on 4NUMA * 32 cores = 128cores) -[w/o patch] - Base Base Base -Benchmarks Copies Run Time Rate ---------------- ------- --------- --------- -500.perlbench_r 32 584 87.2 * -502.gcc_r 32 503 90.2 * -505.mcf_r 32 745 69.4 * -520.omnetpp_r 32 1031 40.7 * -523.xalancbmk_r 32 597 56.6 * -525.x264_r 1 -- CE -531.deepsjeng_r 32 336 109 * -541.leela_r 32 556 95.4 * -548.exchange2_r 32 513 163 * -557.xz_r 32 530 65.2 * - Est. SPECrate2017_int_base 80.3 - -[w/ patch] - Base Base Base -Benchmarks Copies Run Time Rate ---------------- ------- --------- --------- -500.perlbench_r 32 580 87.8 (+0.688%) * -502.gcc_r 32 477 95.1 (+5.432%) * -505.mcf_r 32 644 80.3 (+13.574%) * -520.omnetpp_r 32 942 44.6 (+9.58%) * -523.xalancbmk_r 32 560 60.4 (+6.714%%) * -525.x264_r 1 -- CE -531.deepsjeng_r 32 337 109 (+0.000%) * -541.leela_r 32 554 95.6 (+0.210%) * -548.exchange2_r 32 515 163 (+0.000%) * -557.xz_r 32 524 66.0 (+1.227%) * - Est. SPECrate2017_int_base 83.7 (+4.062%) - -On the other hand, it is slightly helpful to CPU-bound tasks like -kernbench: - -* 24-96 threads kernbench (on 4NUMA * 24cores = 96cores) - kernbench kernbench - w/o cluster w/ cluster -Min user-24 12054.67 ( 0.00%) 12024.19 ( 0.25%) -Min syst-24 1751.51 ( 0.00%) 1731.68 ( 1.13%) -Min elsp-24 600.46 ( 0.00%) 598.64 ( 0.30%) -Min user-48 12361.93 ( 0.00%) 12315.32 ( 0.38%) -Min syst-48 1917.66 ( 0.00%) 1892.73 ( 1.30%) -Min elsp-48 333.96 ( 0.00%) 332.57 ( 0.42%) -Min user-96 12922.40 ( 0.00%) 12921.17 ( 0.01%) -Min syst-96 2143.94 ( 0.00%) 2110.39 ( 1.56%) -Min elsp-96 211.22 ( 0.00%) 210.47 ( 0.36%) -Amean user-24 12063.99 ( 0.00%) 12030.78 * 0.28%* -Amean syst-24 1755.20 ( 0.00%) 1735.53 * 1.12%* -Amean elsp-24 601.60 ( 0.00%) 600.19 ( 0.23%) -Amean user-48 12362.62 ( 0.00%) 12315.56 * 0.38%* -Amean syst-48 1921.59 ( 0.00%) 1894.95 * 1.39%* -Amean elsp-48 334.10 ( 0.00%) 332.82 * 0.38%* -Amean user-96 12925.27 ( 0.00%) 12922.63 ( 0.02%) -Amean syst-96 2146.66 ( 0.00%) 2122.20 * 1.14%* -Amean elsp-96 211.96 ( 0.00%) 211.79 ( 0.08%) - -Note this patch isn't an universal win, it might hurt those workload -which can benefit from packing. Though tasks which want to take -advantages of lower communication latency of one cluster won't -necessarily been packed in one cluster while kernel is not aware of -clusters, they have some chance to be randomly packed. But this -patch will make them more likely spread. - -Signed-off-by: Barry Song -Tested-by: Yicong Yang -Signed-off-by: Peter Zijlstra (Intel) ---- - arch/arm64/Kconfig | 9 +++++++++ - include/linux/sched/topology.h | 7 +++++++ - include/linux/topology.h | 7 +++++++ - kernel/sched/topology.c | 5 +++++ - 4 files changed, 28 insertions(+) - -diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig -index 0758ea0717f9..359db6a4739e 100644 ---- a/arch/arm64/Kconfig -+++ b/arch/arm64/Kconfig -@@ -989,6 +989,15 @@ config SCHED_MC - making when dealing with multi-core CPU chips at a cost of slightly - increased overhead in some places. If unsure say N here. - -+config SCHED_CLUSTER -+ bool "Cluster scheduler support" -+ help -+ Cluster scheduler support improves the CPU scheduler's decision -+ making when dealing with machines that have clusters of CPUs. -+ Cluster usually means a couple of CPUs which are placed closely -+ by sharing mid-level caches, last-level cache tags or internal -+ busses. -+ - config SCHED_SMT - bool "SMT scheduler support" - help -diff --git a/include/linux/sched/topology.h b/include/linux/sched/topology.h -index 8f0f778b7c91..2f9166f6dec8 100644 ---- a/include/linux/sched/topology.h -+++ b/include/linux/sched/topology.h -@@ -42,6 +42,13 @@ static inline int cpu_smt_flags(void) - } - #endif - -+#ifdef CONFIG_SCHED_CLUSTER -+static inline int cpu_cluster_flags(void) -+{ -+ return SD_SHARE_PKG_RESOURCES; -+} -+#endif -+ - #ifdef CONFIG_SCHED_MC - static inline int cpu_core_flags(void) - { -diff --git a/include/linux/topology.h b/include/linux/topology.h -index 80d27d717631..0b3704ad13c8 100644 ---- a/include/linux/topology.h -+++ b/include/linux/topology.h -@@ -212,6 +212,13 @@ static inline const struct cpumask *cpu_smt_mask(int cpu) - } - #endif - -+#if defined(CONFIG_SCHED_CLUSTER) && !defined(cpu_cluster_mask) -+static inline const struct cpumask *cpu_cluster_mask(int cpu) -+{ -+ return topology_cluster_cpumask(cpu); -+} -+#endif -+ - static inline const struct cpumask *cpu_cpu_mask(int cpu) - { - return cpumask_of_node(cpu_to_node(cpu)); -diff --git a/kernel/sched/topology.c b/kernel/sched/topology.c -index 4e8698e62f07..7d27559485ea 100644 ---- a/kernel/sched/topology.c -+++ b/kernel/sched/topology.c -@@ -1627,6 +1627,11 @@ static struct sched_domain_topology_level default_topology[] = { - #ifdef CONFIG_SCHED_SMT - { cpu_smt_mask, cpu_smt_flags, SD_INIT_NAME(SMT) }, - #endif -+ -+#ifdef CONFIG_SCHED_CLUSTER -+ { cpu_clustergroup_mask, cpu_cluster_flags, SD_INIT_NAME(CLS) }, -+#endif -+ - #ifdef CONFIG_SCHED_MC - { cpu_coregroup_mask, cpu_core_flags, SD_INIT_NAME(MC) }, - #endif --- -2.18.4 - - -From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 -From: Tim Chen -Date: Fri, 24 Sep 2021 20:51:04 +1200 -Subject: [PATCH 20/24] sched: Add cluster scheduler level for x86 - -There are x86 CPU architectures (e.g. Jacobsville) where L2 cahce is -shared among a cluster of cores instead of being exclusive to one -single core. - -To prevent oversubscription of L2 cache, load should be balanced -between such L2 clusters, especially for tasks with no shared data. -On benchmark such as SPECrate mcf test, this change provides a boost -to performance especially on medium load system on Jacobsville. on a -Jacobsville that has 24 Atom cores, arranged into 6 clusters of 4 -cores each, the benchmark number is as follow: - - Improvement over baseline kernel for mcf_r - copies run time base rate - 1 -0.1% -0.2% - 6 25.1% 25.1% - 12 18.8% 19.0% - 24 0.3% 0.3% - -So this looks pretty good. In terms of the system's task distribution, -some pretty bad clumping can be seen for the vanilla kernel without -the L2 cluster domain for the 6 and 12 copies case. With the extra -domain for cluster, the load does get evened out between the clusters. - -Note this patch isn't an universal win as spreading isn't necessarily -a win, particually for those workload who can benefit from packing. - -Signed-off-by: Tim Chen -Signed-off-by: Barry Song -Signed-off-by: Peter Zijlstra (Intel) -Link: https://lore.kernel.org/r/20210924085104.44806-4-21cnbao@gmail.com ---- - arch/x86/Kconfig | 11 +++++++++ - arch/x86/include/asm/smp.h | 7 ++++++ - arch/x86/include/asm/topology.h | 3 +++ - arch/x86/kernel/cpu/cacheinfo.c | 1 + - arch/x86/kernel/cpu/common.c | 3 +++ - arch/x86/kernel/smpboot.c | 44 ++++++++++++++++++++++++++++++++- - 6 files changed, 68 insertions(+), 1 deletion(-) - -diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig -index 1f96809606ac..c5b8a428d0e7 100644 ---- a/arch/x86/Kconfig -+++ b/arch/x86/Kconfig -@@ -1001,6 +1001,17 @@ config NR_CPUS - This is purely to save memory: each supported CPU adds about 8KB - to the kernel image. - -+config SCHED_CLUSTER -+ bool "Cluster scheduler support" -+ depends on SMP -+ default y -+ help -+ Cluster scheduler support improves the CPU scheduler's decision -+ making when dealing with machines that have clusters of CPUs. -+ Cluster usually means a couple of CPUs which are placed closely -+ by sharing mid-level caches, last-level cache tags or internal -+ busses. -+ - config SCHED_SMT - def_bool y if SMP - -diff --git a/arch/x86/include/asm/smp.h b/arch/x86/include/asm/smp.h -index 630ff08532be..08b0e90623ad 100644 ---- a/arch/x86/include/asm/smp.h -+++ b/arch/x86/include/asm/smp.h -@@ -16,7 +16,9 @@ DECLARE_PER_CPU_READ_MOSTLY(cpumask_var_t, cpu_core_map); - DECLARE_PER_CPU_READ_MOSTLY(cpumask_var_t, cpu_die_map); - /* cpus sharing the last level cache: */ - DECLARE_PER_CPU_READ_MOSTLY(cpumask_var_t, cpu_llc_shared_map); -+DECLARE_PER_CPU_READ_MOSTLY(cpumask_var_t, cpu_l2c_shared_map); - DECLARE_PER_CPU_READ_MOSTLY(u16, cpu_llc_id); -+DECLARE_PER_CPU_READ_MOSTLY(u16, cpu_l2c_id); - DECLARE_PER_CPU_READ_MOSTLY(int, cpu_number); - - static inline struct cpumask *cpu_llc_shared_mask(int cpu) -@@ -24,6 +26,11 @@ static inline struct cpumask *cpu_llc_shared_mask(int cpu) - return per_cpu(cpu_llc_shared_map, cpu); - } - -+static inline struct cpumask *cpu_l2c_shared_mask(int cpu) -+{ -+ return per_cpu(cpu_l2c_shared_map, cpu); -+} -+ - DECLARE_EARLY_PER_CPU_READ_MOSTLY(u16, x86_cpu_to_apicid); - DECLARE_EARLY_PER_CPU_READ_MOSTLY(u32, x86_cpu_to_acpiid); - DECLARE_EARLY_PER_CPU_READ_MOSTLY(u16, x86_bios_cpu_apicid); -diff --git a/arch/x86/include/asm/topology.h b/arch/x86/include/asm/topology.h -index 55160445ea78..2f0b6be8eaab 100644 ---- a/arch/x86/include/asm/topology.h -+++ b/arch/x86/include/asm/topology.h -@@ -103,6 +103,7 @@ static inline void setup_node_to_cpumask_map(void) { } - #include - - extern const struct cpumask *cpu_coregroup_mask(int cpu); -+extern const struct cpumask *cpu_clustergroup_mask(int cpu); - - #define topology_logical_package_id(cpu) (cpu_data(cpu).logical_proc_id) - #define topology_physical_package_id(cpu) (cpu_data(cpu).phys_proc_id) -@@ -113,7 +114,9 @@ extern const struct cpumask *cpu_coregroup_mask(int cpu); - extern unsigned int __max_die_per_package; - - #ifdef CONFIG_SMP -+#define topology_cluster_id(cpu) (per_cpu(cpu_l2c_id, cpu)) - #define topology_die_cpumask(cpu) (per_cpu(cpu_die_map, cpu)) -+#define topology_cluster_cpumask(cpu) (cpu_clustergroup_mask(cpu)) - #define topology_core_cpumask(cpu) (per_cpu(cpu_core_map, cpu)) - #define topology_sibling_cpumask(cpu) (per_cpu(cpu_sibling_map, cpu)) - -diff --git a/arch/x86/kernel/cpu/cacheinfo.c b/arch/x86/kernel/cpu/cacheinfo.c -index b5e36bd0425b..fe98a1465be6 100644 ---- a/arch/x86/kernel/cpu/cacheinfo.c -+++ b/arch/x86/kernel/cpu/cacheinfo.c -@@ -846,6 +846,7 @@ void init_intel_cacheinfo(struct cpuinfo_x86 *c) - l2 = new_l2; - #ifdef CONFIG_SMP - per_cpu(cpu_llc_id, cpu) = l2_id; -+ per_cpu(cpu_l2c_id, cpu) = l2_id; - #endif - } - -diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c -index 58b1416c05da..019ecf5b50ef 100644 ---- a/arch/x86/kernel/cpu/common.c -+++ b/arch/x86/kernel/cpu/common.c -@@ -85,6 +85,9 @@ u16 get_llc_id(unsigned int cpu) - } - EXPORT_SYMBOL_GPL(get_llc_id); - -+/* L2 cache ID of each logical CPU */ -+DEFINE_PER_CPU_READ_MOSTLY(u16, cpu_l2c_id) = BAD_APICID; -+ - /* correctly size the local cpu masks */ - void __init setup_cpu_local_masks(void) - { -diff --git a/arch/x86/kernel/smpboot.c b/arch/x86/kernel/smpboot.c -index 85f6e242b6b4..5094ab0bae58 100644 ---- a/arch/x86/kernel/smpboot.c -+++ b/arch/x86/kernel/smpboot.c -@@ -101,6 +101,8 @@ EXPORT_PER_CPU_SYMBOL(cpu_die_map); - - DEFINE_PER_CPU_READ_MOSTLY(cpumask_var_t, cpu_llc_shared_map); - -+DEFINE_PER_CPU_READ_MOSTLY(cpumask_var_t, cpu_l2c_shared_map); -+ - /* Per CPU bogomips and other parameters */ - DEFINE_PER_CPU_READ_MOSTLY(struct cpuinfo_x86, cpu_info); - EXPORT_PER_CPU_SYMBOL(cpu_info); -@@ -464,6 +466,21 @@ static bool match_die(struct cpuinfo_x86 *c, struct cpuinfo_x86 *o) - return false; - } - -+static bool match_l2c(struct cpuinfo_x86 *c, struct cpuinfo_x86 *o) -+{ -+ int cpu1 = c->cpu_index, cpu2 = o->cpu_index; -+ -+ /* Do not match if we do not have a valid APICID for cpu: */ -+ if (per_cpu(cpu_l2c_id, cpu1) == BAD_APICID) -+ return false; -+ -+ /* Do not match if L2 cache id does not match: */ -+ if (per_cpu(cpu_l2c_id, cpu1) != per_cpu(cpu_l2c_id, cpu2)) -+ return false; -+ -+ return topology_sane(c, o, "l2c"); -+} -+ - /* - * Unlike the other levels, we do not enforce keeping a - * multicore group inside a NUMA node. If this happens, we will -@@ -523,7 +540,7 @@ static bool match_llc(struct cpuinfo_x86 *c, struct cpuinfo_x86 *o) - } - - --#if defined(CONFIG_SCHED_SMT) || defined(CONFIG_SCHED_MC) -+#if defined(CONFIG_SCHED_SMT) || defined(CONFIG_SCHED_CLUSTER) || defined(CONFIG_SCHED_MC) - static inline int x86_sched_itmt_flags(void) - { - return sysctl_sched_itmt_enabled ? SD_ASYM_PACKING : 0; -@@ -541,12 +558,21 @@ static int x86_smt_flags(void) - return cpu_smt_flags() | x86_sched_itmt_flags(); - } - #endif -+#ifdef CONFIG_SCHED_CLUSTER -+static int x86_cluster_flags(void) -+{ -+ return cpu_cluster_flags() | x86_sched_itmt_flags(); -+} -+#endif - #endif - - static struct sched_domain_topology_level x86_numa_in_package_topology[] = { - #ifdef CONFIG_SCHED_SMT - { cpu_smt_mask, x86_smt_flags, SD_INIT_NAME(SMT) }, - #endif -+#ifdef CONFIG_SCHED_CLUSTER -+ { cpu_clustergroup_mask, x86_cluster_flags, SD_INIT_NAME(CLS) }, -+#endif - #ifdef CONFIG_SCHED_MC - { cpu_coregroup_mask, x86_core_flags, SD_INIT_NAME(MC) }, - #endif -@@ -557,6 +583,9 @@ static struct sched_domain_topology_level x86_topology[] = { - #ifdef CONFIG_SCHED_SMT - { cpu_smt_mask, x86_smt_flags, SD_INIT_NAME(SMT) }, - #endif -+#ifdef CONFIG_SCHED_CLUSTER -+ { cpu_clustergroup_mask, x86_cluster_flags, SD_INIT_NAME(CLS) }, -+#endif - #ifdef CONFIG_SCHED_MC - { cpu_coregroup_mask, x86_core_flags, SD_INIT_NAME(MC) }, - #endif -@@ -584,6 +613,7 @@ void set_cpu_sibling_map(int cpu) - if (!has_mp) { - cpumask_set_cpu(cpu, topology_sibling_cpumask(cpu)); - cpumask_set_cpu(cpu, cpu_llc_shared_mask(cpu)); -+ cpumask_set_cpu(cpu, cpu_l2c_shared_mask(cpu)); - cpumask_set_cpu(cpu, topology_core_cpumask(cpu)); - cpumask_set_cpu(cpu, topology_die_cpumask(cpu)); - c->booted_cores = 1; -@@ -602,6 +632,9 @@ void set_cpu_sibling_map(int cpu) - if ((i == cpu) || (has_mp && match_llc(c, o))) - link_mask(cpu_llc_shared_mask, cpu, i); - -+ if ((i == cpu) || (has_mp && match_l2c(c, o))) -+ link_mask(cpu_l2c_shared_mask, cpu, i); -+ - if ((i == cpu) || (has_mp && match_die(c, o))) - link_mask(topology_die_cpumask, cpu, i); - } -@@ -652,6 +685,11 @@ const struct cpumask *cpu_coregroup_mask(int cpu) - return cpu_llc_shared_mask(cpu); - } - -+const struct cpumask *cpu_clustergroup_mask(int cpu) -+{ -+ return cpu_l2c_shared_mask(cpu); -+} -+ - static void impress_friends(void) - { - int cpu; -@@ -1335,6 +1373,7 @@ void __init native_smp_prepare_cpus(unsigned int max_cpus) - zalloc_cpumask_var(&per_cpu(cpu_core_map, i), GFP_KERNEL); - zalloc_cpumask_var(&per_cpu(cpu_die_map, i), GFP_KERNEL); - zalloc_cpumask_var(&per_cpu(cpu_llc_shared_map, i), GFP_KERNEL); -+ zalloc_cpumask_var(&per_cpu(cpu_l2c_shared_map, i), GFP_KERNEL); - } - - /* -@@ -1564,7 +1603,10 @@ static void remove_siblinginfo(int cpu) - - for_each_cpu(sibling, cpu_llc_shared_mask(cpu)) - cpumask_clear_cpu(cpu, cpu_llc_shared_mask(sibling)); -+ for_each_cpu(sibling, cpu_l2c_shared_mask(cpu)) -+ cpumask_clear_cpu(cpu, cpu_l2c_shared_mask(sibling)); - cpumask_clear(cpu_llc_shared_mask(cpu)); -+ cpumask_clear(cpu_l2c_shared_mask(cpu)); - cpumask_clear(topology_sibling_cpumask(cpu)); - cpumask_clear(topology_core_cpumask(cpu)); - cpumask_clear(topology_die_cpumask(cpu)); --- -2.18.4 - - -From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 -From: Jon Nettleton -Date: Fri, 10 Dec 2021 11:24:01 +0100 -Subject: [PATCH 21/24] PCI: layerscape: Add LX2160a MCFG quirks for ECAM - errata - -The PCIe controller in Layerscape LX2160a SoC is not 100% ECAM-compliant. -For both V1 and V2 of the SOC which have different PCIe implementations -the devices behind the bus can be enumerated via ECAM, however the root -port is only accessible via the CCSR address space. - -By default the firmware only exposes the devices so that most PCIe -devices will work out of the box on most distributions, however some -users may want to also have the root port exposed as well, especially -if working with SR-IOV. This quirk will work with the default firmware -as a normal ecam setup, but if the firmware exposes the root port as -bus 0 (the default) then this quirk will also allow access to a more -traditional PCIe layout. - -Signed-off-by: Jon Nettleton ---- - drivers/acpi/pci_mcfg.c | 10 +++ - drivers/pci/controller/Makefile | 1 + - drivers/pci/controller/pcie-layerscape-ecam.c | 89 +++++++++++++++++++ - include/linux/pci-ecam.h | 1 + - 4 files changed, 101 insertions(+) - create mode 100644 drivers/pci/controller/pcie-layerscape-ecam.c - -diff --git a/drivers/acpi/pci_mcfg.c b/drivers/acpi/pci_mcfg.c -index 53cab975f612..2fb54d5ceaf6 100644 ---- a/drivers/acpi/pci_mcfg.c -+++ b/drivers/acpi/pci_mcfg.c -@@ -53,6 +53,16 @@ static struct mcfg_fixup mcfg_quirks[] = { - AL_ECAM("GRAVITON", 0, 6, &al_pcie_ops), - AL_ECAM("GRAVITON", 0, 7, &al_pcie_ops), - -+#define NXP_ECAM(seg) \ -+ { "NXP ", "LX2160 ", 0, seg, MCFG_BUS_ANY, &ls_pcie_ecam_ops } -+ -+ NXP_ECAM(0), -+ NXP_ECAM(1), -+ NXP_ECAM(2), -+ NXP_ECAM(3), -+ NXP_ECAM(4), -+ NXP_ECAM(5), -+ - #define QCOM_ECAM32(seg) \ - { "QCOM ", "QDF2432 ", 1, seg, MCFG_BUS_ANY, &pci_32b_ops } - -diff --git a/drivers/pci/controller/Makefile b/drivers/pci/controller/Makefile -index aaf30b3dcc14..1bb8b5cdd6f8 100644 ---- a/drivers/pci/controller/Makefile -+++ b/drivers/pci/controller/Makefile -@@ -54,6 +54,7 @@ obj-y += mobiveil/ - - ifdef CONFIG_ACPI - ifdef CONFIG_PCI_QUIRKS -+obj-$(CONFIG_ARM64) += pcie-layerscape-ecam.o - obj-$(CONFIG_ARM64) += pci-thunder-ecam.o - obj-$(CONFIG_ARM64) += pci-thunder-pem.o - obj-$(CONFIG_ARM64) += pci-xgene.o -diff --git a/drivers/pci/controller/pcie-layerscape-ecam.c b/drivers/pci/controller/pcie-layerscape-ecam.c -new file mode 100644 -index 000000000000..8ed303c47f2c ---- /dev/null -+++ b/drivers/pci/controller/pcie-layerscape-ecam.c -@@ -0,0 +1,89 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * PCIe ecam driver for NXP's Layerscape SOCs, adopted from -+ * Amazon's Graviton driver. -+ * -+ * Copyright 2019 Amazon.com, Inc. or its affiliates. All Rights Reserved. -+ * Copyright 2021 SolidRun Ltd. All Rights Reserved. -+ * -+ * Author: Jonathan Chocron -+ * Author: Jon Nettleton -+ */ -+ -+#include -+#include -+#include -+#include "../pci.h" -+ -+#if defined(CONFIG_ACPI) && defined(CONFIG_PCI_QUIRKS) -+ -+struct ls_pcie_ecam { -+ void __iomem *ccsr_base; -+}; -+ -+static void __iomem *ls_pcie_ecam_map_bus(struct pci_bus *bus, unsigned int devfn, -+ int where) -+{ -+ struct pci_config_window *cfg = bus->sysdata; -+ struct ls_pcie_ecam *pcie = cfg->priv; -+ void __iomem *ccsr_base = pcie->ccsr_base; -+ -+ if (bus->number == 0) { -+ /* -+ * -+ * No devices/functions on the root bus num, so we do this here. -+ */ -+ if (PCI_SLOT(devfn) > 0) -+ return NULL; -+ else -+ return ccsr_base + where; -+ } -+ -+ return pci_ecam_map_bus(bus, devfn, where); -+} -+ -+static int ls_pcie_ecam_init(struct pci_config_window *cfg) -+{ -+ struct device *dev = cfg->parent; -+ struct acpi_device *adev = to_acpi_device(dev); -+ struct acpi_pci_root *root = acpi_driver_data(adev); -+ struct ls_pcie_ecam *ls_pcie; -+ struct resource *res; -+ int ret; -+ -+ ls_pcie = devm_kzalloc(dev, sizeof(*ls_pcie), GFP_KERNEL); -+ if (!ls_pcie) -+ return -ENOMEM; -+ -+ res = devm_kzalloc(dev, sizeof(*res), GFP_KERNEL); -+ if (!res) -+ return -ENOMEM; -+ -+ ret = acpi_get_rc_resources(dev, "NXP0016", root->segment, res); -+ if (ret) { -+ dev_err(dev, "can't get rc csr base address for SEG %d\n", -+ root->segment); -+ return ret; -+ } -+ -+ dev_dbg(dev, "Root port ccsr res: %pR\n", res); -+ -+ ls_pcie->ccsr_base = devm_pci_remap_cfg_resource(dev, res); -+ if (IS_ERR(ls_pcie->ccsr_base)) -+ return PTR_ERR(ls_pcie->ccsr_base); -+ -+ cfg->priv = ls_pcie; -+ -+ return 0; -+} -+ -+const struct pci_ecam_ops ls_pcie_ecam_ops = { -+ .init = ls_pcie_ecam_init, -+ .pci_ops = { -+ .map_bus = ls_pcie_ecam_map_bus, -+ .read = pci_generic_config_read, -+ .write = pci_generic_config_write, -+ } -+}; -+ -+#endif /* defined(CONFIG_ACPI) && defined(CONFIG_PCI_QUIRKS) */ -diff --git a/include/linux/pci-ecam.h b/include/linux/pci-ecam.h -index adea5a4771cf..ab6c5c851976 100644 ---- a/include/linux/pci-ecam.h -+++ b/include/linux/pci-ecam.h -@@ -87,6 +87,7 @@ extern const struct pci_ecam_ops xgene_v1_pcie_ecam_ops; /* APM X-Gene PCIe v1 * - extern const struct pci_ecam_ops xgene_v2_pcie_ecam_ops; /* APM X-Gene PCIe v2.x */ - extern const struct pci_ecam_ops al_pcie_ops; /* Amazon Annapurna Labs PCIe */ - extern const struct pci_ecam_ops tegra194_pcie_ops; /* Tegra194 PCIe */ -+extern const struct pci_ecam_ops ls_pcie_ecam_ops; /* NXP Layerscape LX2160a PCIe */ - #endif - - #if IS_ENABLED(CONFIG_PCI_HOST_COMMON) --- -2.18.4 - - -From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 From: Diana Craciun Date: Wed, 22 Sep 2021 14:05:29 +0300 -Subject: [PATCH 22/24] bus/fsl-mc: Add generic implementation for +Subject: [PATCH 17/19] bus/fsl-mc: Add generic implementation for open/reset/close commands The open/reset/close commands format is similar for all objects. @@ -2960,7 +1762,7 @@ index 30ece3ae6df7..e026f6c48b49 100644 From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 From: Diana Craciun Date: Wed, 22 Sep 2021 14:05:30 +0300 -Subject: [PATCH 23/24] vfio/fsl-mc: Add per device reset support +Subject: [PATCH 18/19] vfio/fsl-mc: Add per device reset support Currently when a fsl-mc device is reset, the entire DPRC container is reset which is very inefficient because the devices within a @@ -3052,7 +1854,7 @@ index 0ead91bfa838..6d7b2d2571a2 100644 From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 From: Jon Nettleton Date: Mon, 20 Dec 2021 12:49:27 +0100 -Subject: [PATCH 24/24] bus: fsl-mc: list more commands as accepted through the +Subject: [PATCH 19/19] bus: fsl-mc: list more commands as accepted through the ioctl This adds the commands needed to use the DCE engine from diff --git a/SPECS/kernel.spec b/SPECS/kernel.spec index 627b2d5..d2d610b 100644 --- a/SPECS/kernel.spec +++ b/SPECS/kernel.spec @@ -97,7 +97,7 @@ Summary: The Linux kernel %if 0%{?released_kernel} # Do we have a -stable update to apply? -%define stable_update 25 +%define stable_update 29 # Set rpm version accordingly %if 0%{?stable_update} %define stablerev %{stable_update} @@ -3017,6 +3017,9 @@ fi # # %changelog +* Thu Mar 17 2022 Pablo Greco - 5.15.29-200 +- Update to version v5.15.29 + * Sat Feb 26 2022 Pablo Greco - 5.15.25-200 - Update to version v5.15.25