|
 |
f96e0b |
From 58e08a1795d63ba85b006c54dc7bbfe0afd624a7 Mon Sep 17 00:00:00 2001
|
|
|
f96e0b |
From: Francesco Lavra <francescolavra.fl@gmail.com>
|
|
|
f96e0b |
Date: Wed, 3 Apr 2013 11:23:22 +0200
|
|
|
f96e0b |
Subject: [PATCH 245/482] * include/grub/elf.h: Add missing ARM
|
|
|
f96e0b |
relocation codes and fix existing ones.
|
|
|
f96e0b |
|
|
|
f96e0b |
---
|
|
|
f96e0b |
ChangeLog | 5 +++
|
|
|
f96e0b |
include/grub/elf.h | 110 ++++++++++++++++++++++++++++++++++++++++++++---------
|
|
|
f96e0b |
2 files changed, 98 insertions(+), 17 deletions(-)
|
|
|
f96e0b |
|
|
|
f96e0b |
diff --git a/ChangeLog b/ChangeLog
|
|
|
f96e0b |
index 5e516dc..56588dd 100644
|
|
|
f96e0b |
--- a/ChangeLog
|
|
|
f96e0b |
+++ b/ChangeLog
|
|
|
f96e0b |
@@ -1,3 +1,8 @@
|
|
|
f96e0b |
+2013-04-03 Francesco Lavra <francescolavra.fl@gmail.com>
|
|
|
f96e0b |
+
|
|
|
f96e0b |
+ * include/grub/elf.h: Add missing ARM relocation codes and fix
|
|
|
f96e0b |
+ existing ones.
|
|
|
f96e0b |
+
|
|
|
f96e0b |
2013-04-03 Vladimir Testov <vladimir.testov@rosalab.ru>
|
|
|
f96e0b |
|
|
|
f96e0b |
* grub-core/gfxmenu/gui_progress_bar.c: Handle padding sizes.
|
|
|
f96e0b |
diff --git a/include/grub/elf.h b/include/grub/elf.h
|
|
|
f96e0b |
index d4a2a5f..708cd6a 100644
|
|
|
f96e0b |
--- a/include/grub/elf.h
|
|
|
f96e0b |
+++ b/include/grub/elf.h
|
|
|
f96e0b |
@@ -2067,7 +2067,7 @@ typedef Elf32_Addr Elf32_Conflict;
|
|
|
f96e0b |
#define R_ARM_PC24 1 /* PC relative 26 bit branch */
|
|
|
f96e0b |
#define R_ARM_ABS32 2 /* Direct 32 bit */
|
|
|
f96e0b |
#define R_ARM_REL32 3 /* PC relative 32 bit */
|
|
|
f96e0b |
-#define R_ARM_PC13 4
|
|
|
f96e0b |
+#define R_ARM_LDR_PC_G0 4
|
|
|
f96e0b |
#define R_ARM_ABS16 5 /* Direct 16 bit */
|
|
|
f96e0b |
#define R_ARM_ABS12 6 /* Direct 12 bit */
|
|
|
f96e0b |
#define R_ARM_THM_ABS5 7
|
|
|
f96e0b |
@@ -2075,18 +2075,21 @@ typedef Elf32_Addr Elf32_Conflict;
|
|
|
f96e0b |
#define R_ARM_SBREL32 9
|
|
|
f96e0b |
#define R_ARM_THM_CALL 10
|
|
|
f96e0b |
#define R_ARM_THM_PC8 11
|
|
|
f96e0b |
-#define R_ARM_AMP_VCALL9 12
|
|
|
f96e0b |
-#define R_ARM_SWI24 13
|
|
|
f96e0b |
+#define R_ARM_BREL_ADJ 12
|
|
|
f96e0b |
+#define R_ARM_TLS_DESC 13
|
|
|
f96e0b |
#define R_ARM_THM_SWI8 14
|
|
|
f96e0b |
#define R_ARM_XPC25 15
|
|
|
f96e0b |
#define R_ARM_THM_XPC22 16
|
|
|
f96e0b |
+#define R_ARM_TLS_DTPMOD32 17
|
|
|
f96e0b |
+#define R_ARM_TLS_DTPOFF32 18
|
|
|
f96e0b |
+#define R_ARM_TLS_TPOFF32 19
|
|
|
f96e0b |
#define R_ARM_COPY 20 /* Copy symbol at runtime */
|
|
|
f96e0b |
#define R_ARM_GLOB_DAT 21 /* Create GOT entry */
|
|
|
f96e0b |
#define R_ARM_JUMP_SLOT 22 /* Create PLT entry */
|
|
|
f96e0b |
#define R_ARM_RELATIVE 23 /* Adjust by program base */
|
|
|
f96e0b |
-#define R_ARM_GOTOFF 24 /* 32 bit offset to GOT */
|
|
|
f96e0b |
-#define R_ARM_GOTPC 25 /* 32 bit PC relative offset to GOT */
|
|
|
f96e0b |
-#define R_ARM_GOT32 26 /* 32 bit GOT entry */
|
|
|
f96e0b |
+#define R_ARM_GOTOFF32 24 /* 32 bit offset to GOT */
|
|
|
f96e0b |
+#define R_ARM_BASE_PREL 25 /* 32 bit PC relative offset to GOT */
|
|
|
f96e0b |
+#define R_ARM_GOT_BREL 26 /* 32 bit GOT entry */
|
|
|
f96e0b |
#define R_ARM_PLT32 27 /* 32 bit PLT address */
|
|
|
f96e0b |
#define R_ARM_CALL 28
|
|
|
f96e0b |
#define R_ARM_JUMP24 29
|
|
|
f96e0b |
@@ -2098,14 +2101,72 @@ typedef Elf32_Addr Elf32_Conflict;
|
|
|
f96e0b |
#define R_ARM_LDR_SBREL_11_0 35
|
|
|
f96e0b |
#define R_ARM_ALU_SBREL_19_12 36
|
|
|
f96e0b |
#define R_ARM_ALU_SBREL_27_20 37
|
|
|
f96e0b |
+#define R_ARM_TARGET1 38
|
|
|
f96e0b |
+#define R_ARM_SBREL31 39
|
|
|
f96e0b |
+#define R_ARM_V4BX 40
|
|
|
f96e0b |
+#define R_ARM_TARGET2 41
|
|
|
f96e0b |
+#define R_ARM_PREL31 42
|
|
|
f96e0b |
+#define R_ARM_MOVW_ABS_NC 43
|
|
|
f96e0b |
+#define R_ARM_MOVT_ABS 44
|
|
|
f96e0b |
+#define R_ARM_MOVW_PREL_NC 45
|
|
|
f96e0b |
+#define R_ARM_MOVT_PREL 46
|
|
|
f96e0b |
+#define R_ARM_THM_MOVW_ABS_NC 47
|
|
|
f96e0b |
+#define R_ARM_THM_MOVT_ABS 48
|
|
|
f96e0b |
+#define R_ARM_THM_MOVW_PREL_NC 49
|
|
|
f96e0b |
+#define R_ARM_THM_MOVT_PREL 50
|
|
|
f96e0b |
+#define R_ARM_THM_JUMP19 51
|
|
|
f96e0b |
+#define R_ARM_THM_JUMP6 52
|
|
|
f96e0b |
+#define R_ARM_THM_ALU_PREL_11_0 53
|
|
|
f96e0b |
+#define R_ARM_THM_PC12 54
|
|
|
f96e0b |
+#define R_ARM_ABS32_NOI 55
|
|
|
f96e0b |
+#define R_ARM_REL32_NOI 56
|
|
|
f96e0b |
+#define R_ARM_ALU_PC_G0_NC 57
|
|
|
f96e0b |
+#define R_ARM_ALU_PC_G0 58
|
|
|
f96e0b |
+#define R_ARM_ALU_PC_G1_NC 59
|
|
|
f96e0b |
+#define R_ARM_ALU_PC_G1 60
|
|
|
f96e0b |
+#define R_ARM_ALU_PC_G2 61
|
|
|
f96e0b |
+#define R_ARM_LDR_PC_G1 62
|
|
|
f96e0b |
+#define R_ARM_LDR_PC_G2 63
|
|
|
f96e0b |
+#define R_ARM_LDRS_PC_G0 64
|
|
|
f96e0b |
+#define R_ARM_LDRS_PC_G1 65
|
|
|
f96e0b |
+#define R_ARM_LDRS_PC_G2 66
|
|
|
f96e0b |
+#define R_ARM_LDC_PC_G0 67
|
|
|
f96e0b |
+#define R_ARM_LDC_PC_G1 68
|
|
|
f96e0b |
+#define R_ARM_LDC_PC_G2 69
|
|
|
f96e0b |
+#define R_ARM_ALU_SB_G0_NC 70
|
|
|
f96e0b |
+#define R_ARM_ALU_SB_G0 71
|
|
|
f96e0b |
+#define R_ARM_ALU_SB_G1_NC 72
|
|
|
f96e0b |
+#define R_ARM_ALU_SB_G1 73
|
|
|
f96e0b |
+#define R_ARM_ALU_SB_G2 74
|
|
|
f96e0b |
+#define R_ARM_LDR_SB_G0 75
|
|
|
f96e0b |
+#define R_ARM_LDR_SB_G1 76
|
|
|
f96e0b |
+#define R_ARM_LDR_SB_G2 77
|
|
|
f96e0b |
+#define R_ARM_LDRS_SB_G0 78
|
|
|
f96e0b |
+#define R_ARM_LDRS_SB_G1 79
|
|
|
f96e0b |
+#define R_ARM_LDRS_SB_G2 80
|
|
|
f96e0b |
+#define R_ARM_LDC_SB_G0 81
|
|
|
f96e0b |
+#define R_ARM_LDC_SB_G1 82
|
|
|
f96e0b |
+#define R_ARM_LDC_SB_G2 83
|
|
|
f96e0b |
+#define R_ARM_MOVW_BREL_NC 84
|
|
|
f96e0b |
+#define R_ARM_MOVT_BREL 85
|
|
|
f96e0b |
+#define R_ARM_MOVW_BREL 86
|
|
|
f96e0b |
+#define R_ARM_THM_MOVW_BREL_NC 87
|
|
|
f96e0b |
+#define R_ARM_THM_MOVT_BREL 88
|
|
|
f96e0b |
+#define R_ARM_THM_MOVW_BREL 89
|
|
|
f96e0b |
#define R_ARM_TLS_GOTDESC 90
|
|
|
f96e0b |
#define R_ARM_TLS_CALL 91
|
|
|
f96e0b |
#define R_ARM_TLS_DESCSEQ 92
|
|
|
f96e0b |
#define R_ARM_THM_TLS_CALL 93
|
|
|
f96e0b |
+#define R_ARM_PLT32_ABS 94
|
|
|
f96e0b |
+#define R_ARM_GOT_ABS 95
|
|
|
f96e0b |
+#define R_ARM_GOT_PREL 96
|
|
|
f96e0b |
+#define R_ARM_GOT_BREL12 97
|
|
|
f96e0b |
+#define R_ARM_GOTOFF12 98
|
|
|
f96e0b |
+#define R_ARM_GOTRELAX 99
|
|
|
f96e0b |
#define R_ARM_GNU_VTENTRY 100
|
|
|
f96e0b |
#define R_ARM_GNU_VTINHERIT 101
|
|
|
f96e0b |
-#define R_ARM_THM_PC11 102 /* thumb unconditional branch */
|
|
|
f96e0b |
-#define R_ARM_THM_PC9 103 /* thumb conditional branch */
|
|
|
f96e0b |
+#define R_ARM_THM_JUMP11 102 /* thumb unconditional branch */
|
|
|
f96e0b |
+#define R_ARM_THM_JUMP8 103 /* thumb conditional branch */
|
|
|
f96e0b |
#define R_ARM_TLS_GD32 104 /* PC-rel 32 bit for global dynamic
|
|
|
f96e0b |
thread local data */
|
|
|
f96e0b |
#define R_ARM_TLS_LDM32 105 /* PC-rel 32 bit for local dynamic
|
|
|
f96e0b |
@@ -2116,15 +2177,30 @@ typedef Elf32_Addr Elf32_Conflict;
|
|
|
f96e0b |
static TLS block offset */
|
|
|
f96e0b |
#define R_ARM_TLS_LE32 108 /* 32 bit offset relative to static
|
|
|
f96e0b |
TLS block */
|
|
|
f96e0b |
-#define R_ARM_THM_TLS_DESCSEQ 129
|
|
|
f96e0b |
-#define R_ARM_IRELATIVE 160
|
|
|
f96e0b |
-#define R_ARM_RXPC25 249
|
|
|
f96e0b |
-#define R_ARM_RSBREL32 250
|
|
|
f96e0b |
-#define R_ARM_THM_RPC22 251
|
|
|
f96e0b |
-#define R_ARM_RREL32 252
|
|
|
f96e0b |
-#define R_ARM_RABS22 253
|
|
|
f96e0b |
-#define R_ARM_RPC24 254
|
|
|
f96e0b |
-#define R_ARM_RBASE 255
|
|
|
f96e0b |
+#define R_ARM_TLS_LDO12 109
|
|
|
f96e0b |
+#define R_ARM_TLS_LE12 110
|
|
|
f96e0b |
+#define R_ARM_IE12GP 111
|
|
|
f96e0b |
+#define R_ARM_PRIVATE_0 112
|
|
|
f96e0b |
+#define R_ARM_PRIVATE_1 113
|
|
|
f96e0b |
+#define R_ARM_PRIVATE_2 114
|
|
|
f96e0b |
+#define R_ARM_PRIVATE_3 115
|
|
|
f96e0b |
+#define R_ARM_PRIVATE_4 116
|
|
|
f96e0b |
+#define R_ARM_PRIVATE_5 117
|
|
|
f96e0b |
+#define R_ARM_PRIVATE_6 118
|
|
|
f96e0b |
+#define R_ARM_PRIVATE_7 119
|
|
|
f96e0b |
+#define R_ARM_PRIVATE_8 120
|
|
|
f96e0b |
+#define R_ARM_PRIVATE_9 121
|
|
|
f96e0b |
+#define R_ARM_PRIVATE_10 122
|
|
|
f96e0b |
+#define R_ARM_PRIVATE_11 123
|
|
|
f96e0b |
+#define R_ARM_PRIVATE_12 124
|
|
|
f96e0b |
+#define R_ARM_PRIVATE_13 125
|
|
|
f96e0b |
+#define R_ARM_PRIVATE_14 126
|
|
|
f96e0b |
+#define R_ARM_PRIVATE_15 127
|
|
|
f96e0b |
+#define R_ARM_ME_TOO 128
|
|
|
f96e0b |
+#define R_ARM_THM_TLS_DESCSEQ16 129
|
|
|
f96e0b |
+#define R_ARM_THM_TLS_DESCSEQ32 130
|
|
|
f96e0b |
+#define R_ARM_THM_GOT_BREL12 131
|
|
|
f96e0b |
+#define R_ARM_IRELATIVE 140
|
|
|
f96e0b |
/* Keep this the last entry. */
|
|
|
f96e0b |
#define R_ARM_NUM 256
|
|
|
f96e0b |
|
|
|
f96e0b |
--
|
|
|
f96e0b |
1.8.2.1
|
|
|
f96e0b |
|