diff --git a/SOURCES/glibc-rh1937515.patch b/SOURCES/glibc-rh1937515.patch
new file mode 100644
index 0000000..1e77538
--- /dev/null
+++ b/SOURCES/glibc-rh1937515.patch
@@ -0,0 +1,90 @@
+Based on the following commit, adjusted for glibc-2.28 in RHEL-8:
+
+commit 27f74636752d0c4438cf8346cf2a76b6fcf3be16
+Author: H.J. Lu <hjl.tools@gmail.com>
+Date: Fri Mar 19 06:15:37 2021 -0700
+
+ x86: Properly disable XSAVE related features [BZ #27605]
+
+ 1. Support GLIBC_TUNABLES=glibc.cpu.hwcaps=-XSAVE.
+ 2. Disable all features which depend on XSAVE:
+ a. If OSXSAVE is disabled by glibc tunables. Or
+ b. If both XSAVE and XSAVEC aren't usable.
+
+diff --git a/sysdeps/x86/cpu-features.c b/sysdeps/x86/cpu-features.c
+index 805d00a43309fc23..910425053d9e226f 100644
+--- a/sysdeps/x86/cpu-features.c
++++ b/sysdeps/x86/cpu-features.c
+@@ -654,6 +654,60 @@ no_cpuid:
+ = TUNABLE_GET (x86_data_cache_size, long int, NULL);
+ cpu_features->shared_cache_size
+ = TUNABLE_GET (x86_shared_cache_size, long int, NULL);
++
++ bool disable_xsave_features = false;
++
++ if (!CPU_FEATURE_USABLE_P (cpu_features, OSXSAVE))
++ {
++ /* These features are usable only if OSXSAVE is usable. */
++ CPU_FEATURE_UNSET (cpu_features, XSAVE);
++ CPU_FEATURE_UNSET (cpu_features, XSAVEOPT);
++ CPU_FEATURE_UNSET (cpu_features, XSAVEC);
++ CPU_FEATURE_UNSET (cpu_features, XGETBV_ECX_1);
++ CPU_FEATURE_UNSET (cpu_features, XFD);
++
++ disable_xsave_features = true;
++ }
++
++ if (disable_xsave_features
++ || (!CPU_FEATURE_USABLE_P (cpu_features, XSAVE)
++ && !CPU_FEATURE_USABLE_P (cpu_features, XSAVEC)))
++ {
++ /* Clear xsave_state_size if both XSAVE and XSAVEC aren't usable. */
++ cpu_features->xsave_state_size = 0;
++
++ CPU_FEATURE_UNSET (cpu_features, AVX);
++ CPU_FEATURE_UNSET (cpu_features, AVX2);
++ CPU_FEATURE_UNSET (cpu_features, AVX_VNNI);
++ CPU_FEATURE_UNSET (cpu_features, FMA);
++ CPU_FEATURE_UNSET (cpu_features, VAES);
++ CPU_FEATURE_UNSET (cpu_features, VPCLMULQDQ);
++ CPU_FEATURE_UNSET (cpu_features, XOP);
++ CPU_FEATURE_UNSET (cpu_features, F16C);
++ CPU_FEATURE_UNSET (cpu_features, AVX512F);
++ CPU_FEATURE_UNSET (cpu_features, AVX512CD);
++ CPU_FEATURE_UNSET (cpu_features, AVX512ER);
++ CPU_FEATURE_UNSET (cpu_features, AVX512PF);
++ CPU_FEATURE_UNSET (cpu_features, AVX512VL);
++ CPU_FEATURE_UNSET (cpu_features, AVX512DQ);
++ CPU_FEATURE_UNSET (cpu_features, AVX512BW);
++ CPU_FEATURE_UNSET (cpu_features, AVX512_4FMAPS);
++ CPU_FEATURE_UNSET (cpu_features, AVX512_4VNNIW);
++ CPU_FEATURE_UNSET (cpu_features, AVX512_BITALG);
++ CPU_FEATURE_UNSET (cpu_features, AVX512_IFMA);
++ CPU_FEATURE_UNSET (cpu_features, AVX512_VBMI);
++ CPU_FEATURE_UNSET (cpu_features, AVX512_VBMI2);
++ CPU_FEATURE_UNSET (cpu_features, AVX512_VNNI);
++ CPU_FEATURE_UNSET (cpu_features, AVX512_VPOPCNTDQ);
++ CPU_FEATURE_UNSET (cpu_features, AVX512_VP2INTERSECT);
++ CPU_FEATURE_UNSET (cpu_features, AVX512_BF16);
++ CPU_FEATURE_UNSET (cpu_features, AVX512_FP16);
++ CPU_FEATURE_UNSET (cpu_features, AMX_BF16);
++ CPU_FEATURE_UNSET (cpu_features, AMX_TILE);
++ CPU_FEATURE_UNSET (cpu_features, AMX_INT8);
++
++ CPU_FEATURE_UNSET (cpu_features, FMA4);
++ }
+ #endif
+
+ /* Reuse dl_platform, dl_hwcap and dl_hwcap_mask for x86. */
+diff --git a/sysdeps/x86/cpu-tunables.c b/sysdeps/x86/cpu-tunables.c
+index 0728023007a0f423..3173b2b959ca88f9 100644
+--- a/sysdeps/x86/cpu-tunables.c
++++ b/sysdeps/x86/cpu-tunables.c
+@@ -168,6 +168,7 @@ TUNABLE_CALLBACK (set_hwcaps) (tunable_val_t *valp)
+ CHECK_GLIBC_IFUNC_CPU_OFF (n, cpu_features, MOVBE, 5);
+ CHECK_GLIBC_IFUNC_CPU_OFF (n, cpu_features, SHSTK, 5);
+ CHECK_GLIBC_IFUNC_CPU_OFF (n, cpu_features, SSSE3, 5);
++ CHECK_GLIBC_IFUNC_CPU_OFF (n, cpu_features, XSAVE, 5);
+ }
+ break;
+ case 6:
diff --git a/SOURCES/glibc-rh2021452.patch b/SOURCES/glibc-rh2021452.patch
new file mode 100644
index 0000000..404296e
--- /dev/null
+++ b/SOURCES/glibc-rh2021452.patch
@@ -0,0 +1,42 @@
+Based on the following patch posted upstream and awaiting IBM review:
+https://sourceware.org/pipermail/libc-alpha/2021-November/132856.html
+
+Author: Florian Weimer <fweimer@redhat.com>
+Date: Tue Nov 9 18:50:55 2021 +0100
+
+ s390: Use long branches across object boundaries (jgh instead of jh)
+
+ Depending on the layout chosen by the linker, the 16-bit displacement
+ of the jh instruction is insufficient to reach the target label.
+
+ Analysis of the linker failure was carried out by Nick Clifton.
+
+ Tested on a z13 and z15, s390x-linux-gnu only.
+ Reviewed-by: Carlos O'Donell <carlos@redhat.com>
+
+diff --git a/sysdeps/s390/memmem-arch13.S b/sysdeps/s390/memmem-arch13.S
+index b59d60acf0f6aaa0..4faede0cd2f942e3 100644
+--- a/sysdeps/s390/memmem-arch13.S
++++ b/sysdeps/s390/memmem-arch13.S
+@@ -41,7 +41,7 @@ ENTRY(MEMMEM_ARCH13)
+ # error The arch13 variant of memmem needs the z13 variant of memmem!
+ # endif
+ clgfi %r5,9
+- jh MEMMEM_Z13
++ jgh MEMMEM_Z13
+
+ aghik %r0,%r5,-1 /* vll needs highest index. */
+ bc 4,0(%r14) /* cc==1: return if needle-len == 0. */
+diff --git a/sysdeps/s390/strstr-arch13.S b/sysdeps/s390/strstr-arch13.S
+index faa969849e09c2e1..ffc34c2523ce635a 100644
+--- a/sysdeps/s390/strstr-arch13.S
++++ b/sysdeps/s390/strstr-arch13.S
+@@ -49,7 +49,7 @@ ENTRY(STRSTR_ARCH13)
+ # error The arch13 variant of strstr needs the z13 variant of strstr!
+ # endif
+ clgfi %r4,9
+- jh STRSTR_Z13
++ jgh STRSTR_Z13
+
+ /* In case of a partial match, the vstrs instruction returns the index
+ of the partial match in a vector-register. Then we have to
diff --git a/SPECS/glibc.spec b/SPECS/glibc.spec
index 2a20cdd..09cbe36 100644
--- a/SPECS/glibc.spec
+++ b/SPECS/glibc.spec
@@ -1,6 +1,6 @@
%define glibcsrcdir glibc-2.28
%define glibcversion 2.28
-%define glibcrelease 168%{?dist}
+%define glibcrelease 170%{?dist}
# Pre-release tarballs are pulled in from git using a command that is
# effectively:
#
@@ -778,6 +778,8 @@ Patch600: glibc-rh1971664-15.patch
Patch601: glibc-rh1977614.patch
Patch602: glibc-rh1983203-1.patch
Patch603: glibc-rh1983203-2.patch
+Patch604: glibc-rh2021452.patch
+Patch605: glibc-rh1937515.patch
##############################################################################
# Continued list of core "glibc" package information:
@@ -2728,6 +2730,13 @@ fi
%files -f compat-libpthread-nonshared.filelist -n compat-libpthread-nonshared
%changelog
+* Wed Nov 10 2021 Arjun Shankar <arjun@redhat.com> - 2.28-170
+- x86: Properly disable XSAVE related features when its use is disabled via
+ tunables (#1937515)
+
+* Wed Nov 10 2021 Arjun Shankar <arjun@redhat.com> - 2.28-169
+- s390: Use long branches across object boundaries (#2021452)
+
* Fri Oct 29 2021 Arjun Shankar <arjun@redhat.com> - 2.28-168
- Optimize memcmp, strcpy, and stpcpy for IBM POWER10 (#1983203)