From 869a7106bfc301aa021a77a9bcede85eddd17da1 Mon Sep 17 00:00:00 2001 From: "H.J. Lu" Date: Wed, 2 Mar 2022 15:33:52 -0800 Subject: [PATCH] x86-64: Add Avoid_Short_Distance_REP_MOVSB commit 3ec5d83d2a237d39e7fd6ef7a0bc8ac4c171a4a5 Author: H.J. Lu Date: Sat Jan 25 14:19:40 2020 -0800 x86-64: Avoid rep movsb with short distance [BZ #27130] introduced some regressions on Intel processors without Fast Short REP MOV (FSRM). Add Avoid_Short_Distance_REP_MOVSB to avoid rep movsb with short distance only on Intel processors with FSRM. bench-memmove-large on Skylake server shows that cycles of __memmove_evex_unaligned_erms improves for the following data size: before after Improvement length=4127, align1=3, align2=0: 479.38 349.25 27% length=4223, align1=9, align2=5: 405.62 333.25 18% length=8223, align1=3, align2=0: 786.12 496.38 37% length=8319, align1=9, align2=5: 727.50 501.38 31% length=16415, align1=3, align2=0: 1436.88 840.00 41% length=16511, align1=9, align2=5: 1375.50 836.38 39% length=32799, align1=3, align2=0: 2890.00 1860.12 36% length=32895, align1=9, align2=5: 2891.38 1931.88 33% (cherry picked from commit 91cc803d27bda34919717b496b53cf279e44a922) --- sysdeps/x86/cacheinfo.h | 9 +++++++++ sysdeps/x86/cpu-features.c | 5 +++++ .../include/cpu-features-preferred_feature_index_1.def | 1 + sysdeps/x86/sysdep.h | 5 +++++ sysdeps/x86_64/multiarch/memmove-vec-unaligned-erms.S | 5 +++++ 5 files changed, 25 insertions(+) diff --git a/sysdeps/x86/cacheinfo.h b/sysdeps/x86/cacheinfo.h index b982982f..f72f634a 100644 --- a/sysdeps/x86/cacheinfo.h +++ b/sysdeps/x86/cacheinfo.h @@ -48,6 +48,11 @@ long int __x86_rep_stosb_threshold attribute_hidden = 2048; /* Threshold to stop using Enhanced REP MOVSB. */ long int __x86_rep_movsb_stop_threshold attribute_hidden; +/* A bit-wise OR of string/memory requirements for optimal performance + e.g. X86_STRING_CONTROL_AVOID_SHORT_DISTANCE_REP_MOVSB. These bits + are used at runtime to tune implementation behavior. */ +int __x86_string_control attribute_hidden; + static void get_common_cache_info (long int *shared_ptr, unsigned int *threads_ptr, long int core) @@ -435,6 +440,10 @@ init_cacheinfo (void) if (cpu_features->basic.kind != arch_kind_amd) __x86_rep_movsb_stop_threshold = __x86_shared_non_temporal_threshold; + if (CPU_FEATURES_ARCH_P (cpu_features, Avoid_Short_Distance_REP_MOVSB)) + __x86_string_control + |= X86_STRING_CONTROL_AVOID_SHORT_DISTANCE_REP_MOVSB; + # if HAVE_TUNABLES __x86_rep_stosb_threshold = cpu_features->rep_stosb_threshold; # endif diff --git a/sysdeps/x86/cpu-features.c b/sysdeps/x86/cpu-features.c index 4889f062..8885b48e 100644 --- a/sysdeps/x86/cpu-features.c +++ b/sysdeps/x86/cpu-features.c @@ -580,6 +580,11 @@ init_cpu_features (struct cpu_features *cpu_features) &= ~bit_arch_AVX_Fast_Unaligned_Load; } } + + /* Avoid avoid short distance REP MOVSB on processor with FSRM. */ + if (CPU_FEATURES_CPU_P (cpu_features, FSRM)) + cpu_features->preferred[index_arch_Avoid_Short_Distance_REP_MOVSB] + |= bit_arch_Avoid_Short_Distance_REP_MOVSB; } /* This spells out "CentaurHauls" or " Shanghai ". */ else if ((ebx == 0x746e6543 && ecx == 0x736c7561 && edx == 0x48727561) diff --git a/sysdeps/x86/include/cpu-features-preferred_feature_index_1.def b/sysdeps/x86/include/cpu-features-preferred_feature_index_1.def index 4ca70b40..f2340624 100644 --- a/sysdeps/x86/include/cpu-features-preferred_feature_index_1.def +++ b/sysdeps/x86/include/cpu-features-preferred_feature_index_1.def @@ -33,3 +33,4 @@ BIT (Prefer_FSRM) BIT (Prefer_No_AVX512) BIT (MathVec_Prefer_No_AVX512) BIT (Prefer_AVX2_STRCMP) +BIT (Avoid_Short_Distance_REP_MOVSB) diff --git a/sysdeps/x86/sysdep.h b/sysdeps/x86/sysdep.h index f41f4ebd..01bac0f6 100644 --- a/sysdeps/x86/sysdep.h +++ b/sysdeps/x86/sysdep.h @@ -57,6 +57,11 @@ enum cf_protection_level #define STATE_SAVE_MASK \ ((1 << 1) | (1 << 2) | (1 << 3) | (1 << 5) | (1 << 6) | (1 << 7)) +/* Constants for bits in __x86_string_control: */ + +/* Avoid short distance REP MOVSB. */ +#define X86_STRING_CONTROL_AVOID_SHORT_DISTANCE_REP_MOVSB (1 << 0) + #ifdef __ASSEMBLER__ /* Syntactic details of assembler. */ diff --git a/sysdeps/x86_64/multiarch/memmove-vec-unaligned-erms.S b/sysdeps/x86_64/multiarch/memmove-vec-unaligned-erms.S index 620ce3a8..0469bf99 100644 --- a/sysdeps/x86_64/multiarch/memmove-vec-unaligned-erms.S +++ b/sysdeps/x86_64/multiarch/memmove-vec-unaligned-erms.S @@ -325,12 +325,16 @@ L(movsb): /* Avoid slow backward REP MOVSB. */ jb L(more_8x_vec_backward) # if AVOID_SHORT_DISTANCE_REP_MOVSB + andl $X86_STRING_CONTROL_AVOID_SHORT_DISTANCE_REP_MOVSB, __x86_string_control(%rip) + jz 3f movq %rdi, %rcx subq %rsi, %rcx jmp 2f # endif 1: # if AVOID_SHORT_DISTANCE_REP_MOVSB + andl $X86_STRING_CONTROL_AVOID_SHORT_DISTANCE_REP_MOVSB, __x86_string_control(%rip) + jz 3f movq %rsi, %rcx subq %rdi, %rcx 2: @@ -338,6 +342,7 @@ L(movsb): is N*4GB + [1..63] with N >= 0. */ cmpl $63, %ecx jbe L(more_2x_vec) /* Avoid "rep movsb" if ECX <= 63. */ +3: # endif mov %RDX_LP, %RCX_LP rep movsb -- GitLab