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commit 8ab861d295b90177b89288a2bc95c5de5e4e5bc6
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Author: Sunil K Pandey <skpgkp2@gmail.com>
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Date: Sun Feb 27 16:39:47 2022 -0800
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x86_64: Implement evex512 version of strlen, strnlen, wcslen and wcsnlen
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This patch implements following evex512 version of string functions.
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Perf gain for evex512 version is up to 50% as compared to evex,
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depending on length and alignment.
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Placeholder function, not used by any processor at the moment.
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- String length function using 512 bit vectors.
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- String N length using 512 bit vectors.
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- Wide string length using 512 bit vectors.
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- Wide string N length using 512 bit vectors.
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Reviewed-by: Noah Goldstein <goldstein.w.n@gmail.com>
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(cherry picked from commit 9c66efb86fe384f77435f7e326333fb2e4e10676)
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diff --git a/sysdeps/x86_64/multiarch/Makefile b/sysdeps/x86_64/multiarch/Makefile
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index 67401162d526f664..4d4ad2a3686b5bc3 100644
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--- a/sysdeps/x86_64/multiarch/Makefile
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+++ b/sysdeps/x86_64/multiarch/Makefile
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@@ -87,6 +87,7 @@ sysdep_routines += \
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strlen-avx2 \
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strlen-avx2-rtm \
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strlen-evex \
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+ strlen-evex512 \
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strlen-sse2 \
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strncase_l-avx2 \
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strncase_l-avx2-rtm \
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@@ -115,6 +116,7 @@ sysdep_routines += \
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strnlen-avx2 \
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strnlen-avx2-rtm \
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strnlen-evex \
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+ strnlen-evex512 \
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strnlen-sse2 \
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strpbrk-c \
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strpbrk-sse2 \
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@@ -148,6 +150,7 @@ sysdep_routines += \
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wcslen-avx2 \
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wcslen-avx2-rtm \
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wcslen-evex \
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+ wcslen-evex512 \
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wcslen-sse2 \
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wcslen-sse4_1 \
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wcsncmp-avx2 \
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@@ -158,6 +161,7 @@ sysdep_routines += \
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wcsnlen-avx2-rtm \
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wcsnlen-c \
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wcsnlen-evex \
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+ wcsnlen-evex512 \
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wcsnlen-sse4_1 \
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wcsrchr-avx2 \
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wcsrchr-avx2-rtm \
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diff --git a/sysdeps/x86_64/multiarch/ifunc-impl-list.c b/sysdeps/x86_64/multiarch/ifunc-impl-list.c
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index d990a7149489efd9..6b75a7106e174bce 100644
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--- a/sysdeps/x86_64/multiarch/ifunc-impl-list.c
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+++ b/sysdeps/x86_64/multiarch/ifunc-impl-list.c
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@@ -317,6 +317,11 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array,
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&& CPU_FEATURE_USABLE (AVX512BW)
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&& CPU_FEATURE_USABLE (BMI2)),
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__strlen_evex)
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+ IFUNC_IMPL_ADD (array, i, strlen,
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+ (CPU_FEATURE_USABLE (AVX512VL)
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+ && CPU_FEATURE_USABLE (AVX512BW)
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+ && CPU_FEATURE_USABLE (BMI2)),
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+ __strlen_evex512)
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IFUNC_IMPL_ADD (array, i, strlen, 1, __strlen_sse2))
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/* Support sysdeps/x86_64/multiarch/strnlen.c. */
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@@ -335,6 +340,11 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array,
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&& CPU_FEATURE_USABLE (AVX512BW)
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&& CPU_FEATURE_USABLE (BMI2)),
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__strnlen_evex)
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+ IFUNC_IMPL_ADD (array, i, strnlen,
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+ (CPU_FEATURE_USABLE (AVX512VL)
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+ && CPU_FEATURE_USABLE (AVX512BW)
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+ && CPU_FEATURE_USABLE (BMI2)),
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+ __strnlen_evex512)
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IFUNC_IMPL_ADD (array, i, strnlen, 1, __strnlen_sse2))
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/* Support sysdeps/x86_64/multiarch/stpncpy.c. */
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@@ -714,6 +724,11 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array,
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&& CPU_FEATURE_USABLE (AVX512BW)
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&& CPU_FEATURE_USABLE (BMI2)),
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__wcslen_evex)
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+ IFUNC_IMPL_ADD (array, i, wcslen,
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+ (CPU_FEATURE_USABLE (AVX512VL)
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+ && CPU_FEATURE_USABLE (AVX512BW)
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+ && CPU_FEATURE_USABLE (BMI2)),
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+ __wcslen_evex512)
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IFUNC_IMPL_ADD (array, i, wcslen,
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CPU_FEATURE_USABLE (SSE4_1),
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__wcslen_sse4_1)
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@@ -735,6 +750,11 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array,
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&& CPU_FEATURE_USABLE (AVX512BW)
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&& CPU_FEATURE_USABLE (BMI2)),
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__wcsnlen_evex)
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+ IFUNC_IMPL_ADD (array, i, wcsnlen,
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+ (CPU_FEATURE_USABLE (AVX512VL)
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+ && CPU_FEATURE_USABLE (AVX512BW)
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+ && CPU_FEATURE_USABLE (BMI2)),
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+ __wcsnlen_evex512)
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IFUNC_IMPL_ADD (array, i, wcsnlen,
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CPU_FEATURE_USABLE (SSE4_1),
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__wcsnlen_sse4_1)
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diff --git a/sysdeps/x86_64/multiarch/strlen-evex-base.S b/sysdeps/x86_64/multiarch/strlen-evex-base.S
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new file mode 100644
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index 0000000000000000..278c899691d89ba7
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--- /dev/null
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+++ b/sysdeps/x86_64/multiarch/strlen-evex-base.S
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@@ -0,0 +1,302 @@
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+/* Placeholder function, not used by any processor at the moment.
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+ Copyright (C) 2022 Free Software Foundation, Inc.
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+ This file is part of the GNU C Library.
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+
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+ The GNU C Library is free software; you can redistribute it and/or
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+ modify it under the terms of the GNU Lesser General Public
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+ License as published by the Free Software Foundation; either
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+ version 2.1 of the License, or (at your option) any later version.
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+
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+ The GNU C Library is distributed in the hope that it will be useful,
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+ but WITHOUT ANY WARRANTY; without even the implied warranty of
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+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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+ Lesser General Public License for more details.
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+
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+ You should have received a copy of the GNU Lesser General Public
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+ License along with the GNU C Library; if not, see
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+ <https://www.gnu.org/licenses/>. */
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+
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+#if IS_IN (libc)
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+
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+# include <sysdep.h>
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+
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+# ifdef USE_AS_WCSLEN
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+# define VPCMP vpcmpd
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+# define VPTESTN vptestnmd
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+# define VPMINU vpminud
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+# define CHAR_SIZE 4
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+# else
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+# define VPCMP vpcmpb
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+# define VPTESTN vptestnmb
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+# define VPMINU vpminub
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+# define CHAR_SIZE 1
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+# endif
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+
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+# define XMM0 xmm16
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+# define PAGE_SIZE 4096
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+# define CHAR_PER_VEC (VEC_SIZE / CHAR_SIZE)
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+
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+# if VEC_SIZE == 64
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+# define KMOV kmovq
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+# define KORTEST kortestq
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+# define RAX rax
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+# define RCX rcx
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+# define RDX rdx
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+# define SHR shrq
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+# define TEXTSUFFIX evex512
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+# define VMM0 zmm16
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+# define VMM1 zmm17
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+# define VMM2 zmm18
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+# define VMM3 zmm19
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+# define VMM4 zmm20
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+# define VMOVA vmovdqa64
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+# elif VEC_SIZE == 32
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+/* Currently Unused. */
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+# define KMOV kmovd
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+# define KORTEST kortestd
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+# define RAX eax
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+# define RCX ecx
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+# define RDX edx
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+# define SHR shrl
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+# define TEXTSUFFIX evex256
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+# define VMM0 ymm16
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+# define VMM1 ymm17
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+# define VMM2 ymm18
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+# define VMM3 ymm19
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+# define VMM4 ymm20
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+# define VMOVA vmovdqa32
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+# endif
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+
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+ .section .text.TEXTSUFFIX, "ax", @progbits
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+/* Aligning entry point to 64 byte, provides better performance for
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+ one vector length string. */
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+ENTRY_P2ALIGN (STRLEN, 6)
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+# ifdef USE_AS_STRNLEN
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+ /* Check zero length. */
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+ test %RSI_LP, %RSI_LP
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+ jz L(ret_max)
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+# ifdef __ILP32__
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+ /* Clear the upper 32 bits. */
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+ movl %esi, %esi
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+# endif
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+# endif
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+
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+ movl %edi, %eax
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+ vpxorq %XMM0, %XMM0, %XMM0
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+ andl $(PAGE_SIZE - 1), %eax
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+ cmpl $(PAGE_SIZE - VEC_SIZE), %eax
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+ ja L(page_cross)
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+
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+ /* Compare [w]char for null, mask bit will be set for match. */
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+ VPCMP $0, (%rdi), %VMM0, %k0
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+ KMOV %k0, %RAX
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+ test %RAX, %RAX
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+ jz L(align_more)
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+
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+ bsf %RAX, %RAX
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+# ifdef USE_AS_STRNLEN
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+ cmpq %rsi, %rax
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+ cmovnb %rsi, %rax
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+# endif
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+ ret
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+
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+ /* At this point vector max length reached. */
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+# ifdef USE_AS_STRNLEN
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+ .p2align 4,,3
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+L(ret_max):
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+ movq %rsi, %rax
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+ ret
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+# endif
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+
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+L(align_more):
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+ leaq VEC_SIZE(%rdi), %rax
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+ /* Align rax to VEC_SIZE. */
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+ andq $-VEC_SIZE, %rax
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+# ifdef USE_AS_STRNLEN
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+ movq %rax, %rdx
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+ subq %rdi, %rdx
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08c3a6 |
+# ifdef USE_AS_WCSLEN
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+ SHR $2, %RDX
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08c3a6 |
+# endif
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08c3a6 |
+ /* At this point rdx contains [w]chars already compared. */
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+ subq %rsi, %rdx
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+ jae L(ret_max)
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+ negq %rdx
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08c3a6 |
+ /* At this point rdx contains number of w[char] needs to go.
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+ Now onwards rdx will keep decrementing with each compare. */
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08c3a6 |
+# endif
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+
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+ /* Loop unroll 4 times for 4 vector loop. */
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+ VPCMP $0, (%rax), %VMM0, %k0
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+ KMOV %k0, %RCX
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+ test %RCX, %RCX
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08c3a6 |
+ jnz L(ret_vec_x1)
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08c3a6 |
+
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08c3a6 |
+# ifdef USE_AS_STRNLEN
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08c3a6 |
+ subq $CHAR_PER_VEC, %rdx
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08c3a6 |
+ jbe L(ret_max)
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08c3a6 |
+# endif
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+
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+ VPCMP $0, VEC_SIZE(%rax), %VMM0, %k0
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+ KMOV %k0, %RCX
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+ test %RCX, %RCX
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08c3a6 |
+ jnz L(ret_vec_x2)
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08c3a6 |
+
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08c3a6 |
+# ifdef USE_AS_STRNLEN
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08c3a6 |
+ subq $CHAR_PER_VEC, %rdx
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+ jbe L(ret_max)
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08c3a6 |
+# endif
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+
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08c3a6 |
+ VPCMP $0, (VEC_SIZE * 2)(%rax), %VMM0, %k0
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08c3a6 |
+ KMOV %k0, %RCX
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08c3a6 |
+ test %RCX, %RCX
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08c3a6 |
+ jnz L(ret_vec_x3)
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08c3a6 |
+
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08c3a6 |
+# ifdef USE_AS_STRNLEN
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08c3a6 |
+ subq $CHAR_PER_VEC, %rdx
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08c3a6 |
+ jbe L(ret_max)
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08c3a6 |
+# endif
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+
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|
|
08c3a6 |
+ VPCMP $0, (VEC_SIZE * 3)(%rax), %VMM0, %k0
|
|
|
08c3a6 |
+ KMOV %k0, %RCX
|
|
|
08c3a6 |
+ test %RCX, %RCX
|
|
|
08c3a6 |
+ jnz L(ret_vec_x4)
|
|
|
08c3a6 |
+
|
|
|
08c3a6 |
+# ifdef USE_AS_STRNLEN
|
|
|
08c3a6 |
+ subq $CHAR_PER_VEC, %rdx
|
|
|
08c3a6 |
+ jbe L(ret_max)
|
|
|
08c3a6 |
+ /* Save pointer before 4 x VEC_SIZE alignment. */
|
|
|
08c3a6 |
+ movq %rax, %rcx
|
|
|
08c3a6 |
+# endif
|
|
|
08c3a6 |
+
|
|
|
08c3a6 |
+ /* Align address to VEC_SIZE * 4 for loop. */
|
|
|
08c3a6 |
+ andq $-(VEC_SIZE * 4), %rax
|
|
|
08c3a6 |
+
|
|
|
08c3a6 |
+# ifdef USE_AS_STRNLEN
|
|
|
08c3a6 |
+ subq %rax, %rcx
|
|
|
08c3a6 |
+# ifdef USE_AS_WCSLEN
|
|
|
08c3a6 |
+ SHR $2, %RCX
|
|
|
08c3a6 |
+# endif
|
|
|
08c3a6 |
+ /* rcx contains number of [w]char will be recompared due to
|
|
|
08c3a6 |
+ alignment fixes. rdx must be incremented by rcx to offset
|
|
|
08c3a6 |
+ alignment adjustment. */
|
|
|
08c3a6 |
+ addq %rcx, %rdx
|
|
|
08c3a6 |
+ /* Need jump as we don't want to add/subtract rdx for first
|
|
|
08c3a6 |
+ iteration of 4 x VEC_SIZE aligned loop. */
|
|
|
08c3a6 |
+ jmp L(loop_entry)
|
|
|
08c3a6 |
+# endif
|
|
|
08c3a6 |
+
|
|
|
08c3a6 |
+ .p2align 4,,11
|
|
|
08c3a6 |
+L(loop):
|
|
|
08c3a6 |
+# ifdef USE_AS_STRNLEN
|
|
|
08c3a6 |
+ subq $(CHAR_PER_VEC * 4), %rdx
|
|
|
08c3a6 |
+ jbe L(ret_max)
|
|
|
08c3a6 |
+L(loop_entry):
|
|
|
08c3a6 |
+# endif
|
|
|
08c3a6 |
+ /* VPMINU and VPCMP combination provide better performance as
|
|
|
08c3a6 |
+ compared to alternative combinations. */
|
|
|
08c3a6 |
+ VMOVA (VEC_SIZE * 4)(%rax), %VMM1
|
|
|
08c3a6 |
+ VPMINU (VEC_SIZE * 5)(%rax), %VMM1, %VMM2
|
|
|
08c3a6 |
+ VMOVA (VEC_SIZE * 6)(%rax), %VMM3
|
|
|
08c3a6 |
+ VPMINU (VEC_SIZE * 7)(%rax), %VMM3, %VMM4
|
|
|
08c3a6 |
+
|
|
|
08c3a6 |
+ VPTESTN %VMM2, %VMM2, %k0
|
|
|
08c3a6 |
+ VPTESTN %VMM4, %VMM4, %k1
|
|
|
08c3a6 |
+
|
|
|
08c3a6 |
+ subq $-(VEC_SIZE * 4), %rax
|
|
|
08c3a6 |
+ KORTEST %k0, %k1
|
|
|
08c3a6 |
+ jz L(loop)
|
|
|
08c3a6 |
+
|
|
|
08c3a6 |
+ VPTESTN %VMM1, %VMM1, %k2
|
|
|
08c3a6 |
+ KMOV %k2, %RCX
|
|
|
08c3a6 |
+ test %RCX, %RCX
|
|
|
08c3a6 |
+ jnz L(ret_vec_x1)
|
|
|
08c3a6 |
+
|
|
|
08c3a6 |
+ KMOV %k0, %RCX
|
|
|
08c3a6 |
+ /* At this point, if k0 is non zero, null char must be in the
|
|
|
08c3a6 |
+ second vector. */
|
|
|
08c3a6 |
+ test %RCX, %RCX
|
|
|
08c3a6 |
+ jnz L(ret_vec_x2)
|
|
|
08c3a6 |
+
|
|
|
08c3a6 |
+ VPTESTN %VMM3, %VMM3, %k3
|
|
|
08c3a6 |
+ KMOV %k3, %RCX
|
|
|
08c3a6 |
+ test %RCX, %RCX
|
|
|
08c3a6 |
+ jnz L(ret_vec_x3)
|
|
|
08c3a6 |
+ /* At this point null [w]char must be in the fourth vector so no
|
|
|
08c3a6 |
+ need to check. */
|
|
|
08c3a6 |
+ KMOV %k1, %RCX
|
|
|
08c3a6 |
+
|
|
|
08c3a6 |
+ /* Fourth, third, second vector terminating are pretty much
|
|
|
08c3a6 |
+ same, implemented this way to avoid branching and reuse code
|
|
|
08c3a6 |
+ from pre loop exit condition. */
|
|
|
08c3a6 |
+L(ret_vec_x4):
|
|
|
08c3a6 |
+ bsf %RCX, %RCX
|
|
|
08c3a6 |
+ subq %rdi, %rax
|
|
|
08c3a6 |
+# ifdef USE_AS_WCSLEN
|
|
|
08c3a6 |
+ subq $-(VEC_SIZE * 3), %rax
|
|
|
08c3a6 |
+ shrq $2, %rax
|
|
|
08c3a6 |
+ addq %rcx, %rax
|
|
|
08c3a6 |
+# else
|
|
|
08c3a6 |
+ leaq (VEC_SIZE * 3)(%rcx, %rax), %rax
|
|
|
08c3a6 |
+# endif
|
|
|
08c3a6 |
+# ifdef USE_AS_STRNLEN
|
|
|
08c3a6 |
+ cmpq %rsi, %rax
|
|
|
08c3a6 |
+ cmovnb %rsi, %rax
|
|
|
08c3a6 |
+# endif
|
|
|
08c3a6 |
+ ret
|
|
|
08c3a6 |
+
|
|
|
08c3a6 |
+L(ret_vec_x3):
|
|
|
08c3a6 |
+ bsf %RCX, %RCX
|
|
|
08c3a6 |
+ subq %rdi, %rax
|
|
|
08c3a6 |
+# ifdef USE_AS_WCSLEN
|
|
|
08c3a6 |
+ subq $-(VEC_SIZE * 2), %rax
|
|
|
08c3a6 |
+ shrq $2, %rax
|
|
|
08c3a6 |
+ addq %rcx, %rax
|
|
|
08c3a6 |
+# else
|
|
|
08c3a6 |
+ leaq (VEC_SIZE * 2)(%rcx, %rax), %rax
|
|
|
08c3a6 |
+# endif
|
|
|
08c3a6 |
+# ifdef USE_AS_STRNLEN
|
|
|
08c3a6 |
+ cmpq %rsi, %rax
|
|
|
08c3a6 |
+ cmovnb %rsi, %rax
|
|
|
08c3a6 |
+# endif
|
|
|
08c3a6 |
+ ret
|
|
|
08c3a6 |
+
|
|
|
08c3a6 |
+L(ret_vec_x2):
|
|
|
08c3a6 |
+ subq $-VEC_SIZE, %rax
|
|
|
08c3a6 |
+L(ret_vec_x1):
|
|
|
08c3a6 |
+ bsf %RCX, %RCX
|
|
|
08c3a6 |
+ subq %rdi, %rax
|
|
|
08c3a6 |
+# ifdef USE_AS_WCSLEN
|
|
|
08c3a6 |
+ shrq $2, %rax
|
|
|
08c3a6 |
+# endif
|
|
|
08c3a6 |
+ addq %rcx, %rax
|
|
|
08c3a6 |
+# ifdef USE_AS_STRNLEN
|
|
|
08c3a6 |
+ cmpq %rsi, %rax
|
|
|
08c3a6 |
+ cmovnb %rsi, %rax
|
|
|
08c3a6 |
+# endif
|
|
|
08c3a6 |
+ ret
|
|
|
08c3a6 |
+
|
|
|
08c3a6 |
+L(page_cross):
|
|
|
08c3a6 |
+ movl %eax, %ecx
|
|
|
08c3a6 |
+# ifdef USE_AS_WCSLEN
|
|
|
08c3a6 |
+ andl $(VEC_SIZE - 1), %ecx
|
|
|
08c3a6 |
+ sarl $2, %ecx
|
|
|
08c3a6 |
+# endif
|
|
|
08c3a6 |
+ /* ecx contains number of w[char] to be skipped as a result
|
|
|
08c3a6 |
+ of address alignment. */
|
|
|
08c3a6 |
+ xorq %rdi, %rax
|
|
|
08c3a6 |
+ VPCMP $0, (PAGE_SIZE - VEC_SIZE)(%rax), %VMM0, %k0
|
|
|
08c3a6 |
+ KMOV %k0, %RAX
|
|
|
08c3a6 |
+ /* Ignore number of character for alignment adjustment. */
|
|
|
08c3a6 |
+ SHR %cl, %RAX
|
|
|
08c3a6 |
+ jz L(align_more)
|
|
|
08c3a6 |
+
|
|
|
08c3a6 |
+ bsf %RAX, %RAX
|
|
|
08c3a6 |
+# ifdef USE_AS_STRNLEN
|
|
|
08c3a6 |
+ cmpq %rsi, %rax
|
|
|
08c3a6 |
+ cmovnb %rsi, %rax
|
|
|
08c3a6 |
+# endif
|
|
|
08c3a6 |
+ ret
|
|
|
08c3a6 |
+
|
|
|
08c3a6 |
+END (STRLEN)
|
|
|
08c3a6 |
+#endif
|
|
|
08c3a6 |
diff --git a/sysdeps/x86_64/multiarch/strlen-evex512.S b/sysdeps/x86_64/multiarch/strlen-evex512.S
|
|
|
08c3a6 |
new file mode 100644
|
|
|
08c3a6 |
index 0000000000000000..116f8981c8954e2e
|
|
|
08c3a6 |
--- /dev/null
|
|
|
08c3a6 |
+++ b/sysdeps/x86_64/multiarch/strlen-evex512.S
|
|
|
08c3a6 |
@@ -0,0 +1,7 @@
|
|
|
08c3a6 |
+#ifndef STRLEN
|
|
|
08c3a6 |
+# define STRLEN __strlen_evex512
|
|
|
08c3a6 |
+#endif
|
|
|
08c3a6 |
+
|
|
|
08c3a6 |
+#define VEC_SIZE 64
|
|
|
08c3a6 |
+
|
|
|
08c3a6 |
+#include "strlen-evex-base.S"
|
|
|
08c3a6 |
diff --git a/sysdeps/x86_64/multiarch/strnlen-evex512.S b/sysdeps/x86_64/multiarch/strnlen-evex512.S
|
|
|
08c3a6 |
new file mode 100644
|
|
|
08c3a6 |
index 0000000000000000..0b7f220214a7c33c
|
|
|
08c3a6 |
--- /dev/null
|
|
|
08c3a6 |
+++ b/sysdeps/x86_64/multiarch/strnlen-evex512.S
|
|
|
08c3a6 |
@@ -0,0 +1,4 @@
|
|
|
08c3a6 |
+#define STRLEN __strnlen_evex512
|
|
|
08c3a6 |
+#define USE_AS_STRNLEN 1
|
|
|
08c3a6 |
+
|
|
|
08c3a6 |
+#include "strlen-evex512.S"
|
|
|
08c3a6 |
diff --git a/sysdeps/x86_64/multiarch/wcslen-evex512.S b/sysdeps/x86_64/multiarch/wcslen-evex512.S
|
|
|
08c3a6 |
new file mode 100644
|
|
|
08c3a6 |
index 0000000000000000..f59c372b78b4fb8c
|
|
|
08c3a6 |
--- /dev/null
|
|
|
08c3a6 |
+++ b/sysdeps/x86_64/multiarch/wcslen-evex512.S
|
|
|
08c3a6 |
@@ -0,0 +1,4 @@
|
|
|
08c3a6 |
+#define STRLEN __wcslen_evex512
|
|
|
08c3a6 |
+#define USE_AS_WCSLEN 1
|
|
|
08c3a6 |
+
|
|
|
08c3a6 |
+#include "strlen-evex512.S"
|
|
|
08c3a6 |
diff --git a/sysdeps/x86_64/multiarch/wcsnlen-evex512.S b/sysdeps/x86_64/multiarch/wcsnlen-evex512.S
|
|
|
08c3a6 |
new file mode 100644
|
|
|
08c3a6 |
index 0000000000000000..73dcf2f210a85aac
|
|
|
08c3a6 |
--- /dev/null
|
|
|
08c3a6 |
+++ b/sysdeps/x86_64/multiarch/wcsnlen-evex512.S
|
|
|
08c3a6 |
@@ -0,0 +1,5 @@
|
|
|
08c3a6 |
+#define STRLEN __wcsnlen_evex512
|
|
|
08c3a6 |
+#define USE_AS_WCSLEN 1
|
|
|
08c3a6 |
+#define USE_AS_STRNLEN 1
|
|
|
08c3a6 |
+
|
|
|
08c3a6 |
+#include "strlen-evex512.S"
|