From 81174145d5f7b76744c8f635165e88735a944fca Mon Sep 17 00:00:00 2001

From: "H.J. Lu" <hjl.tools@gmail.com>

Date: Wed, 2 Mar 2022 14:45:02 -0800

Subject: [PATCH] x86: Check RTM_ALWAYS_ABORT for RTM [BZ #28033]

From

https://www.intel.com/content/www/us/en/support/articles/000059422/processors.html

* Intel TSX will be disabled by default.

* The processor will force abort all Restricted Transactional Memory (RTM)

  transactions by default.

* A new CPUID bit CPUID.07H.0H.EDX[11](RTM_ALWAYS_ABORT) will be enumerated,

  which is set to indicate to updated software that the loaded microcode is

  forcing RTM abort.

* On processors that enumerate support for RTM, the CPUID enumeration bits

  for Intel TSX (CPUID.07H.0H.EBX[11] and CPUID.07H.0H.EBX[4]) continue to

  be set by default after microcode update.

* Workloads that were benefited from Intel TSX might experience a change

  in performance.

* System software may use a new bit in Model-Specific Register (MSR) 0x10F

  TSX_FORCE_ABORT[TSX_CPUID_CLEAR] functionality to clear the Hardware Lock

  Elision (HLE) and RTM bits to indicate to software that Intel TSX is

  disabled.

1. Add RTM_ALWAYS_ABORT to CPUID features.

2. Set RTM usable only if RTM_ALWAYS_ABORT isn't set.  This skips the

string/tst-memchr-rtm etc. testcases on the affected processors, which

always fail after a microcde update.

3. Check RTM feature, instead of usability, against /proc/cpuinfo.

This fixes BZ #28033.

(cherry picked from commit ea8e465a6b8d0f26c72bcbe453a854de3abf68ec)

---

 manual/platform.texi                    | 3 +++

 sysdeps/x86/cpu-features.c              | 5 ++++-

 sysdeps/x86/sys/platform/x86.h          | 6 +++---

 sysdeps/x86/tst-cpu-features-supports.c | 2 +-

 sysdeps/x86/tst-get-cpu-features.c      | 2 ++

 5 files changed, 13 insertions(+), 5 deletions(-)

diff --git a/manual/platform.texi b/manual/platform.texi

index 8fec2933..b7e8aef7 100644

--- a/manual/platform.texi

+++ b/manual/platform.texi

@@ -510,6 +510,9 @@ capability.

 @item

 @code{RTM} -- RTM instruction extensions.

+@item

+@code{RTM_ALWAYS_ABORT} -- Transactions always abort, making RTM unusable.

+

 @item

 @code{SDBG} -- IA32_DEBUG_INTERFACE MSR for silicon debug.

diff --git a/sysdeps/x86/cpu-features.c b/sysdeps/x86/cpu-features.c

index 3610ee5c..4889f062 100644

--- a/sysdeps/x86/cpu-features.c

+++ b/sysdeps/x86/cpu-features.c

@@ -74,7 +74,6 @@ update_usable (struct cpu_features *cpu_features)

   CPU_FEATURE_SET_USABLE (cpu_features, HLE);

   CPU_FEATURE_SET_USABLE (cpu_features, BMI2);

   CPU_FEATURE_SET_USABLE (cpu_features, ERMS);

-  CPU_FEATURE_SET_USABLE (cpu_features, RTM);

   CPU_FEATURE_SET_USABLE (cpu_features, RDSEED);

   CPU_FEATURE_SET_USABLE (cpu_features, ADX);

   CPU_FEATURE_SET_USABLE (cpu_features, CLFLUSHOPT);

@@ -90,6 +89,7 @@ update_usable (struct cpu_features *cpu_features)

   CPU_FEATURE_SET_USABLE (cpu_features, MOVDIRI);

   CPU_FEATURE_SET_USABLE (cpu_features, MOVDIR64B);

   CPU_FEATURE_SET_USABLE (cpu_features, FSRM);

+  CPU_FEATURE_SET_USABLE (cpu_features, RTM_ALWAYS_ABORT);

   CPU_FEATURE_SET_USABLE (cpu_features, SERIALIZE);

   CPU_FEATURE_SET_USABLE (cpu_features, TSXLDTRK);

   CPU_FEATURE_SET_USABLE (cpu_features, LAHF64_SAHF64);

@@ -779,6 +779,9 @@ no_cpuid:

     GLRO(dl_platform) = "i586";

 #endif

+  if (!CPU_FEATURES_CPU_P (cpu_features, RTM_ALWAYS_ABORT))

+    CPU_FEATURE_SET_USABLE (cpu_features, RTM);

+

 #if CET_ENABLED

 # if HAVE_TUNABLES

   TUNABLE_GET (x86_ibt, tunable_val_t *,

diff --git a/sysdeps/x86/sys/platform/x86.h b/sysdeps/x86/sys/platform/x86.h

index e5cc7c68..7a434926 100644

--- a/sysdeps/x86/sys/platform/x86.h

+++ b/sysdeps/x86/sys/platform/x86.h

@@ -247,7 +247,7 @@ extern const struct cpu_features *__x86_get_cpu_features (unsigned int)

 #define bit_cpu_AVX512_VP2INTERSECT (1u << 8)

 #define bit_cpu_INDEX_7_EDX_9	(1u << 9)

 #define bit_cpu_MD_CLEAR	(1u << 10)

-#define bit_cpu_INDEX_7_EDX_11	(1u << 11)

+#define bit_cpu_RTM_ALWAYS_ABORT (1u << 11)

 #define bit_cpu_INDEX_7_EDX_12	(1u << 12)

 #define bit_cpu_INDEX_7_EDX_13	(1u << 13)

 #define bit_cpu_SERIALIZE	(1u << 14)

@@ -471,7 +471,7 @@ extern const struct cpu_features *__x86_get_cpu_features (unsigned int)

 #define index_cpu_AVX512_VP2INTERSECT COMMON_CPUID_INDEX_7

 #define index_cpu_INDEX_7_EDX_9	COMMON_CPUID_INDEX_7

 #define index_cpu_MD_CLEAR	COMMON_CPUID_INDEX_7

-#define index_cpu_INDEX_7_EDX_11 COMMON_CPUID_INDEX_7

+#define index_cpu_RTM_ALWAYS_ABORT COMMON_CPUID_INDEX_7

 #define index_cpu_INDEX_7_EDX_12 COMMON_CPUID_INDEX_7

 #define index_cpu_INDEX_7_EDX_13 COMMON_CPUID_INDEX_7

 #define index_cpu_SERIALIZE	COMMON_CPUID_INDEX_7

@@ -695,7 +695,7 @@ extern const struct cpu_features *__x86_get_cpu_features (unsigned int)

 #define reg_AVX512_VP2INTERSECT	edx

 #define reg_INDEX_7_EDX_9	edx

 #define reg_MD_CLEAR		edx

-#define reg_INDEX_7_EDX_11	edx

+#define reg_RTM_ALWAYS_ABORT	edx

 #define reg_INDEX_7_EDX_12	edx

 #define reg_INDEX_7_EDX_13	edx

 #define reg_SERIALIZE		edx

diff --git a/sysdeps/x86/tst-cpu-features-supports.c b/sysdeps/x86/tst-cpu-features-supports.c

index 287cf01f..8100a319 100644

--- a/sysdeps/x86/tst-cpu-features-supports.c

+++ b/sysdeps/x86/tst-cpu-features-supports.c

@@ -152,7 +152,7 @@ do_test (int argc, char **argv)

   fails += CHECK_SUPPORTS (rdpid, RDPID);

   fails += CHECK_SUPPORTS (rdrnd, RDRAND);

   fails += CHECK_SUPPORTS (rdseed, RDSEED);

-  fails += CHECK_SUPPORTS (rtm, RTM);

+  fails += CHECK_CPU_SUPPORTS (rtm, RTM);

   fails += CHECK_SUPPORTS (serialize, SERIALIZE);

   fails += CHECK_SUPPORTS (sha, SHA);

   fails += CHECK_CPU_SUPPORTS (shstk, SHSTK);

diff --git a/sysdeps/x86/tst-get-cpu-features.c b/sysdeps/x86/tst-get-cpu-features.c

index 2763deb6..0717e5d8 100644

--- a/sysdeps/x86/tst-get-cpu-features.c

+++ b/sysdeps/x86/tst-get-cpu-features.c

@@ -183,6 +183,7 @@ do_test (void)

   CHECK_CPU_FEATURE (UINTR);

   CHECK_CPU_FEATURE (AVX512_VP2INTERSECT);

   CHECK_CPU_FEATURE (MD_CLEAR);

+  CHECK_CPU_FEATURE (RTM_ALWAYS_ABORT);

   CHECK_CPU_FEATURE (SERIALIZE);

   CHECK_CPU_FEATURE (HYBRID);

   CHECK_CPU_FEATURE (TSXLDTRK);

@@ -344,6 +345,7 @@ do_test (void)

   CHECK_CPU_FEATURE_USABLE (FSRM);

   CHECK_CPU_FEATURE_USABLE (AVX512_VP2INTERSECT);

   CHECK_CPU_FEATURE_USABLE (MD_CLEAR);

+  CHECK_CPU_FEATURE_USABLE (RTM_ALWAYS_ABORT);

   CHECK_CPU_FEATURE_USABLE (SERIALIZE);

   CHECK_CPU_FEATURE_USABLE (HYBRID);

   CHECK_CPU_FEATURE_USABLE (TSXLDTRK);

-- 

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