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From b9d83bf3eb57e1cf8ef785f1a58e13ddf162b6f3 Mon Sep 17 00:00:00 2001
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From: Raphael M Zinsly <rzinsly@linux.ibm.com>
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Date: Thu, 12 Nov 2020 13:12:24 -0300
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Subject: powerpc: Add optimized strncpy for POWER9
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Similar to the strcpy P9 optimization, this version uses VSX to improve
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performance.
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Reviewed-by: Matheus Castanho <msc@linux.ibm.com>
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Reviewed-by: Tulio Magno Quites Machado Filho <tuliom@linux.ibm.com>
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diff --git a/sysdeps/powerpc/powerpc64/le/power9/strncpy.S b/sysdeps/powerpc/powerpc64/le/power9/strncpy.S
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new file mode 100644
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index 0000000000..cbfc37bda3
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--- /dev/null
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+++ b/sysdeps/powerpc/powerpc64/le/power9/strncpy.S
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@@ -0,0 +1,344 @@
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+/* Optimized strncpy implementation for POWER9 LE.
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+ Copyright (C) 2020 Free Software Foundation, Inc.
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+ This file is part of the GNU C Library.
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+
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+ The GNU C Library is free software; you can redistribute it and/or
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+ modify it under the terms of the GNU Lesser General Public
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+ License as published by the Free Software Foundation; either
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+ version 2.1 of the License, or (at your option) any later version.
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+
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+ The GNU C Library is distributed in the hope that it will be useful,
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+ but WITHOUT ANY WARRANTY; without even the implied warranty of
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+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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+ Lesser General Public License for more details.
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+
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+ You should have received a copy of the GNU Lesser General Public
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+ License along with the GNU C Library; if not, see
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+ <https://www.gnu.org/licenses/>. */
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+
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+#include <sysdep.h>
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+
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+# ifndef STRNCPY
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+# define FUNC_NAME strncpy
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+# else
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+# define FUNC_NAME STRNCPY
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8a984d |
+# endif
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+
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8a984d |
+#ifndef MEMSET
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8a984d |
+/* For builds without IFUNC support, local calls should be made to internal
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+ GLIBC symbol (created by libc_hidden_builtin_def). */
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8a984d |
+# ifdef SHARED
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+# define MEMSET_is_local
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+# define MEMSET __GI_memset
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+# else
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8a984d |
+# define MEMSET memset
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8a984d |
+# endif
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+#endif
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+
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8a984d |
+#define FRAMESIZE (FRAME_MIN_SIZE+8)
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+
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+/* Implements the function
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+
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+ char * [r3] strncpy (char *dest [r3], const char *src [r4], size_t n [r5])
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+
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+ The implementation can load bytes past a null terminator, but only
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+ up to the next 16-byte aligned address, so it never crosses a page. */
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+
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+.machine power9
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+#ifdef MEMSET_is_local
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+ENTRY_TOCLESS (FUNC_NAME, 4)
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+#else
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+ENTRY (FUNC_NAME, 4)
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+#endif
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+ CALL_MCOUNT 2
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+
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+ /* NULL string optimizations */
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+ cmpdi r5, 0
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+ beqlr
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+
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+ lbz r0,0(r4)
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+ stb r0,0(r3)
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+ addi r11,r3,1
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+ addi r5,r5,-1
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8a984d |
+ vspltisb v18,0 /* Zeroes in v18 */
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8a984d |
+ cmpdi r0,0
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+ beq L(zero_padding)
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+
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+ /* Empty/1-byte string optimization */
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8a984d |
+ cmpdi r5,0
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+ beqlr
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+
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+ addi r4,r4,1
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8a984d |
+ neg r7,r4
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+ rldicl r9,r7,0,60 /* How many bytes to get source 16B aligned? */
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+
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+ /* Get source 16B aligned */
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+ lvx v0,0,r4
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+ lvsr v1,0,r4
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+ vperm v0,v18,v0,v1
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+
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+ vcmpequb v6,v0,v18 /* 0xff if byte is NULL, 0x00 otherwise */
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+ vctzlsbb r7,v6 /* Number of trailing zeroes */
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+ addi r8,r7,1 /* Add null terminator */
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+
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+ /* r8 = bytes including null
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+ r9 = bytes to get source 16B aligned
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+ if r8 > r9
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+ no null, copy r9 bytes
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+ else
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+ there is a null, copy r8 bytes and return. */
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+ cmpld r8,r9
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+ bgt L(no_null)
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+
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+ cmpld cr6,r8,r5 /* r8 <= n? */
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+ ble cr6,L(null)
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+
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+ sldi r10,r5,56 /* stxvl wants size in top 8 bits */
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+ stxvl 32+v0,r11,r10 /* Partial store */
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+
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+ blr
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+
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+L(null):
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+ sldi r10,r8,56 /* stxvl wants size in top 8 bits */
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+ stxvl 32+v0,r11,r10 /* Partial store */
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+
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+ add r11,r11,r8
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+ sub r5,r5,r8
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+ b L(zero_padding)
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+
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+L(no_null):
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+ cmpld r9,r5 /* Check if length was reached. */
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+ bge L(n_tail1)
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+
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+ sldi r10,r9,56 /* stxvl wants size in top 8 bits */
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+ stxvl 32+v0,r11,r10 /* Partial store */
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+
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+ add r4,r4,r9
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+ add r11,r11,r9
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+ sub r5,r5,r9
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+
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+L(loop):
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+ cmpldi cr6,r5,64 /* Check if length was reached. */
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+ ble cr6,L(final_loop)
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+
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+ lxv 32+v0,0(r4)
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+ vcmpequb. v6,v0,v18 /* Any zero bytes? */
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+ bne cr6,L(prep_tail1)
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+
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+ lxv 32+v1,16(r4)
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+ vcmpequb. v6,v1,v18 /* Any zero bytes? */
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+ bne cr6,L(prep_tail2)
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+
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+ lxv 32+v2,32(r4)
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+ vcmpequb. v6,v2,v18 /* Any zero bytes? */
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+ bne cr6,L(prep_tail3)
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+
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+ lxv 32+v3,48(r4)
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+ vcmpequb. v6,v3,v18 /* Any zero bytes? */
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+ bne cr6,L(prep_tail4)
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+
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+ stxv 32+v0,0(r11)
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+ stxv 32+v1,16(r11)
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+ stxv 32+v2,32(r11)
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+ stxv 32+v3,48(r11)
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+
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+ addi r4,r4,64
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+ addi r11,r11,64
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+ addi r5,r5,-64
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+
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+ b L(loop)
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+
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+L(final_loop):
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+ cmpldi cr5,r5,16
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+ lxv 32+v0,0(r4)
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+ vcmpequb. v6,v0,v18 /* Any zero bytes? */
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+ ble cr5,L(prep_n_tail1)
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+ bne cr6,L(count_tail1)
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+ addi r5,r5,-16
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+
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+ cmpldi cr5,r5,16
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+ lxv 32+v1,16(r4)
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+ vcmpequb. v6,v1,v18 /* Any zero bytes? */
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+ ble cr5,L(prep_n_tail2)
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+ bne cr6,L(count_tail2)
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+ addi r5,r5,-16
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+
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+ cmpldi cr5,r5,16
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+ lxv 32+v2,32(r4)
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+ vcmpequb. v6,v2,v18 /* Any zero bytes? */
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+ ble cr5,L(prep_n_tail3)
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+ bne cr6,L(count_tail3)
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+ addi r5,r5,-16
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+
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+ lxv 32+v3,48(r4)
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+ vcmpequb. v6,v3,v18 /* Any zero bytes? */
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+ beq cr6,L(n_tail4)
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+
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+ vctzlsbb r8,v6 /* Number of trailing zeroes */
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+ cmpld r8,r5 /* r8 < n? */
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+ blt L(tail4)
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+
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+L(n_tail4):
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+ stxv 32+v0,0(r11)
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+ stxv 32+v1,16(r11)
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8a984d |
+ stxv 32+v2,32(r11)
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8a984d |
+ sldi r10,r5,56 /* stxvl wants size in top 8 bits */
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8a984d |
+ addi r11,r11,48 /* Offset */
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8a984d |
+ stxvl 32+v3,r11,r10 /* Partial store */
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8a984d |
+ blr
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+
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+L(prep_n_tail1):
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+ beq cr6,L(n_tail1) /* Any zero bytes? */
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8a984d |
+ vctzlsbb r8,v6 /* Number of trailing zeroes */
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8a984d |
+ cmpld r8,r5 /* r8 < n? */
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8a984d |
+ blt L(tail1)
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8a984d |
+
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+L(n_tail1):
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8a984d |
+ sldi r10,r5,56 /* stxvl wants size in top 8 bits */
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8a984d |
+ stxvl 32+v0,r11,r10 /* Partial store */
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8a984d |
+ blr
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8a984d |
+
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8a984d |
+L(prep_n_tail2):
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8a984d |
+ beq cr6,L(n_tail2) /* Any zero bytes? */
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8a984d |
+ vctzlsbb r8,v6 /* Number of trailing zeroes */
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8a984d |
+ cmpld r8,r5 /* r8 < n? */
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8a984d |
+ blt L(tail2)
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8a984d |
+
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+L(n_tail2):
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8a984d |
+ stxv 32+v0,0(r11)
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8a984d |
+ sldi r10,r5,56 /* stxvl wants size in top 8 bits */
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8a984d |
+ addi r11,r11,16 /* offset */
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8a984d |
+ stxvl 32+v1,r11,r10 /* Partial store */
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8a984d |
+ blr
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8a984d |
+
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8a984d |
+L(prep_n_tail3):
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8a984d |
+ beq cr6,L(n_tail3) /* Any zero bytes? */
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8a984d |
+ vctzlsbb r8,v6 /* Number of trailing zeroes */
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8a984d |
+ cmpld r8,r5 /* r8 < n? */
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8a984d |
+ blt L(tail3)
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8a984d |
+
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8a984d |
+L(n_tail3):
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8a984d |
+ stxv 32+v0,0(r11)
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8a984d |
+ stxv 32+v1,16(r11)
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8a984d |
+ sldi r10,r5,56 /* stxvl wants size in top 8 bits */
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8a984d |
+ addi r11,r11,32 /* Offset */
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8a984d |
+ stxvl 32+v2,r11,r10 /* Partial store */
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8a984d |
+ blr
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8a984d |
+
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8a984d |
+L(prep_tail1):
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8a984d |
+L(count_tail1):
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8a984d |
+ vctzlsbb r8,v6 /* Number of trailing zeroes */
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8a984d |
+L(tail1):
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8a984d |
+ addi r9,r8,1 /* Add null terminator */
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8a984d |
+ sldi r10,r9,56 /* stxvl wants size in top 8 bits */
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8a984d |
+ stxvl 32+v0,r11,r10 /* Partial store */
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8a984d |
+ add r11,r11,r9
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8a984d |
+ sub r5,r5,r9
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8a984d |
+ b L(zero_padding)
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8a984d |
+
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8a984d |
+L(prep_tail2):
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8a984d |
+ addi r5,r5,-16
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8a984d |
+L(count_tail2):
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8a984d |
+ vctzlsbb r8,v6 /* Number of trailing zeroes */
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8a984d |
+L(tail2):
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8a984d |
+ addi r9,r8,1 /* Add null terminator */
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8a984d |
+ stxv 32+v0,0(r11)
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8a984d |
+ sldi r10,r9,56 /* stxvl wants size in top 8 bits */
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8a984d |
+ addi r11,r11,16 /* offset */
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8a984d |
+ stxvl 32+v1,r11,r10 /* Partial store */
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8a984d |
+ add r11,r11,r9
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8a984d |
+ sub r5,r5,r9
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8a984d |
+ b L(zero_padding)
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8a984d |
+
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8a984d |
+L(prep_tail3):
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8a984d |
+ addi r5,r5,-32
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8a984d |
+L(count_tail3):
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8a984d |
+ vctzlsbb r8,v6 /* Number of trailing zeroes */
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8a984d |
+L(tail3):
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8a984d |
+ addi r9,r8,1 /* Add null terminator */
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8a984d |
+ stxv 32+v0,0(r11)
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8a984d |
+ stxv 32+v1,16(r11)
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|
8a984d |
+ sldi r10,r9,56 /* stxvl wants size in top 8 bits */
|
|
|
8a984d |
+ addi r11,r11,32 /* offset */
|
|
|
8a984d |
+ stxvl 32+v2,r11,r10 /* Partial store */
|
|
|
8a984d |
+ add r11,r11,r9
|
|
|
8a984d |
+ sub r5,r5,r9
|
|
|
8a984d |
+ b L(zero_padding)
|
|
|
8a984d |
+
|
|
|
8a984d |
+L(prep_tail4):
|
|
|
8a984d |
+ addi r5,r5,-48
|
|
|
8a984d |
+ vctzlsbb r8,v6 /* Number of trailing zeroes */
|
|
|
8a984d |
+L(tail4):
|
|
|
8a984d |
+ addi r9,r8,1 /* Add null terminator */
|
|
|
8a984d |
+ stxv 32+v0,0(r11)
|
|
|
8a984d |
+ stxv 32+v1,16(r11)
|
|
|
8a984d |
+ stxv 32+v2,32(r11)
|
|
|
8a984d |
+ sldi r10,r9,56 /* stxvl wants size in top 8 bits */
|
|
|
8a984d |
+ addi r11,r11,48 /* offset */
|
|
|
8a984d |
+ stxvl 32+v3,r11,r10 /* Partial store */
|
|
|
8a984d |
+ add r11,r11,r9
|
|
|
8a984d |
+ sub r5,r5,r9
|
|
|
8a984d |
+
|
|
|
8a984d |
+/* This code pads the remainder of dest with NULL bytes. For large numbers
|
|
|
8a984d |
+ memset gives a better performance, 255 was chosen through experimentation.
|
|
|
8a984d |
+ */
|
|
|
8a984d |
+L(zero_padding):
|
|
|
8a984d |
+ cmpldi r5,255
|
|
|
8a984d |
+ bge L(zero_padding_memset)
|
|
|
8a984d |
+
|
|
|
8a984d |
+L(zero_padding_loop):
|
|
|
8a984d |
+ cmpldi cr6,r5,16 /* Check if length was reached. */
|
|
|
8a984d |
+ ble cr6,L(zero_padding_end)
|
|
|
8a984d |
+
|
|
|
8a984d |
+ stxv v18,0(r11)
|
|
|
8a984d |
+ addi r11,r11,16
|
|
|
8a984d |
+ addi r5,r5,-16
|
|
|
8a984d |
+
|
|
|
8a984d |
+ b L(zero_padding_loop)
|
|
|
8a984d |
+
|
|
|
8a984d |
+L(zero_padding_end):
|
|
|
8a984d |
+ sldi r10,r5,56 /* stxvl wants size in top 8 bits */
|
|
|
8a984d |
+ stxvl v18,r11,r10 /* Partial store */
|
|
|
8a984d |
+ blr
|
|
|
8a984d |
+
|
|
|
8a984d |
+ .align 4
|
|
|
8a984d |
+L(zero_padding_memset):
|
|
|
8a984d |
+ std r30,-8(r1) /* Save r30 on the stack. */
|
|
|
8a984d |
+ cfi_offset(r30, -8)
|
|
|
8a984d |
+ mr r30,r3 /* Save the return value of strncpy. */
|
|
|
8a984d |
+ /* Prepare the call to memset. */
|
|
|
8a984d |
+ mr r3,r11 /* Pointer to the area to be zero-filled. */
|
|
|
8a984d |
+ li r4,0 /* Byte to be written (zero). */
|
|
|
8a984d |
+
|
|
|
8a984d |
+ /* We delayed the creation of the stack frame, as well as the saving of
|
|
|
8a984d |
+ the link register, because only at this point, we are sure that
|
|
|
8a984d |
+ doing so is actually needed. */
|
|
|
8a984d |
+
|
|
|
8a984d |
+ /* Save the link register. */
|
|
|
8a984d |
+ mflr r0
|
|
|
8a984d |
+ std r0,16(r1)
|
|
|
8a984d |
+
|
|
|
8a984d |
+ /* Create the stack frame. */
|
|
|
8a984d |
+ stdu r1,-FRAMESIZE(r1)
|
|
|
8a984d |
+ cfi_adjust_cfa_offset(FRAMESIZE)
|
|
|
8a984d |
+ cfi_offset(lr, 16)
|
|
|
8a984d |
+
|
|
|
8a984d |
+ bl MEMSET
|
|
|
8a984d |
+#ifndef MEMSET_is_local
|
|
|
8a984d |
+ nop
|
|
|
8a984d |
+#endif
|
|
|
8a984d |
+
|
|
|
8a984d |
+ ld r0,FRAMESIZE+16(r1)
|
|
|
8a984d |
+
|
|
|
8a984d |
+ mr r3,r30 /* Restore the return value of strncpy, i.e.:
|
|
|
8a984d |
+ dest. */
|
|
|
8a984d |
+ ld r30,FRAMESIZE-8(r1) /* Restore r30. */
|
|
|
8a984d |
+ /* Restore the stack frame. */
|
|
|
8a984d |
+ addi r1,r1,FRAMESIZE
|
|
|
8a984d |
+ cfi_adjust_cfa_offset(-FRAMESIZE)
|
|
|
8a984d |
+ /* Restore the link register. */
|
|
|
8a984d |
+ mtlr r0
|
|
|
8a984d |
+ cfi_restore(lr)
|
|
|
8a984d |
+ blr
|
|
|
8a984d |
+
|
|
|
8a984d |
+END (FUNC_NAME)
|
|
|
8a984d |
diff --git a/sysdeps/powerpc/powerpc64/multiarch/Makefile b/sysdeps/powerpc/powerpc64/multiarch/Makefile
|
|
|
8a984d |
index 19acb6c64a..cd2b47b403 100644
|
|
|
8a984d |
--- a/sysdeps/powerpc/powerpc64/multiarch/Makefile
|
|
|
8a984d |
+++ b/sysdeps/powerpc/powerpc64/multiarch/Makefile
|
|
|
8a984d |
@@ -33,7 +33,7 @@ sysdep_routines += memcpy-power8-cached memcpy-power7 memcpy-a2 memcpy-power6 \
|
|
|
8a984d |
|
|
|
8a984d |
ifneq (,$(filter %le,$(config-machine)))
|
|
|
8a984d |
sysdep_routines += strcmp-power9 strncmp-power9 strcpy-power9 stpcpy-power9 \
|
|
|
8a984d |
- rawmemchr-power9 strlen-power9
|
|
|
8a984d |
+ rawmemchr-power9 strlen-power9 strncpy-power9
|
|
|
8a984d |
endif
|
|
|
8a984d |
CFLAGS-strncase-power7.c += -mcpu=power7 -funroll-loops
|
|
|
8a984d |
CFLAGS-strncase_l-power7.c += -mcpu=power7 -funroll-loops
|
|
|
8a984d |
diff --git a/sysdeps/powerpc/powerpc64/multiarch/ifunc-impl-list.c b/sysdeps/powerpc/powerpc64/multiarch/ifunc-impl-list.c
|
|
|
8a984d |
index dd54e7d6bb..135326c97a 100644
|
|
|
8a984d |
--- a/sysdeps/powerpc/powerpc64/multiarch/ifunc-impl-list.c
|
|
|
8a984d |
+++ b/sysdeps/powerpc/powerpc64/multiarch/ifunc-impl-list.c
|
|
|
8a984d |
@@ -301,6 +301,12 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array,
|
|
|
8a984d |
|
|
|
8a984d |
/* Support sysdeps/powerpc/powerpc64/multiarch/strncpy.c. */
|
|
|
8a984d |
IFUNC_IMPL (i, name, strncpy,
|
|
|
8a984d |
+#ifdef __LITTLE_ENDIAN__
|
|
|
8a984d |
+ IFUNC_IMPL_ADD (array, i, strncpy,
|
|
|
8a984d |
+ (hwcap2 & PPC_FEATURE2_ARCH_3_00)
|
|
|
8a984d |
+ && (hwcap & PPC_FEATURE_HAS_VSX),
|
|
|
8a984d |
+ __strncpy_power9)
|
|
|
8a984d |
+#endif
|
|
|
8a984d |
IFUNC_IMPL_ADD (array, i, strncpy,
|
|
|
8a984d |
hwcap2 & PPC_FEATURE2_ARCH_2_07,
|
|
|
8a984d |
__strncpy_power8)
|
|
|
8a984d |
diff --git a/sysdeps/powerpc/powerpc64/multiarch/strncpy-power9.S b/sysdeps/powerpc/powerpc64/multiarch/strncpy-power9.S
|
|
|
8a984d |
new file mode 100644
|
|
|
8a984d |
index 0000000000..2b57c190f5
|
|
|
8a984d |
--- /dev/null
|
|
|
8a984d |
+++ b/sysdeps/powerpc/powerpc64/multiarch/strncpy-power9.S
|
|
|
8a984d |
@@ -0,0 +1,32 @@
|
|
|
8a984d |
+/* Optimized strncpy implementation for POWER9 LE.
|
|
|
8a984d |
+ Copyright (C) 2020 Free Software Foundation, Inc.
|
|
|
8a984d |
+ This file is part of the GNU C Library.
|
|
|
8a984d |
+
|
|
|
8a984d |
+ The GNU C Library is free software; you can redistribute it and/or
|
|
|
8a984d |
+ modify it under the terms of the GNU Lesser General Public
|
|
|
8a984d |
+ License as published by the Free Software Foundation; either
|
|
|
8a984d |
+ version 2.1 of the License, or (at your option) any later version.
|
|
|
8a984d |
+
|
|
|
8a984d |
+ The GNU C Library is distributed in the hope that it will be useful,
|
|
|
8a984d |
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
|
8a984d |
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
|
|
8a984d |
+ Lesser General Public License for more details.
|
|
|
8a984d |
+
|
|
|
8a984d |
+ You should have received a copy of the GNU Lesser General Public
|
|
|
8a984d |
+ License along with the GNU C Library; if not, see
|
|
|
8a984d |
+ <https://www.gnu.org/licenses/>. */
|
|
|
8a984d |
+
|
|
|
8a984d |
+#if defined __LITTLE_ENDIAN__ && IS_IN (libc)
|
|
|
8a984d |
+# define STRNCPY __strncpy_power9
|
|
|
8a984d |
+
|
|
|
8a984d |
+# undef libc_hidden_builtin_def
|
|
|
8a984d |
+# define libc_hidden_builtin_def(name)
|
|
|
8a984d |
+
|
|
|
8a984d |
+/* memset is used to pad the end of the string. */
|
|
|
8a984d |
+# define MEMSET __memset_power8
|
|
|
8a984d |
+# ifdef SHARED
|
|
|
8a984d |
+# define MEMSET_is_local
|
|
|
8a984d |
+# endif
|
|
|
8a984d |
+
|
|
|
8a984d |
+# include <sysdeps/powerpc/powerpc64/le/power9/strncpy.S>
|
|
|
8a984d |
+#endif
|
|
|
8a984d |
diff --git a/sysdeps/powerpc/powerpc64/multiarch/strncpy.c b/sysdeps/powerpc/powerpc64/multiarch/strncpy.c
|
|
|
8a984d |
index 7bacf28aca..af8b6cdd9c 100644
|
|
|
8a984d |
--- a/sysdeps/powerpc/powerpc64/multiarch/strncpy.c
|
|
|
8a984d |
+++ b/sysdeps/powerpc/powerpc64/multiarch/strncpy.c
|
|
|
8a984d |
@@ -28,11 +28,19 @@
|
|
|
8a984d |
extern __typeof (strncpy) __strncpy_ppc attribute_hidden;
|
|
|
8a984d |
extern __typeof (strncpy) __strncpy_power7 attribute_hidden;
|
|
|
8a984d |
extern __typeof (strncpy) __strncpy_power8 attribute_hidden;
|
|
|
8a984d |
+# ifdef __LITTLE_ENDIAN__
|
|
|
8a984d |
+extern __typeof (strncpy) __strncpy_power9 attribute_hidden;
|
|
|
8a984d |
+# endif
|
|
|
8a984d |
# undef strncpy
|
|
|
8a984d |
|
|
|
8a984d |
/* Avoid DWARF definition DIE on ifunc symbol so that GDB can handle
|
|
|
8a984d |
ifunc symbol properly. */
|
|
|
8a984d |
libc_ifunc_redirected (__redirect_strncpy, strncpy,
|
|
|
8a984d |
+# ifdef __LITTLE_ENDIAN__
|
|
|
8a984d |
+ (hwcap2 & PPC_FEATURE2_ARCH_3_00) &&
|
|
|
8a984d |
+ (hwcap & PPC_FEATURE_HAS_VSX)
|
|
|
8a984d |
+ ? __strncpy_power9 :
|
|
|
8a984d |
+# endif
|
|
|
8a984d |
(hwcap2 & PPC_FEATURE2_ARCH_2_07)
|
|
|
8a984d |
? __strncpy_power8
|
|
|
8a984d |
: (hwcap & PPC_FEATURE_HAS_VSX)
|