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commit e156dabc766d6f6f99ce9402999eae380a3ec1f2
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Author: Szabolcs Nagy <szabolcs.nagy@arm.com>
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Date:   Mon Oct 26 15:48:01 2020 +0000
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    aarch64: Add variant PCS lazy binding test [BZ #26798]
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    This test fails without bug 26798 fixed because some integer registers
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    likely get clobbered by lazy binding and variant PCS only allows x16
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    and x17 to be clobbered at call time.
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    The test requires binutils 2.32.1 or newer for handling variant PCS
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    symbols. SVE registers are not covered by this test, to avoid the
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    complexity of handling multiple compile- and runtime feature support
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    cases.
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(Trivial textual conflicts due to lack of PAC and BTI support)
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# Conflicts:
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#	sysdeps/aarch64/Makefile
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#	sysdeps/aarch64/configure
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#	sysdeps/aarch64/configure.ac
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diff --git a/sysdeps/aarch64/Makefile b/sysdeps/aarch64/Makefile
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index 94baaf52dda4b801..3ec78fefc6dd5797 100644
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--- a/sysdeps/aarch64/Makefile
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+++ b/sysdeps/aarch64/Makefile
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@@ -3,6 +3,13 @@ long-double-fcts = yes
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 ifeq ($(subdir),elf)
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 sysdep-dl-routines += tlsdesc dl-tlsdesc
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 gen-as-const-headers += dl-link.sym
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+
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+ifeq (yes,$(aarch64-variant-pcs))
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+tests += tst-vpcs
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+modules-names += tst-vpcs-mod
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+LDFLAGS-tst-vpcs-mod.so = -Wl,-z,lazy
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+$(objpfx)tst-vpcs: $(objpfx)tst-vpcs-mod.so
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+endif
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 endif
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 ifeq ($(subdir),csu)
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diff --git a/sysdeps/aarch64/configure b/sysdeps/aarch64/configure
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index 5bd355a6917df365..f78a79338aba1e34 100644
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--- a/sysdeps/aarch64/configure
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+++ b/sysdeps/aarch64/configure
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@@ -172,3 +172,43 @@ else
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   config_vars="$config_vars
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 default-abi = lp64"
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 fi
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+
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+# Check if binutils supports variant PCS symbols.
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+{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for variant PCS support" >&5
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+$as_echo_n "checking for variant PCS support... " >&6; }
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+if ${libc_cv_aarch64_variant_pcs+:} false; then :
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+  $as_echo_n "(cached) " >&6
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+else
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+    cat > conftest.S <
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+.global foo
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+.type foo, %function
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+.variant_pcs foo
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+foo:
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+	ret
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+.global bar
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+.type bar, %function
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+bar:
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+	b foo
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+EOF
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+  libc_cv_aarch64_variant_pcs=no
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+  if { ac_try='${CC-cc} $CFLAGS $CPPFLAGS $LDFLAGS -nostdlib -nostartfiles $no_ssp -shared -fPIC -o conftest.so conftest.S'
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+  { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$ac_try\""; } >&5
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+  (eval $ac_try) 2>&5
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+  ac_status=$?
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+  $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5
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+  test $ac_status = 0; }; } \
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+     && { ac_try='$READELF -dW conftest.so | grep -q AARCH64_VARIANT_PCS'
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+  { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$ac_try\""; } >&5
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+  (eval $ac_try) 2>&5
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+  ac_status=$?
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+  $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5
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+  test $ac_status = 0; }; }
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+  then
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+    libc_cv_aarch64_variant_pcs=yes
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+  fi
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+  rm -rf conftest.*
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+fi
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+{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $libc_cv_aarch64_variant_pcs" >&5
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+$as_echo "$libc_cv_aarch64_variant_pcs" >&6; }
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+config_vars="$config_vars
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+aarch64-variant-pcs = $libc_cv_aarch64_variant_pcs"
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diff --git a/sysdeps/aarch64/configure.ac b/sysdeps/aarch64/configure.ac
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index 7851dd4dac345b2a..7f13bfb93b60bfd7 100644
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--- a/sysdeps/aarch64/configure.ac
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+++ b/sysdeps/aarch64/configure.ac
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@@ -20,3 +20,25 @@ if test $libc_cv_aarch64_be = yes; then
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 else
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   LIBC_CONFIG_VAR([default-abi], [lp64])
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 fi
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+
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+# Check if binutils supports variant PCS symbols.
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+AC_CACHE_CHECK([for variant PCS support], [libc_cv_aarch64_variant_pcs], [dnl
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+  cat > conftest.S <
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+.global foo
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+.type foo, %function
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+.variant_pcs foo
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+foo:
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+	ret
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+.global bar
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+.type bar, %function
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+bar:
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+	b foo
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+EOF
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+  libc_cv_aarch64_variant_pcs=no
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+  if AC_TRY_COMMAND([${CC-cc} $CFLAGS $CPPFLAGS $LDFLAGS -nostdlib -nostartfiles $no_ssp -shared -fPIC -o conftest.so conftest.S]) \
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+     && AC_TRY_COMMAND([$READELF -dW conftest.so | grep -q AARCH64_VARIANT_PCS])
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+  then
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+    libc_cv_aarch64_variant_pcs=yes
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+  fi
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+  rm -rf conftest.*])
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+LIBC_CONFIG_VAR([aarch64-variant-pcs], [$libc_cv_aarch64_variant_pcs])
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diff --git a/sysdeps/aarch64/tst-vpcs-mod.S b/sysdeps/aarch64/tst-vpcs-mod.S
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new file mode 100644
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index 0000000000000000..b2642ba030daaca7
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--- /dev/null
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+++ b/sysdeps/aarch64/tst-vpcs-mod.S
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@@ -0,0 +1,141 @@
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+/* Record the register state before and after a variant PCS call.
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+   Copyright (C) 2020 Free Software Foundation, Inc.
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+
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+   This file is part of the GNU C Library.
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+
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+   The GNU C Library is free software; you can redistribute it and/or
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+   modify it under the terms of the GNU Lesser General Public License as
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+   published by the Free Software Foundation; either version 2.1 of the
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+   License, or (at your option) any later version.
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+
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+   The GNU C Library is distributed in the hope that it will be useful,
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+   but WITHOUT ANY WARRANTY; without even the implied warranty of
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+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
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+   Lesser General Public License for more details.
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+
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+   You should have received a copy of the GNU Lesser General Public
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+   License along with the GNU C Library.  If not, see
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+   <https://www.gnu.org/licenses/>.  */
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+
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+	.variant_pcs	vpcs_call
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+	.global	vpcs_call
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+	.type	vpcs_call, %function
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+vpcs_call:
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+	.cfi_startproc
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+	hint	34 /* bti c.  */
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+
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+	/* Save register state to *x0.  */
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+	stp	x0, x1, [x0]
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+	stp	x2, x3, [x0, 16]
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+	stp	x4, x5, [x0, 32]
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+	stp	x6, x7, [x0, 48]
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+	stp	x8, x9, [x0, 64]
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+	stp	x10, x11, [x0, 80]
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+	stp	x12, x13, [x0, 96]
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+	stp	x14, x15, [x0, 112]
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+	stp	x16, x17, [x0, 128]
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+	stp	x18, x19, [x0, 144]
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+	stp	x20, x21, [x0, 160]
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+	stp	x22, x23, [x0, 176]
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+	stp	x24, x25, [x0, 192]
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+	stp	x26, x27, [x0, 208]
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+	stp	x28, x29, [x0, 224]
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+	mov	x1, sp
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+	stp	x30, x1, [x0, 240]
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+	stp	q0, q1, [x0, 256]
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+	stp	q2, q3, [x0, 288]
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+	stp	q4, q5, [x0, 320]
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+	stp	q6, q7, [x0, 352]
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+	stp	q8, q9, [x0, 384]
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+	stp	q10, q11, [x0, 416]
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+	stp	q12, q13, [x0, 448]
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+	stp	q14, q15, [x0, 480]
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+	stp	q16, q17, [x0, 512]
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+	stp	q18, q19, [x0, 544]
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+	stp	q20, q21, [x0, 576]
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+	stp	q22, q23, [x0, 608]
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+	stp	q24, q25, [x0, 640]
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+	stp	q26, q27, [x0, 672]
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+	stp	q28, q29, [x0, 704]
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+	stp	q30, q31, [x0, 736]
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+	ret
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+	.cfi_endproc
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+	.size	vpcs_call, .-vpcs_call
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+
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+	.global	vpcs_call_regs
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+	.type	vpcs_call_regs, %function
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+vpcs_call_regs:
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+	.cfi_startproc
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+	hint	34 /* bti c.  */
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+
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+	stp     x29, x30, [sp, -160]!
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+	mov     x29, sp
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+
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+	/* Save callee-saved registers.  */
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+	stp	x19, x20, [sp, 16]
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+	stp	x21, x22, [sp, 32]
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+	stp	x23, x24, [sp, 48]
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+	stp	x25, x26, [sp, 64]
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+	stp	x27, x28, [sp, 80]
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+	stp	d8, d9, [sp, 96]
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+	stp	d10, d11, [sp, 112]
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+	stp	d12, d13, [sp, 128]
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+	stp	d14, d15, [sp, 144]
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+
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+	/* Initialize most registers from *x1, and save x0, x1, x29, x30,
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+	   and sp (== x29), so *x1 contains the register state.  */
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+	stp	x0, x1, [x1]
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+	str	x29, [x1, 232]
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+	ldp	x2, x3, [x1, 16]
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+	ldp	x4, x5, [x1, 32]
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+	ldp	x6, x7, [x1, 48]
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+	ldp	x8, x9, [x1, 64]
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+	ldp	x10, x11, [x1, 80]
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+	ldp	x12, x13, [x1, 96]
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+	ldp	x14, x15, [x1, 112]
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+	ldp	x16, x17, [x1, 128]
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+	ldp	x18, x19, [x1, 144]
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+	ldp	x20, x21, [x1, 160]
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+	ldp	x22, x23, [x1, 176]
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+	ldp	x24, x25, [x1, 192]
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+	ldp	x26, x27, [x1, 208]
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+	ldr	x28, [x1, 224]
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+	/* Skip x29, x30, sp.  */
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+	ldp	q0, q1, [x1, 256]
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+	ldp	q2, q3, [x1, 288]
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+	ldp	q4, q5, [x1, 320]
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+	ldp	q6, q7, [x1, 352]
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+	ldp	q8, q9, [x1, 384]
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+	ldp	q10, q11, [x1, 416]
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+	ldp	q12, q13, [x1, 448]
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+	ldp	q14, q15, [x1, 480]
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+	ldp	q16, q17, [x1, 512]
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+	ldp	q18, q19, [x1, 544]
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+	ldp	q20, q21, [x1, 576]
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+	ldp	q22, q23, [x1, 608]
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+	ldp	q24, q25, [x1, 640]
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+	ldp	q26, q27, [x1, 672]
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+	ldp	q28, q29, [x1, 704]
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+	ldp	q30, q31, [x1, 736]
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+
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+	/* Emulate a BL using B, but save x30 before the branch.  */
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+	adr	x30, .L_return_addr
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+	stp	x30, x29, [x1, 240]
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+	b	vpcs_call
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+.L_return_addr:
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+
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+	/* Restore callee-saved registers.  */
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+	ldp	x19, x20, [sp, 16]
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+	ldp	x21, x22, [sp, 32]
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+	ldp	x23, x24, [sp, 48]
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+	ldp	x25, x26, [sp, 64]
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+	ldp	x27, x28, [sp, 80]
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+	ldp	d8, d9, [sp, 96]
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+	ldp	d10, d11, [sp, 112]
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+	ldp	d12, d13, [sp, 128]
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+	ldp	d14, d15, [sp, 144]
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+
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+	ldp     x29, x30, [sp], 160
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+	ret
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+	.cfi_endproc
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+	.size	vpcs_call_regs, .-vpcs_call_regs
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diff --git a/sysdeps/aarch64/tst-vpcs.c b/sysdeps/aarch64/tst-vpcs.c
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new file mode 100644
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index 0000000000000000..92a701eb7cdea8ac
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--- /dev/null
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+++ b/sysdeps/aarch64/tst-vpcs.c
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@@ -0,0 +1,78 @@
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+/* Test that variant PCS calls don't clobber registers with lazy binding.
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+   Copyright (C) 2020 Free Software Foundation, Inc.
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+   This file is part of the GNU C Library.
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+
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+   The GNU C Library is free software; you can redistribute it and/or
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+   modify it under the terms of the GNU Lesser General Public
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+   License as published by the Free Software Foundation; either
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+   version 2.1 of the License, or (at your option) any later version.
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+
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+   The GNU C Library is distributed in the hope that it will be useful,
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+   but WITHOUT ANY WARRANTY; without even the implied warranty of
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+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
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+   Lesser General Public License for more details.
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+
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+   You should have received a copy of the GNU Lesser General Public
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+   License along with the GNU C Library; if not, see
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+   <https://www.gnu.org/licenses/>.  */
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+
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+#include <stdint.h>
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+#include <stdio.h>
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+#include <support/check.h>
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+
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+struct regs
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+{
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+  uint64_t x[32];
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+  union {
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+    long double q[32];
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+    uint64_t u[64];
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+  } v;
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+};
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+
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+/* Gives the registers in the caller and callee around a variant PCS call.
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+   Most registers are initialized from BEFORE in the caller so they can
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+   have values that likely show clobbers.  Register state extensions such
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+   as SVE is not covered here, only the base registers.  */
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+void vpcs_call_regs (struct regs *after, struct regs *before);
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+
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+static int
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+do_test (void)
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+{
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+  struct regs before, after;
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+  int err = 0;
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+
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+  unsigned char *p = (unsigned char *)&before;
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+  for (int i = 0; i < sizeof before; i++)
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+    p[i] = i & 0xff;
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+
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+  vpcs_call_regs (&after, &before);
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+
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+  for (int i = 0; i < 32; i++)
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+    if (before.x[i] != after.x[i])
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+      {
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+	if (i == 16 || i == 17)
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+	  /* Variant PCS allows clobbering x16 and x17.  */
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+	  continue;
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+	err++;
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+	printf ("x%d: before: 0x%016llx after: 0x%016llx\n",
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+	  i,
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+	  (unsigned long long)before.x[i],
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+	  (unsigned long long)after.x[i]);
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+      }
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+  for (int i = 0; i < 64; i++)
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+    if (before.v.u[i] != after.v.u[i])
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+      {
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+	err++;
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+	printf ("v%d: before: 0x%016llx %016llx after: 0x%016llx %016llx\n",
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+	  i/2,
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+	  (unsigned long long)before.v.u[2*(i/2)+1],
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+	  (unsigned long long)before.v.u[2*(i/2)],
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+	  (unsigned long long)after.v.u[2*(i/2)+1],
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+	  (unsigned long long)after.v.u[2*(i/2)]);
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+      }
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+  if (err)
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+    FAIL_EXIT1 ("The variant PCS call clobbered %d registers.\n", err);
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+  return 0;
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+}
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+
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+#include <support/test-driver.c>