Blame SOURCES/glibc-rh1871395-2.patch
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commit 1d21fb1061cbeb50414a8f371abb36548d90f150
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Author: Stefan Liebler <stli@linux.ibm.com>
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Date: Fri Jun 26 09:45:11 2020 +0200
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S390: Optimize __memset_z196.
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It turned out that an 256b-mvc instruction which depends on the
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result of a previous 256b-mvc instruction is counterproductive.
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Therefore this patch adjusts the 256b-loop by storing the
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first byte with stc and setting the remaining 255b with mvc.
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Now the 255b-mvc instruction depends on the stc instruction.
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diff --git a/sysdeps/s390/memset-z900.S b/sysdeps/s390/memset-z900.S
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index ca3eac0522..1e0c334156 100644
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--- a/sysdeps/s390/memset-z900.S
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+++ b/sysdeps/s390/memset-z900.S
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@@ -157,28 +157,27 @@ ENTRY(MEMSET_Z196)
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# if !defined __s390x__
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llgfr %r4,%r4
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# endif /* !defined __s390x__ */
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- ltgr %r4,%r4
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- je .L_Z196_4
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+ clgfi %r4,1
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+ jl .L_Z196_4 # n == 0
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stc %r3,0(%r2)
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+ je .L_Z196_4 # n == 1
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+ aghi %r4,-2
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lgr %r1,%r2
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- cghi %r4,1
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- je .L_Z196_4
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- aghi %r4,-2
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- srlg %r5,%r4,8
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- ltgr %r5,%r5
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- jne .L_Z196_1
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+ risbg %r5,%r4,8,128+63,56 # r5 = n / 256
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+ jne .L_Z196_1 # Jump away if r5 != 0
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.L_Z196_3:
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exrl %r4,.L_Z196_17
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.L_Z196_4:
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br %r14
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.L_Z196_1:
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cgfi %r5,1048576
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- jh __memset_mvcle # Switch to mvcle for >256MB
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+ jh __memset_mvcle # Switch to mvcle for >256MB
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.L_Z196_2:
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pfd 2,1024(%r1)
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- mvc 1(256,%r1),0(%r1)
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+ mvc 1(255,%r1),0(%r1)
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aghi %r5,-1
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la %r1,256(%r1)
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+ stc %r3,0(%r1)
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jne .L_Z196_2
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j .L_Z196_3
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.L_Z196_17:
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