446cf2
commit 107e6a3c2212ba7a3a4ec7cae8d82d73f7c95d0b
446cf2
Author: H.J. Lu <hjl.tools@gmail.com>
446cf2
Date:   Mon Jun 29 16:36:08 2020 -0700
446cf2
446cf2
    x86: Support usable check for all CPU features
446cf2
    
446cf2
    Support usable check for all CPU features with the following changes:
446cf2
    
446cf2
    1. Change struct cpu_features to
446cf2
    
446cf2
    struct cpuid_features
446cf2
    {
446cf2
      struct cpuid_registers cpuid;
446cf2
      struct cpuid_registers usable;
446cf2
    };
446cf2
    
446cf2
    struct cpu_features
446cf2
    {
446cf2
      struct cpu_features_basic basic;
446cf2
      struct cpuid_features features[COMMON_CPUID_INDEX_MAX];
446cf2
      unsigned int preferred[PREFERRED_FEATURE_INDEX_MAX];
446cf2
    ...
446cf2
    };
446cf2
    
446cf2
    so that there is a usable bit for each cpuid bit.
446cf2
    2. After the cpuid bits have been initialized, copy the known bits to the
446cf2
    usable bits.  EAX/EBX from INDEX_1 and EAX from INDEX_7 aren't used for
446cf2
    CPU feature detection.
446cf2
    3. Clear the usable bits which require OS support.
446cf2
    4. If the feature is supported by OS, copy its cpuid bit to its usable
446cf2
    bit.
446cf2
    5. Replace HAS_CPU_FEATURE and CPU_FEATURES_CPU_P with CPU_FEATURE_USABLE
446cf2
    and CPU_FEATURE_USABLE_P to check if a feature is usable.
446cf2
    6. Add DEPR_FPU_CS_DS for INDEX_7_EBX_13.
446cf2
    7. Unset MPX feature since it has been deprecated.
446cf2
    
446cf2
    The results are
446cf2
    
446cf2
    1. If the feature is known and doesn't requre OS support, its usable bit
446cf2
    is copied from the cpuid bit.
446cf2
    2. Otherwise, its usable bit is copied from the cpuid bit only if the
446cf2
    feature is known to supported by OS.
446cf2
    3. CPU_FEATURE_USABLE/CPU_FEATURE_USABLE_P are used to check if the
446cf2
    feature can be used.
446cf2
    4. HAS_CPU_FEATURE/CPU_FEATURE_CPU_P are used to check if CPU supports
446cf2
    the feature.
446cf2
446cf2
diff --git a/sysdeps/i386/fpu/fclrexcpt.c b/sysdeps/i386/fpu/fclrexcpt.c
446cf2
index 8463b102e7b79f07..9eff917e88235c64 100644
446cf2
--- a/sysdeps/i386/fpu/fclrexcpt.c
446cf2
+++ b/sysdeps/i386/fpu/fclrexcpt.c
446cf2
@@ -41,7 +41,7 @@ __feclearexcept (int excepts)
446cf2
   __asm__ ("fldenv %0" : : "m" (*&temp));
446cf2
 
446cf2
   /* If the CPU supports SSE, we clear the MXCSR as well.  */
446cf2
-  if (HAS_CPU_FEATURE (SSE))
446cf2
+  if (CPU_FEATURE_USABLE (SSE))
446cf2
     {
446cf2
       unsigned int xnew_exc;
446cf2
 
446cf2
diff --git a/sysdeps/i386/fpu/fedisblxcpt.c b/sysdeps/i386/fpu/fedisblxcpt.c
446cf2
index e2738e6d6c8304fe..3b5436018d08a269 100644
446cf2
--- a/sysdeps/i386/fpu/fedisblxcpt.c
446cf2
+++ b/sysdeps/i386/fpu/fedisblxcpt.c
446cf2
@@ -38,7 +38,7 @@ fedisableexcept (int excepts)
446cf2
   __asm__ ("fldcw %0" : : "m" (*&new_exc));
446cf2
 
446cf2
   /* If the CPU supports SSE we set the MXCSR as well.  */
446cf2
-  if (HAS_CPU_FEATURE (SSE))
446cf2
+  if (CPU_FEATURE_USABLE (SSE))
446cf2
     {
446cf2
       unsigned int xnew_exc;
446cf2
 
446cf2
diff --git a/sysdeps/i386/fpu/feenablxcpt.c b/sysdeps/i386/fpu/feenablxcpt.c
446cf2
index a4d986266636835b..88f46f6078e12e2c 100644
446cf2
--- a/sysdeps/i386/fpu/feenablxcpt.c
446cf2
+++ b/sysdeps/i386/fpu/feenablxcpt.c
446cf2
@@ -38,7 +38,7 @@ feenableexcept (int excepts)
446cf2
   __asm__ ("fldcw %0" : : "m" (*&new_exc));
446cf2
 
446cf2
   /* If the CPU supports SSE we set the MXCSR as well.  */
446cf2
-  if (HAS_CPU_FEATURE (SSE))
446cf2
+  if (CPU_FEATURE_USABLE (SSE))
446cf2
     {
446cf2
       unsigned int xnew_exc;
446cf2
 
446cf2
diff --git a/sysdeps/i386/fpu/fegetenv.c b/sysdeps/i386/fpu/fegetenv.c
446cf2
index 2a1a8507bac9bfa5..2a800fb6d6e856f3 100644
446cf2
--- a/sysdeps/i386/fpu/fegetenv.c
446cf2
+++ b/sysdeps/i386/fpu/fegetenv.c
446cf2
@@ -31,7 +31,7 @@ __fegetenv (fenv_t *envp)
446cf2
      would block all exceptions.  */
446cf2
   __asm__ ("fldenv %0" : : "m" (*envp));
446cf2
 
446cf2
-  if (HAS_CPU_FEATURE (SSE))
446cf2
+  if (CPU_FEATURE_USABLE (SSE))
446cf2
     __asm__ ("stmxcsr %0" : "=m" (envp->__eip));
446cf2
 
446cf2
   /* Success.  */
446cf2
diff --git a/sysdeps/i386/fpu/fegetmode.c b/sysdeps/i386/fpu/fegetmode.c
446cf2
index 86de9f5548f4b0b4..b01ca64fc9187b10 100644
446cf2
--- a/sysdeps/i386/fpu/fegetmode.c
446cf2
+++ b/sysdeps/i386/fpu/fegetmode.c
446cf2
@@ -26,7 +26,7 @@ int
446cf2
 fegetmode (femode_t *modep)
446cf2
 {
446cf2
   _FPU_GETCW (modep->__control_word);
446cf2
-  if (HAS_CPU_FEATURE (SSE))
446cf2
+  if (CPU_FEATURE_USABLE (SSE))
446cf2
     __asm__ ("stmxcsr %0" : "=m" (modep->__mxcsr));
446cf2
   return 0;
446cf2
 }
446cf2
diff --git a/sysdeps/i386/fpu/feholdexcpt.c b/sysdeps/i386/fpu/feholdexcpt.c
446cf2
index 270554df31928cda..e2f3f97b9494f900 100644
446cf2
--- a/sysdeps/i386/fpu/feholdexcpt.c
446cf2
+++ b/sysdeps/i386/fpu/feholdexcpt.c
446cf2
@@ -30,7 +30,7 @@ __feholdexcept (fenv_t *envp)
446cf2
   __asm__ volatile ("fnstenv %0; fnclex" : "=m" (*envp));
446cf2
 
446cf2
   /* If the CPU supports SSE we set the MXCSR as well.  */
446cf2
-  if (HAS_CPU_FEATURE (SSE))
446cf2
+  if (CPU_FEATURE_USABLE (SSE))
446cf2
     {
446cf2
       unsigned int xwork;
446cf2
 
446cf2
diff --git a/sysdeps/i386/fpu/fesetenv.c b/sysdeps/i386/fpu/fesetenv.c
446cf2
index 6df6849da4007a45..5c8bf1f71a474aa9 100644
446cf2
--- a/sysdeps/i386/fpu/fesetenv.c
446cf2
+++ b/sysdeps/i386/fpu/fesetenv.c
446cf2
@@ -79,7 +79,7 @@ __fesetenv (const fenv_t *envp)
446cf2
 
446cf2
   __asm__ ("fldenv %0" : : "m" (temp));
446cf2
 
446cf2
-  if (HAS_CPU_FEATURE (SSE))
446cf2
+  if (CPU_FEATURE_USABLE (SSE))
446cf2
     {
446cf2
       unsigned int mxcsr;
446cf2
       __asm__ ("stmxcsr %0" : "=m" (mxcsr));
446cf2
diff --git a/sysdeps/i386/fpu/fesetmode.c b/sysdeps/i386/fpu/fesetmode.c
446cf2
index 9aad6ea99f810786..35881b6adf5b0aed 100644
446cf2
--- a/sysdeps/i386/fpu/fesetmode.c
446cf2
+++ b/sysdeps/i386/fpu/fesetmode.c
446cf2
@@ -35,7 +35,7 @@ fesetmode (const femode_t *modep)
446cf2
   else
446cf2
     cw = modep->__control_word;
446cf2
   _FPU_SETCW (cw);
446cf2
-  if (HAS_CPU_FEATURE (SSE))
446cf2
+  if (CPU_FEATURE_USABLE (SSE))
446cf2
     {
446cf2
       unsigned int mxcsr;
446cf2
       __asm__ ("stmxcsr %0" : "=m" (mxcsr));
446cf2
diff --git a/sysdeps/i386/fpu/fesetround.c b/sysdeps/i386/fpu/fesetround.c
446cf2
index d260046c65d0aba0..5d38b6b8624bdaef 100644
446cf2
--- a/sysdeps/i386/fpu/fesetround.c
446cf2
+++ b/sysdeps/i386/fpu/fesetround.c
446cf2
@@ -37,7 +37,7 @@ __fesetround (int round)
446cf2
   __asm__ ("fldcw %0" : : "m" (*&cw);;
446cf2
 
446cf2
   /* If the CPU supports SSE we set the MXCSR as well.  */
446cf2
-  if (HAS_CPU_FEATURE (SSE))
446cf2
+  if (CPU_FEATURE_USABLE (SSE))
446cf2
     {
446cf2
       unsigned int xcw;
446cf2
 
446cf2
diff --git a/sysdeps/i386/fpu/feupdateenv.c b/sysdeps/i386/fpu/feupdateenv.c
446cf2
index db3ff96dfa8336ec..1246b21e30740922 100644
446cf2
--- a/sysdeps/i386/fpu/feupdateenv.c
446cf2
+++ b/sysdeps/i386/fpu/feupdateenv.c
446cf2
@@ -32,7 +32,7 @@ __feupdateenv (const fenv_t *envp)
446cf2
   __asm__ ("fnstsw %0" : "=m" (*&temp));
446cf2
 
446cf2
   /* If the CPU supports SSE we test the MXCSR as well.  */
446cf2
-  if (HAS_CPU_FEATURE (SSE))
446cf2
+  if (CPU_FEATURE_USABLE (SSE))
446cf2
     __asm__ ("stmxcsr %0" : "=m" (*&xtemp));
446cf2
 
446cf2
   temp = (temp | xtemp) & FE_ALL_EXCEPT;
446cf2
diff --git a/sysdeps/i386/fpu/fgetexcptflg.c b/sysdeps/i386/fpu/fgetexcptflg.c
446cf2
index 39d1f7df3aa24b25..acb2ae15ea681c13 100644
446cf2
--- a/sysdeps/i386/fpu/fgetexcptflg.c
446cf2
+++ b/sysdeps/i386/fpu/fgetexcptflg.c
446cf2
@@ -34,7 +34,7 @@ __fegetexceptflag (fexcept_t *flagp, int excepts)
446cf2
   *flagp = temp & excepts & FE_ALL_EXCEPT;
446cf2
 
446cf2
   /* If the CPU supports SSE, we clear the MXCSR as well.  */
446cf2
-  if (HAS_CPU_FEATURE (SSE))
446cf2
+  if (CPU_FEATURE_USABLE (SSE))
446cf2
     {
446cf2
       unsigned int sse_exc;
446cf2
 
446cf2
diff --git a/sysdeps/i386/fpu/fsetexcptflg.c b/sysdeps/i386/fpu/fsetexcptflg.c
446cf2
index 21e70251cfbf8a73..caa15c0cf105a9bc 100644
446cf2
--- a/sysdeps/i386/fpu/fsetexcptflg.c
446cf2
+++ b/sysdeps/i386/fpu/fsetexcptflg.c
446cf2
@@ -41,7 +41,7 @@ __fesetexceptflag (const fexcept_t *flagp, int excepts)
446cf2
   __asm__ ("fldenv %0" : : "m" (*&temp));
446cf2
 
446cf2
   /* If the CPU supports SSE, we set the MXCSR as well.  */
446cf2
-  if (HAS_CPU_FEATURE (SSE))
446cf2
+  if (CPU_FEATURE_USABLE (SSE))
446cf2
     {
446cf2
       unsigned int xnew_exc;
446cf2
 
446cf2
diff --git a/sysdeps/i386/fpu/ftestexcept.c b/sysdeps/i386/fpu/ftestexcept.c
446cf2
index c1b5e90356bae9da..06d6134e0d85eeef 100644
446cf2
--- a/sysdeps/i386/fpu/ftestexcept.c
446cf2
+++ b/sysdeps/i386/fpu/ftestexcept.c
446cf2
@@ -32,7 +32,7 @@ fetestexcept (int excepts)
446cf2
   __asm__ ("fnstsw %0" : "=a" (temp));
446cf2
 
446cf2
   /* If the CPU supports SSE we test the MXCSR as well.  */
446cf2
-  if (HAS_CPU_FEATURE (SSE))
446cf2
+  if (CPU_FEATURE_USABLE (SSE))
446cf2
     __asm__ ("stmxcsr %0" : "=m" (*&xtemp));
446cf2
 
446cf2
   return (temp | xtemp) & excepts & FE_ALL_EXCEPT;
446cf2
diff --git a/sysdeps/i386/i686/fpu/multiarch/s_cosf.c b/sysdeps/i386/i686/fpu/multiarch/s_cosf.c
446cf2
index a4556a478d16974a..c31592f238d67916 100644
446cf2
--- a/sysdeps/i386/i686/fpu/multiarch/s_cosf.c
446cf2
+++ b/sysdeps/i386/i686/fpu/multiarch/s_cosf.c
446cf2
@@ -23,7 +23,7 @@ extern float __cosf_sse2 (float);
446cf2
 extern float __cosf_ia32 (float);
446cf2
 float __cosf (float);
446cf2
 
446cf2
-libm_ifunc (__cosf, HAS_CPU_FEATURE (SSE2) ? __cosf_sse2 : __cosf_ia32);
446cf2
+libm_ifunc (__cosf, CPU_FEATURE_USABLE (SSE2) ? __cosf_sse2 : __cosf_ia32);
446cf2
 libm_alias_float (__cos, cos);
446cf2
 
446cf2
 #define COSF __cosf_ia32
446cf2
diff --git a/sysdeps/i386/i686/fpu/multiarch/s_sincosf.c b/sysdeps/i386/i686/fpu/multiarch/s_sincosf.c
446cf2
index 5f21f5c0eda20fd1..116c541dba54dd16 100644
446cf2
--- a/sysdeps/i386/i686/fpu/multiarch/s_sincosf.c
446cf2
+++ b/sysdeps/i386/i686/fpu/multiarch/s_sincosf.c
446cf2
@@ -24,7 +24,7 @@ extern void __sincosf_ia32 (float, float *, float *);
446cf2
 void __sincosf (float, float *, float *);
446cf2
 
446cf2
 libm_ifunc (__sincosf,
446cf2
-	    HAS_CPU_FEATURE (SSE2) ? __sincosf_sse2 : __sincosf_ia32);
446cf2
+	    CPU_FEATURE_USABLE (SSE2) ? __sincosf_sse2 : __sincosf_ia32);
446cf2
 libm_alias_float (__sincos, sincos);
446cf2
 
446cf2
 #define SINCOSF __sincosf_ia32
446cf2
diff --git a/sysdeps/i386/i686/fpu/multiarch/s_sinf.c b/sysdeps/i386/i686/fpu/multiarch/s_sinf.c
446cf2
index 80a7ffaa1e36b492..63abd34c21a1c83f 100644
446cf2
--- a/sysdeps/i386/i686/fpu/multiarch/s_sinf.c
446cf2
+++ b/sysdeps/i386/i686/fpu/multiarch/s_sinf.c
446cf2
@@ -23,7 +23,7 @@ extern float __sinf_sse2 (float);
446cf2
 extern float __sinf_ia32 (float);
446cf2
 float __sinf (float);
446cf2
 
446cf2
-libm_ifunc (__sinf, HAS_CPU_FEATURE (SSE2) ? __sinf_sse2 : __sinf_ia32);
446cf2
+libm_ifunc (__sinf, CPU_FEATURE_USABLE (SSE2) ? __sinf_sse2 : __sinf_ia32);
446cf2
 libm_alias_float (__sin, sin);
446cf2
 #define SINF __sinf_ia32
446cf2
 #include <sysdeps/ieee754/flt-32/s_sinf.c>
446cf2
diff --git a/sysdeps/i386/i686/multiarch/ifunc-impl-list.c b/sysdeps/i386/i686/multiarch/ifunc-impl-list.c
446cf2
index a926b04acdfbb889..06e7231d94e21c02 100644
446cf2
--- a/sysdeps/i386/i686/multiarch/ifunc-impl-list.c
446cf2
+++ b/sysdeps/i386/i686/multiarch/ifunc-impl-list.c
446cf2
@@ -38,35 +38,35 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array,
446cf2
 
446cf2
   /* Support sysdeps/i386/i686/multiarch/bcopy.S.  */
446cf2
   IFUNC_IMPL (i, name, bcopy,
446cf2
-	      IFUNC_IMPL_ADD (array, i, bcopy, HAS_CPU_FEATURE (SSSE3),
446cf2
+	      IFUNC_IMPL_ADD (array, i, bcopy, CPU_FEATURE_USABLE (SSSE3),
446cf2
 			      __bcopy_ssse3_rep)
446cf2
-	      IFUNC_IMPL_ADD (array, i, bcopy, HAS_CPU_FEATURE (SSSE3),
446cf2
+	      IFUNC_IMPL_ADD (array, i, bcopy, CPU_FEATURE_USABLE (SSSE3),
446cf2
 			      __bcopy_ssse3)
446cf2
-	      IFUNC_IMPL_ADD (array, i, bcopy, HAS_CPU_FEATURE (SSE2),
446cf2
+	      IFUNC_IMPL_ADD (array, i, bcopy, CPU_FEATURE_USABLE (SSE2),
446cf2
 			      __bcopy_sse2_unaligned)
446cf2
 	      IFUNC_IMPL_ADD (array, i, bcopy, 1, __bcopy_ia32))
446cf2
 
446cf2
   /* Support sysdeps/i386/i686/multiarch/bzero.S.  */
446cf2
   IFUNC_IMPL (i, name, bzero,
446cf2
-	      IFUNC_IMPL_ADD (array, i, bzero, HAS_CPU_FEATURE (SSE2),
446cf2
+	      IFUNC_IMPL_ADD (array, i, bzero, CPU_FEATURE_USABLE (SSE2),
446cf2
 			      __bzero_sse2_rep)
446cf2
-	      IFUNC_IMPL_ADD (array, i, bzero, HAS_CPU_FEATURE (SSE2),
446cf2
+	      IFUNC_IMPL_ADD (array, i, bzero, CPU_FEATURE_USABLE (SSE2),
446cf2
 			      __bzero_sse2)
446cf2
 	      IFUNC_IMPL_ADD (array, i, bzero, 1, __bzero_ia32))
446cf2
 
446cf2
   /* Support sysdeps/i386/i686/multiarch/memchr.S.  */
446cf2
   IFUNC_IMPL (i, name, memchr,
446cf2
-	      IFUNC_IMPL_ADD (array, i, memchr, HAS_CPU_FEATURE (SSE2),
446cf2
+	      IFUNC_IMPL_ADD (array, i, memchr, CPU_FEATURE_USABLE (SSE2),
446cf2
 			      __memchr_sse2_bsf)
446cf2
-	      IFUNC_IMPL_ADD (array, i, memchr, HAS_CPU_FEATURE (SSE2),
446cf2
+	      IFUNC_IMPL_ADD (array, i, memchr, CPU_FEATURE_USABLE (SSE2),
446cf2
 			      __memchr_sse2)
446cf2
 	      IFUNC_IMPL_ADD (array, i, memchr, 1, __memchr_ia32))
446cf2
 
446cf2
   /* Support sysdeps/i386/i686/multiarch/memcmp.S.  */
446cf2
   IFUNC_IMPL (i, name, memcmp,
446cf2
-	      IFUNC_IMPL_ADD (array, i, memcmp, HAS_CPU_FEATURE (SSE4_2),
446cf2
+	      IFUNC_IMPL_ADD (array, i, memcmp, CPU_FEATURE_USABLE (SSE4_2),
446cf2
 			      __memcmp_sse4_2)
446cf2
-	      IFUNC_IMPL_ADD (array, i, memcmp, HAS_CPU_FEATURE (SSSE3),
446cf2
+	      IFUNC_IMPL_ADD (array, i, memcmp, CPU_FEATURE_USABLE (SSSE3),
446cf2
 			      __memcmp_ssse3)
446cf2
 	      IFUNC_IMPL_ADD (array, i, memcmp, 1, __memcmp_ia32))
446cf2
 
446cf2
@@ -74,13 +74,13 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array,
446cf2
   /* Support sysdeps/i386/i686/multiarch/memmove_chk.S.  */
446cf2
   IFUNC_IMPL (i, name, __memmove_chk,
446cf2
 	      IFUNC_IMPL_ADD (array, i, __memmove_chk,
446cf2
-			      HAS_CPU_FEATURE (SSSE3),
446cf2
+			      CPU_FEATURE_USABLE (SSSE3),
446cf2
 			      __memmove_chk_ssse3_rep)
446cf2
 	      IFUNC_IMPL_ADD (array, i, __memmove_chk,
446cf2
-			      HAS_CPU_FEATURE (SSSE3),
446cf2
+			      CPU_FEATURE_USABLE (SSSE3),
446cf2
 			      __memmove_chk_ssse3)
446cf2
 	      IFUNC_IMPL_ADD (array, i, __memmove_chk,
446cf2
-			      HAS_CPU_FEATURE (SSE2),
446cf2
+			      CPU_FEATURE_USABLE (SSE2),
446cf2
 			      __memmove_chk_sse2_unaligned)
446cf2
 	      IFUNC_IMPL_ADD (array, i, __memmove_chk, 1,
446cf2
 			      __memmove_chk_ia32))
446cf2
@@ -88,19 +88,19 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array,
446cf2
 
446cf2
   /* Support sysdeps/i386/i686/multiarch/memmove.S.  */
446cf2
   IFUNC_IMPL (i, name, memmove,
446cf2
-	      IFUNC_IMPL_ADD (array, i, memmove, HAS_CPU_FEATURE (SSSE3),
446cf2
+	      IFUNC_IMPL_ADD (array, i, memmove, CPU_FEATURE_USABLE (SSSE3),
446cf2
 			      __memmove_ssse3_rep)
446cf2
-	      IFUNC_IMPL_ADD (array, i, memmove, HAS_CPU_FEATURE (SSSE3),
446cf2
+	      IFUNC_IMPL_ADD (array, i, memmove, CPU_FEATURE_USABLE (SSSE3),
446cf2
 			      __memmove_ssse3)
446cf2
-	      IFUNC_IMPL_ADD (array, i, memmove, HAS_CPU_FEATURE (SSE2),
446cf2
+	      IFUNC_IMPL_ADD (array, i, memmove, CPU_FEATURE_USABLE (SSE2),
446cf2
 			      __memmove_sse2_unaligned)
446cf2
 	      IFUNC_IMPL_ADD (array, i, memmove, 1, __memmove_ia32))
446cf2
 
446cf2
   /* Support sysdeps/i386/i686/multiarch/memrchr.S.  */
446cf2
   IFUNC_IMPL (i, name, memrchr,
446cf2
-	      IFUNC_IMPL_ADD (array, i, memrchr, HAS_CPU_FEATURE (SSE2),
446cf2
+	      IFUNC_IMPL_ADD (array, i, memrchr, CPU_FEATURE_USABLE (SSE2),
446cf2
 			      __memrchr_sse2_bsf)
446cf2
-	      IFUNC_IMPL_ADD (array, i, memrchr, HAS_CPU_FEATURE (SSE2),
446cf2
+	      IFUNC_IMPL_ADD (array, i, memrchr, CPU_FEATURE_USABLE (SSE2),
446cf2
 			      __memrchr_sse2)
446cf2
 	      IFUNC_IMPL_ADD (array, i, memrchr, 1, __memrchr_ia32))
446cf2
 
446cf2
@@ -108,10 +108,10 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array,
446cf2
   /* Support sysdeps/i386/i686/multiarch/memset_chk.S.  */
446cf2
   IFUNC_IMPL (i, name, __memset_chk,
446cf2
 	      IFUNC_IMPL_ADD (array, i, __memset_chk,
446cf2
-			      HAS_CPU_FEATURE (SSE2),
446cf2
+			      CPU_FEATURE_USABLE (SSE2),
446cf2
 			      __memset_chk_sse2_rep)
446cf2
 	      IFUNC_IMPL_ADD (array, i, __memset_chk,
446cf2
-			      HAS_CPU_FEATURE (SSE2),
446cf2
+			      CPU_FEATURE_USABLE (SSE2),
446cf2
 			      __memset_chk_sse2)
446cf2
 	      IFUNC_IMPL_ADD (array, i, __memset_chk, 1,
446cf2
 			      __memset_chk_ia32))
446cf2
@@ -119,102 +119,102 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array,
446cf2
 
446cf2
   /* Support sysdeps/i386/i686/multiarch/memset.S.  */
446cf2
   IFUNC_IMPL (i, name, memset,
446cf2
-	      IFUNC_IMPL_ADD (array, i, memset, HAS_CPU_FEATURE (SSE2),
446cf2
+	      IFUNC_IMPL_ADD (array, i, memset, CPU_FEATURE_USABLE (SSE2),
446cf2
 			      __memset_sse2_rep)
446cf2
-	      IFUNC_IMPL_ADD (array, i, memset, HAS_CPU_FEATURE (SSE2),
446cf2
+	      IFUNC_IMPL_ADD (array, i, memset, CPU_FEATURE_USABLE (SSE2),
446cf2
 			      __memset_sse2)
446cf2
 	      IFUNC_IMPL_ADD (array, i, memset, 1, __memset_ia32))
446cf2
 
446cf2
   /* Support sysdeps/i386/i686/multiarch/rawmemchr.S.  */
446cf2
   IFUNC_IMPL (i, name, rawmemchr,
446cf2
-	      IFUNC_IMPL_ADD (array, i, rawmemchr, HAS_CPU_FEATURE (SSE2),
446cf2
+	      IFUNC_IMPL_ADD (array, i, rawmemchr, CPU_FEATURE_USABLE (SSE2),
446cf2
 			      __rawmemchr_sse2_bsf)
446cf2
-	      IFUNC_IMPL_ADD (array, i, rawmemchr, HAS_CPU_FEATURE (SSE2),
446cf2
+	      IFUNC_IMPL_ADD (array, i, rawmemchr, CPU_FEATURE_USABLE (SSE2),
446cf2
 			      __rawmemchr_sse2)
446cf2
 	      IFUNC_IMPL_ADD (array, i, rawmemchr, 1, __rawmemchr_ia32))
446cf2
 
446cf2
   /* Support sysdeps/i386/i686/multiarch/stpncpy.S.  */
446cf2
   IFUNC_IMPL (i, name, stpncpy,
446cf2
-	      IFUNC_IMPL_ADD (array, i, stpncpy, HAS_CPU_FEATURE (SSSE3),
446cf2
+	      IFUNC_IMPL_ADD (array, i, stpncpy, CPU_FEATURE_USABLE (SSSE3),
446cf2
 			      __stpncpy_ssse3)
446cf2
-	      IFUNC_IMPL_ADD (array, i, stpncpy, HAS_CPU_FEATURE (SSE2),
446cf2
+	      IFUNC_IMPL_ADD (array, i, stpncpy, CPU_FEATURE_USABLE (SSE2),
446cf2
 			      __stpncpy_sse2)
446cf2
 	      IFUNC_IMPL_ADD (array, i, stpncpy, 1, __stpncpy_ia32))
446cf2
 
446cf2
   /* Support sysdeps/i386/i686/multiarch/stpcpy.S.  */
446cf2
   IFUNC_IMPL (i, name, stpcpy,
446cf2
-	      IFUNC_IMPL_ADD (array, i, stpcpy, HAS_CPU_FEATURE (SSSE3),
446cf2
+	      IFUNC_IMPL_ADD (array, i, stpcpy, CPU_FEATURE_USABLE (SSSE3),
446cf2
 			      __stpcpy_ssse3)
446cf2
-	      IFUNC_IMPL_ADD (array, i, stpcpy, HAS_CPU_FEATURE (SSE2),
446cf2
+	      IFUNC_IMPL_ADD (array, i, stpcpy, CPU_FEATURE_USABLE (SSE2),
446cf2
 			      __stpcpy_sse2)
446cf2
 	      IFUNC_IMPL_ADD (array, i, stpcpy, 1, __stpcpy_ia32))
446cf2
 
446cf2
   /* Support sysdeps/i386/i686/multiarch/strcasecmp.S.  */
446cf2
   IFUNC_IMPL (i, name, strcasecmp,
446cf2
 	      IFUNC_IMPL_ADD (array, i, strcasecmp,
446cf2
-			      HAS_CPU_FEATURE (SSE4_2),
446cf2
+			      CPU_FEATURE_USABLE (SSE4_2),
446cf2
 			      __strcasecmp_sse4_2)
446cf2
 	      IFUNC_IMPL_ADD (array, i, strcasecmp,
446cf2
-			      HAS_CPU_FEATURE (SSSE3),
446cf2
+			      CPU_FEATURE_USABLE (SSSE3),
446cf2
 			      __strcasecmp_ssse3)
446cf2
 	      IFUNC_IMPL_ADD (array, i, strcasecmp, 1, __strcasecmp_ia32))
446cf2
 
446cf2
   /* Support sysdeps/i386/i686/multiarch/strcasecmp_l.S.  */
446cf2
   IFUNC_IMPL (i, name, strcasecmp_l,
446cf2
 	      IFUNC_IMPL_ADD (array, i, strcasecmp_l,
446cf2
-			      HAS_CPU_FEATURE (SSE4_2),
446cf2
+			      CPU_FEATURE_USABLE (SSE4_2),
446cf2
 			      __strcasecmp_l_sse4_2)
446cf2
 	      IFUNC_IMPL_ADD (array, i, strcasecmp_l,
446cf2
-			      HAS_CPU_FEATURE (SSSE3),
446cf2
+			      CPU_FEATURE_USABLE (SSSE3),
446cf2
 			      __strcasecmp_l_ssse3)
446cf2
 	      IFUNC_IMPL_ADD (array, i, strcasecmp_l, 1,
446cf2
 			      __strcasecmp_l_ia32))
446cf2
 
446cf2
   /* Support sysdeps/i386/i686/multiarch/strcat.S.  */
446cf2
   IFUNC_IMPL (i, name, strcat,
446cf2
-	      IFUNC_IMPL_ADD (array, i, strcat, HAS_CPU_FEATURE (SSSE3),
446cf2
+	      IFUNC_IMPL_ADD (array, i, strcat, CPU_FEATURE_USABLE (SSSE3),
446cf2
 			      __strcat_ssse3)
446cf2
-	      IFUNC_IMPL_ADD (array, i, strcat, HAS_CPU_FEATURE (SSE2),
446cf2
+	      IFUNC_IMPL_ADD (array, i, strcat, CPU_FEATURE_USABLE (SSE2),
446cf2
 			      __strcat_sse2)
446cf2
 	      IFUNC_IMPL_ADD (array, i, strcat, 1, __strcat_ia32))
446cf2
 
446cf2
   /* Support sysdeps/i386/i686/multiarch/strchr.S.  */
446cf2
   IFUNC_IMPL (i, name, strchr,
446cf2
-	      IFUNC_IMPL_ADD (array, i, strchr, HAS_CPU_FEATURE (SSE2),
446cf2
+	      IFUNC_IMPL_ADD (array, i, strchr, CPU_FEATURE_USABLE (SSE2),
446cf2
 			      __strchr_sse2_bsf)
446cf2
-	      IFUNC_IMPL_ADD (array, i, strchr, HAS_CPU_FEATURE (SSE2),
446cf2
+	      IFUNC_IMPL_ADD (array, i, strchr, CPU_FEATURE_USABLE (SSE2),
446cf2
 			      __strchr_sse2)
446cf2
 	      IFUNC_IMPL_ADD (array, i, strchr, 1, __strchr_ia32))
446cf2
 
446cf2
   /* Support sysdeps/i386/i686/multiarch/strcmp.S.  */
446cf2
   IFUNC_IMPL (i, name, strcmp,
446cf2
-	      IFUNC_IMPL_ADD (array, i, strcmp, HAS_CPU_FEATURE (SSE4_2),
446cf2
+	      IFUNC_IMPL_ADD (array, i, strcmp, CPU_FEATURE_USABLE (SSE4_2),
446cf2
 			      __strcmp_sse4_2)
446cf2
-	      IFUNC_IMPL_ADD (array, i, strcmp, HAS_CPU_FEATURE (SSSE3),
446cf2
+	      IFUNC_IMPL_ADD (array, i, strcmp, CPU_FEATURE_USABLE (SSSE3),
446cf2
 			      __strcmp_ssse3)
446cf2
 	      IFUNC_IMPL_ADD (array, i, strcmp, 1, __strcmp_ia32))
446cf2
 
446cf2
   /* Support sysdeps/i386/i686/multiarch/strcpy.S.  */
446cf2
   IFUNC_IMPL (i, name, strcpy,
446cf2
-	      IFUNC_IMPL_ADD (array, i, strcpy, HAS_CPU_FEATURE (SSSE3),
446cf2
+	      IFUNC_IMPL_ADD (array, i, strcpy, CPU_FEATURE_USABLE (SSSE3),
446cf2
 			      __strcpy_ssse3)
446cf2
-	      IFUNC_IMPL_ADD (array, i, strcpy, HAS_CPU_FEATURE (SSE2),
446cf2
+	      IFUNC_IMPL_ADD (array, i, strcpy, CPU_FEATURE_USABLE (SSE2),
446cf2
 			      __strcpy_sse2)
446cf2
 	      IFUNC_IMPL_ADD (array, i, strcpy, 1, __strcpy_ia32))
446cf2
 
446cf2
   /* Support sysdeps/i386/i686/multiarch/strcspn.S.  */
446cf2
   IFUNC_IMPL (i, name, strcspn,
446cf2
-	      IFUNC_IMPL_ADD (array, i, strcspn, HAS_CPU_FEATURE (SSE4_2),
446cf2
+	      IFUNC_IMPL_ADD (array, i, strcspn, CPU_FEATURE_USABLE (SSE4_2),
446cf2
 			      __strcspn_sse42)
446cf2
 	      IFUNC_IMPL_ADD (array, i, strcspn, 1, __strcspn_ia32))
446cf2
 
446cf2
   /* Support sysdeps/i386/i686/multiarch/strncase.S.  */
446cf2
   IFUNC_IMPL (i, name, strncasecmp,
446cf2
 	      IFUNC_IMPL_ADD (array, i, strncasecmp,
446cf2
-			      HAS_CPU_FEATURE (SSE4_2),
446cf2
+			      CPU_FEATURE_USABLE (SSE4_2),
446cf2
 			      __strncasecmp_sse4_2)
446cf2
 	      IFUNC_IMPL_ADD (array, i, strncasecmp,
446cf2
-			      HAS_CPU_FEATURE (SSSE3),
446cf2
+			      CPU_FEATURE_USABLE (SSSE3),
446cf2
 			      __strncasecmp_ssse3)
446cf2
 	      IFUNC_IMPL_ADD (array, i, strncasecmp, 1,
446cf2
 			      __strncasecmp_ia32))
446cf2
@@ -222,91 +222,91 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array,
446cf2
   /* Support sysdeps/i386/i686/multiarch/strncase_l.S.  */
446cf2
   IFUNC_IMPL (i, name, strncasecmp_l,
446cf2
 	      IFUNC_IMPL_ADD (array, i, strncasecmp_l,
446cf2
-			      HAS_CPU_FEATURE (SSE4_2),
446cf2
+			      CPU_FEATURE_USABLE (SSE4_2),
446cf2
 			      __strncasecmp_l_sse4_2)
446cf2
 	      IFUNC_IMPL_ADD (array, i, strncasecmp_l,
446cf2
-			      HAS_CPU_FEATURE (SSSE3),
446cf2
+			      CPU_FEATURE_USABLE (SSSE3),
446cf2
 			      __strncasecmp_l_ssse3)
446cf2
 	      IFUNC_IMPL_ADD (array, i, strncasecmp_l, 1,
446cf2
 			      __strncasecmp_l_ia32))
446cf2
 
446cf2
   /* Support sysdeps/i386/i686/multiarch/strncat.S.  */
446cf2
   IFUNC_IMPL (i, name, strncat,
446cf2
-	      IFUNC_IMPL_ADD (array, i, strncat, HAS_CPU_FEATURE (SSSE3),
446cf2
+	      IFUNC_IMPL_ADD (array, i, strncat, CPU_FEATURE_USABLE (SSSE3),
446cf2
 			      __strncat_ssse3)
446cf2
-	      IFUNC_IMPL_ADD (array, i, strncat, HAS_CPU_FEATURE (SSE2),
446cf2
+	      IFUNC_IMPL_ADD (array, i, strncat, CPU_FEATURE_USABLE (SSE2),
446cf2
 			      __strncat_sse2)
446cf2
 	      IFUNC_IMPL_ADD (array, i, strncat, 1, __strncat_ia32))
446cf2
 
446cf2
   /* Support sysdeps/i386/i686/multiarch/strncpy.S.  */
446cf2
   IFUNC_IMPL (i, name, strncpy,
446cf2
-	      IFUNC_IMPL_ADD (array, i, strncpy, HAS_CPU_FEATURE (SSSE3),
446cf2
+	      IFUNC_IMPL_ADD (array, i, strncpy, CPU_FEATURE_USABLE (SSSE3),
446cf2
 			      __strncpy_ssse3)
446cf2
-	      IFUNC_IMPL_ADD (array, i, strncpy, HAS_CPU_FEATURE (SSE2),
446cf2
+	      IFUNC_IMPL_ADD (array, i, strncpy, CPU_FEATURE_USABLE (SSE2),
446cf2
 			      __strncpy_sse2)
446cf2
 	      IFUNC_IMPL_ADD (array, i, strncpy, 1, __strncpy_ia32))
446cf2
 
446cf2
   /* Support sysdeps/i386/i686/multiarch/strnlen.S.  */
446cf2
   IFUNC_IMPL (i, name, strnlen,
446cf2
-	      IFUNC_IMPL_ADD (array, i, strnlen, HAS_CPU_FEATURE (SSE2),
446cf2
+	      IFUNC_IMPL_ADD (array, i, strnlen, CPU_FEATURE_USABLE (SSE2),
446cf2
 			      __strnlen_sse2)
446cf2
 	      IFUNC_IMPL_ADD (array, i, strnlen, 1, __strnlen_ia32))
446cf2
 
446cf2
   /* Support sysdeps/i386/i686/multiarch/strpbrk.S.  */
446cf2
   IFUNC_IMPL (i, name, strpbrk,
446cf2
-	      IFUNC_IMPL_ADD (array, i, strpbrk, HAS_CPU_FEATURE (SSE4_2),
446cf2
+	      IFUNC_IMPL_ADD (array, i, strpbrk, CPU_FEATURE_USABLE (SSE4_2),
446cf2
 			      __strpbrk_sse42)
446cf2
 	      IFUNC_IMPL_ADD (array, i, strpbrk, 1, __strpbrk_ia32))
446cf2
 
446cf2
   /* Support sysdeps/i386/i686/multiarch/strrchr.S.  */
446cf2
   IFUNC_IMPL (i, name, strrchr,
446cf2
-	      IFUNC_IMPL_ADD (array, i, strrchr, HAS_CPU_FEATURE (SSE2),
446cf2
+	      IFUNC_IMPL_ADD (array, i, strrchr, CPU_FEATURE_USABLE (SSE2),
446cf2
 			      __strrchr_sse2_bsf)
446cf2
-	      IFUNC_IMPL_ADD (array, i, strrchr, HAS_CPU_FEATURE (SSE2),
446cf2
+	      IFUNC_IMPL_ADD (array, i, strrchr, CPU_FEATURE_USABLE (SSE2),
446cf2
 			      __strrchr_sse2)
446cf2
 	      IFUNC_IMPL_ADD (array, i, strrchr, 1, __strrchr_ia32))
446cf2
 
446cf2
   /* Support sysdeps/i386/i686/multiarch/strspn.S.  */
446cf2
   IFUNC_IMPL (i, name, strspn,
446cf2
-	      IFUNC_IMPL_ADD (array, i, strspn, HAS_CPU_FEATURE (SSE4_2),
446cf2
+	      IFUNC_IMPL_ADD (array, i, strspn, CPU_FEATURE_USABLE (SSE4_2),
446cf2
 			      __strspn_sse42)
446cf2
 	      IFUNC_IMPL_ADD (array, i, strspn, 1, __strspn_ia32))
446cf2
 
446cf2
   /* Support sysdeps/i386/i686/multiarch/wcschr.S.  */
446cf2
   IFUNC_IMPL (i, name, wcschr,
446cf2
-	      IFUNC_IMPL_ADD (array, i, wcschr, HAS_CPU_FEATURE (SSE2),
446cf2
+	      IFUNC_IMPL_ADD (array, i, wcschr, CPU_FEATURE_USABLE (SSE2),
446cf2
 			      __wcschr_sse2)
446cf2
 	      IFUNC_IMPL_ADD (array, i, wcschr, 1, __wcschr_ia32))
446cf2
 
446cf2
   /* Support sysdeps/i386/i686/multiarch/wcscmp.S.  */
446cf2
   IFUNC_IMPL (i, name, wcscmp,
446cf2
-	      IFUNC_IMPL_ADD (array, i, wcscmp, HAS_CPU_FEATURE (SSE2),
446cf2
+	      IFUNC_IMPL_ADD (array, i, wcscmp, CPU_FEATURE_USABLE (SSE2),
446cf2
 			      __wcscmp_sse2)
446cf2
 	      IFUNC_IMPL_ADD (array, i, wcscmp, 1, __wcscmp_ia32))
446cf2
 
446cf2
   /* Support sysdeps/i386/i686/multiarch/wcscpy.S.  */
446cf2
   IFUNC_IMPL (i, name, wcscpy,
446cf2
-	      IFUNC_IMPL_ADD (array, i, wcscpy, HAS_CPU_FEATURE (SSSE3),
446cf2
+	      IFUNC_IMPL_ADD (array, i, wcscpy, CPU_FEATURE_USABLE (SSSE3),
446cf2
 			      __wcscpy_ssse3)
446cf2
 	      IFUNC_IMPL_ADD (array, i, wcscpy, 1, __wcscpy_ia32))
446cf2
 
446cf2
   /* Support sysdeps/i386/i686/multiarch/wcslen.S.  */
446cf2
   IFUNC_IMPL (i, name, wcslen,
446cf2
-	      IFUNC_IMPL_ADD (array, i, wcslen, HAS_CPU_FEATURE (SSE2),
446cf2
+	      IFUNC_IMPL_ADD (array, i, wcslen, CPU_FEATURE_USABLE (SSE2),
446cf2
 			      __wcslen_sse2)
446cf2
 	      IFUNC_IMPL_ADD (array, i, wcslen, 1, __wcslen_ia32))
446cf2
 
446cf2
   /* Support sysdeps/i386/i686/multiarch/wcsrchr.S.  */
446cf2
   IFUNC_IMPL (i, name, wcsrchr,
446cf2
-	      IFUNC_IMPL_ADD (array, i, wcsrchr, HAS_CPU_FEATURE (SSE2),
446cf2
+	      IFUNC_IMPL_ADD (array, i, wcsrchr, CPU_FEATURE_USABLE (SSE2),
446cf2
 			      __wcsrchr_sse2)
446cf2
 	      IFUNC_IMPL_ADD (array, i, wcsrchr, 1, __wcsrchr_ia32))
446cf2
 
446cf2
   /* Support sysdeps/i386/i686/multiarch/wmemcmp.S.  */
446cf2
   IFUNC_IMPL (i, name, wmemcmp,
446cf2
-	      IFUNC_IMPL_ADD (array, i, wmemcmp, HAS_CPU_FEATURE (SSE4_2),
446cf2
+	      IFUNC_IMPL_ADD (array, i, wmemcmp, CPU_FEATURE_USABLE (SSE4_2),
446cf2
 			      __wmemcmp_sse4_2)
446cf2
-	      IFUNC_IMPL_ADD (array, i, wmemcmp, HAS_CPU_FEATURE (SSSE3),
446cf2
+	      IFUNC_IMPL_ADD (array, i, wmemcmp, CPU_FEATURE_USABLE (SSSE3),
446cf2
 			      __wmemcmp_ssse3)
446cf2
 	      IFUNC_IMPL_ADD (array, i, wmemcmp, 1, __wmemcmp_ia32))
446cf2
 
446cf2
@@ -314,64 +314,64 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array,
446cf2
   /* Support sysdeps/i386/i686/multiarch/memcpy_chk.S.  */
446cf2
   IFUNC_IMPL (i, name, __memcpy_chk,
446cf2
 	      IFUNC_IMPL_ADD (array, i, __memcpy_chk,
446cf2
-			      HAS_CPU_FEATURE (SSSE3),
446cf2
+			      CPU_FEATURE_USABLE (SSSE3),
446cf2
 			      __memcpy_chk_ssse3_rep)
446cf2
 	      IFUNC_IMPL_ADD (array, i, __memcpy_chk,
446cf2
-			      HAS_CPU_FEATURE (SSSE3),
446cf2
+			      CPU_FEATURE_USABLE (SSSE3),
446cf2
 			      __memcpy_chk_ssse3)
446cf2
 	      IFUNC_IMPL_ADD (array, i, __memcpy_chk,
446cf2
-			      HAS_CPU_FEATURE (SSE2),
446cf2
+			      CPU_FEATURE_USABLE (SSE2),
446cf2
 			      __memcpy_chk_sse2_unaligned)
446cf2
 	      IFUNC_IMPL_ADD (array, i, __memcpy_chk, 1,
446cf2
 			      __memcpy_chk_ia32))
446cf2
 
446cf2
   /* Support sysdeps/i386/i686/multiarch/memcpy.S.  */
446cf2
   IFUNC_IMPL (i, name, memcpy,
446cf2
-	      IFUNC_IMPL_ADD (array, i, memcpy, HAS_CPU_FEATURE (SSSE3),
446cf2
+	      IFUNC_IMPL_ADD (array, i, memcpy, CPU_FEATURE_USABLE (SSSE3),
446cf2
 			      __memcpy_ssse3_rep)
446cf2
-	      IFUNC_IMPL_ADD (array, i, memcpy, HAS_CPU_FEATURE (SSSE3),
446cf2
+	      IFUNC_IMPL_ADD (array, i, memcpy, CPU_FEATURE_USABLE (SSSE3),
446cf2
 			      __memcpy_ssse3)
446cf2
-	      IFUNC_IMPL_ADD (array, i, memcpy, HAS_CPU_FEATURE (SSE2),
446cf2
+	      IFUNC_IMPL_ADD (array, i, memcpy, CPU_FEATURE_USABLE (SSE2),
446cf2
 			      __memcpy_sse2_unaligned)
446cf2
 	      IFUNC_IMPL_ADD (array, i, memcpy, 1, __memcpy_ia32))
446cf2
 
446cf2
   /* Support sysdeps/i386/i686/multiarch/mempcpy_chk.S.  */
446cf2
   IFUNC_IMPL (i, name, __mempcpy_chk,
446cf2
 	      IFUNC_IMPL_ADD (array, i, __mempcpy_chk,
446cf2
-			      HAS_CPU_FEATURE (SSSE3),
446cf2
+			      CPU_FEATURE_USABLE (SSSE3),
446cf2
 			      __mempcpy_chk_ssse3_rep)
446cf2
 	      IFUNC_IMPL_ADD (array, i, __mempcpy_chk,
446cf2
-			      HAS_CPU_FEATURE (SSSE3),
446cf2
+			      CPU_FEATURE_USABLE (SSSE3),
446cf2
 			      __mempcpy_chk_ssse3)
446cf2
 	      IFUNC_IMPL_ADD (array, i, __mempcpy_chk,
446cf2
-			      HAS_CPU_FEATURE (SSE2),
446cf2
+			      CPU_FEATURE_USABLE (SSE2),
446cf2
 			      __mempcpy_chk_sse2_unaligned)
446cf2
 	      IFUNC_IMPL_ADD (array, i, __mempcpy_chk, 1,
446cf2
 			      __mempcpy_chk_ia32))
446cf2
 
446cf2
   /* Support sysdeps/i386/i686/multiarch/mempcpy.S.  */
446cf2
   IFUNC_IMPL (i, name, mempcpy,
446cf2
-	      IFUNC_IMPL_ADD (array, i, mempcpy, HAS_CPU_FEATURE (SSSE3),
446cf2
+	      IFUNC_IMPL_ADD (array, i, mempcpy, CPU_FEATURE_USABLE (SSSE3),
446cf2
 			      __mempcpy_ssse3_rep)
446cf2
-	      IFUNC_IMPL_ADD (array, i, mempcpy, HAS_CPU_FEATURE (SSSE3),
446cf2
+	      IFUNC_IMPL_ADD (array, i, mempcpy, CPU_FEATURE_USABLE (SSSE3),
446cf2
 			      __mempcpy_ssse3)
446cf2
-	      IFUNC_IMPL_ADD (array, i, mempcpy, HAS_CPU_FEATURE (SSE2),
446cf2
+	      IFUNC_IMPL_ADD (array, i, mempcpy, CPU_FEATURE_USABLE (SSE2),
446cf2
 			      __mempcpy_sse2_unaligned)
446cf2
 	      IFUNC_IMPL_ADD (array, i, mempcpy, 1, __mempcpy_ia32))
446cf2
 
446cf2
   /* Support sysdeps/i386/i686/multiarch/strlen.S.  */
446cf2
   IFUNC_IMPL (i, name, strlen,
446cf2
-	      IFUNC_IMPL_ADD (array, i, strlen, HAS_CPU_FEATURE (SSE2),
446cf2
+	      IFUNC_IMPL_ADD (array, i, strlen, CPU_FEATURE_USABLE (SSE2),
446cf2
 			      __strlen_sse2_bsf)
446cf2
-	      IFUNC_IMPL_ADD (array, i, strlen, HAS_CPU_FEATURE (SSE2),
446cf2
+	      IFUNC_IMPL_ADD (array, i, strlen, CPU_FEATURE_USABLE (SSE2),
446cf2
 			      __strlen_sse2)
446cf2
 	      IFUNC_IMPL_ADD (array, i, strlen, 1, __strlen_ia32))
446cf2
 
446cf2
   /* Support sysdeps/i386/i686/multiarch/strncmp.S.  */
446cf2
   IFUNC_IMPL (i, name, strncmp,
446cf2
-	      IFUNC_IMPL_ADD (array, i, strncmp, HAS_CPU_FEATURE (SSE4_2),
446cf2
+	      IFUNC_IMPL_ADD (array, i, strncmp, CPU_FEATURE_USABLE (SSE4_2),
446cf2
 			      __strncmp_sse4_2)
446cf2
-	      IFUNC_IMPL_ADD (array, i, strncmp, HAS_CPU_FEATURE (SSSE3),
446cf2
+	      IFUNC_IMPL_ADD (array, i, strncmp, CPU_FEATURE_USABLE (SSSE3),
446cf2
 			      __strncmp_ssse3)
446cf2
 	      IFUNC_IMPL_ADD (array, i, strncmp, 1, __strncmp_ia32))
446cf2
 #endif
446cf2
diff --git a/sysdeps/i386/i686/multiarch/ifunc-memmove.h b/sysdeps/i386/i686/multiarch/ifunc-memmove.h
446cf2
index f0e97561784a82d5..cd4333f84b114552 100644
446cf2
--- a/sysdeps/i386/i686/multiarch/ifunc-memmove.h
446cf2
+++ b/sysdeps/i386/i686/multiarch/ifunc-memmove.h
446cf2
@@ -33,7 +33,7 @@ IFUNC_SELECTOR (void)
446cf2
   if (CPU_FEATURES_ARCH_P (cpu_features, Fast_Unaligned_Load))
446cf2
     return OPTIMIZE (sse2_unaligned);
446cf2
 
446cf2
-  if (CPU_FEATURES_CPU_P (cpu_features, SSSE3))
446cf2
+  if (CPU_FEATURE_USABLE_P (cpu_features, SSSE3))
446cf2
     {
446cf2
       if (CPU_FEATURES_ARCH_P (cpu_features, Fast_Rep_String))
446cf2
 	return OPTIMIZE (ssse3_rep);
446cf2
diff --git a/sysdeps/i386/i686/multiarch/ifunc-memset.h b/sysdeps/i386/i686/multiarch/ifunc-memset.h
446cf2
index e96609439aef30d1..6cf96ebcd480dba4 100644
446cf2
--- a/sysdeps/i386/i686/multiarch/ifunc-memset.h
446cf2
+++ b/sysdeps/i386/i686/multiarch/ifunc-memset.h
446cf2
@@ -28,7 +28,7 @@ IFUNC_SELECTOR (void)
446cf2
 {
446cf2
   const struct cpu_features* cpu_features = __get_cpu_features ();
446cf2
 
446cf2
-  if (CPU_FEATURES_CPU_P (cpu_features, SSE2))
446cf2
+  if (CPU_FEATURE_USABLE_P (cpu_features, SSE2))
446cf2
     {
446cf2
       if (CPU_FEATURES_ARCH_P (cpu_features, Fast_Rep_String))
446cf2
 	return OPTIMIZE (sse2_rep);
446cf2
diff --git a/sysdeps/i386/i686/multiarch/ifunc-sse2-bsf.h b/sysdeps/i386/i686/multiarch/ifunc-sse2-bsf.h
446cf2
index f5e7f1b846c28454..de30f004db53f227 100644
446cf2
--- a/sysdeps/i386/i686/multiarch/ifunc-sse2-bsf.h
446cf2
+++ b/sysdeps/i386/i686/multiarch/ifunc-sse2-bsf.h
446cf2
@@ -28,7 +28,7 @@ IFUNC_SELECTOR (void)
446cf2
 {
446cf2
   const struct cpu_features* cpu_features = __get_cpu_features ();
446cf2
 
446cf2
-  if (CPU_FEATURES_CPU_P (cpu_features, SSE2))
446cf2
+  if (CPU_FEATURE_USABLE_P (cpu_features, SSE2))
446cf2
     {
446cf2
       if (CPU_FEATURES_ARCH_P (cpu_features, Slow_BSF))
446cf2
 	return OPTIMIZE (sse2);
446cf2
diff --git a/sysdeps/i386/i686/multiarch/ifunc-sse2-ssse3.h b/sysdeps/i386/i686/multiarch/ifunc-sse2-ssse3.h
446cf2
index a33fe44f504bd178..299d73e3144698d7 100644
446cf2
--- a/sysdeps/i386/i686/multiarch/ifunc-sse2-ssse3.h
446cf2
+++ b/sysdeps/i386/i686/multiarch/ifunc-sse2-ssse3.h
446cf2
@@ -29,11 +29,11 @@ IFUNC_SELECTOR (void)
446cf2
 {
446cf2
   const struct cpu_features* cpu_features = __get_cpu_features ();
446cf2
 
446cf2
-  if (CPU_FEATURES_CPU_P (cpu_features, SSE2)
446cf2
+  if (CPU_FEATURE_USABLE_P (cpu_features, SSE2)
446cf2
       && CPU_FEATURES_ARCH_P (cpu_features, Fast_Rep_String))
446cf2
     return OPTIMIZE (sse2);
446cf2
 
446cf2
-  if (CPU_FEATURES_CPU_P (cpu_features, SSSE3))
446cf2
+  if (CPU_FEATURE_USABLE_P (cpu_features, SSSE3))
446cf2
     return OPTIMIZE (ssse3);
446cf2
 
446cf2
   return OPTIMIZE (ia32);
446cf2
diff --git a/sysdeps/i386/i686/multiarch/ifunc-sse2.h b/sysdeps/i386/i686/multiarch/ifunc-sse2.h
446cf2
index 706c0329c9a76573..e1ba025299037bfb 100644
446cf2
--- a/sysdeps/i386/i686/multiarch/ifunc-sse2.h
446cf2
+++ b/sysdeps/i386/i686/multiarch/ifunc-sse2.h
446cf2
@@ -27,7 +27,7 @@ IFUNC_SELECTOR (void)
446cf2
 {
446cf2
   const struct cpu_features* cpu_features = __get_cpu_features ();
446cf2
 
446cf2
-  if (CPU_FEATURES_CPU_P (cpu_features, SSE2))
446cf2
+  if (CPU_FEATURE_USABLE_P (cpu_features, SSE2))
446cf2
     return OPTIMIZE (sse2);
446cf2
 
446cf2
   return OPTIMIZE (ia32);
446cf2
diff --git a/sysdeps/i386/i686/multiarch/ifunc-sse4_2.h b/sysdeps/i386/i686/multiarch/ifunc-sse4_2.h
446cf2
index de7fa2f185ad9a59..641cec2ced510524 100644
446cf2
--- a/sysdeps/i386/i686/multiarch/ifunc-sse4_2.h
446cf2
+++ b/sysdeps/i386/i686/multiarch/ifunc-sse4_2.h
446cf2
@@ -27,7 +27,7 @@ IFUNC_SELECTOR (void)
446cf2
 {
446cf2
   const struct cpu_features* cpu_features = __get_cpu_features ();
446cf2
 
446cf2
-  if (CPU_FEATURES_CPU_P (cpu_features, SSE4_2))
446cf2
+  if (CPU_FEATURE_USABLE_P (cpu_features, SSE4_2))
446cf2
     return OPTIMIZE (sse42);
446cf2
 
446cf2
   return OPTIMIZE (ia32);
446cf2
diff --git a/sysdeps/i386/i686/multiarch/ifunc-ssse3-sse4_2.h b/sysdeps/i386/i686/multiarch/ifunc-ssse3-sse4_2.h
446cf2
index bd772a9298ab7d6b..6b2b461e47e94b66 100644
446cf2
--- a/sysdeps/i386/i686/multiarch/ifunc-ssse3-sse4_2.h
446cf2
+++ b/sysdeps/i386/i686/multiarch/ifunc-ssse3-sse4_2.h
446cf2
@@ -29,10 +29,10 @@ IFUNC_SELECTOR (void)
446cf2
 {
446cf2
   const struct cpu_features* cpu_features = __get_cpu_features ();
446cf2
 
446cf2
-  if (CPU_FEATURES_CPU_P (cpu_features, SSE4_2))
446cf2
+  if (CPU_FEATURE_USABLE_P (cpu_features, SSE4_2))
446cf2
     return OPTIMIZE (sse4_2);
446cf2
 
446cf2
-  if (CPU_FEATURES_CPU_P (cpu_features, SSSE3))
446cf2
+  if (CPU_FEATURE_USABLE_P (cpu_features, SSSE3))
446cf2
     return OPTIMIZE (ssse3);
446cf2
 
446cf2
   return OPTIMIZE (ia32);
446cf2
diff --git a/sysdeps/i386/i686/multiarch/s_fma.c b/sysdeps/i386/i686/multiarch/s_fma.c
446cf2
index 7f39f5fdc972fcc7..0cf6e41b03043911 100644
446cf2
--- a/sysdeps/i386/i686/multiarch/s_fma.c
446cf2
+++ b/sysdeps/i386/i686/multiarch/s_fma.c
446cf2
@@ -27,7 +27,7 @@ extern double __fma_ia32 (double x, double y, double z) attribute_hidden;
446cf2
 extern double __fma_fma (double x, double y, double z) attribute_hidden;
446cf2
 
446cf2
 libm_ifunc (__fma,
446cf2
-	    HAS_ARCH_FEATURE (FMA_Usable) ? __fma_fma : __fma_ia32);
446cf2
+	    CPU_FEATURE_USABLE (FMA) ? __fma_fma : __fma_ia32);
446cf2
 libm_alias_double (__fma, fma)
446cf2
 
446cf2
 #define __fma __fma_ia32
446cf2
diff --git a/sysdeps/i386/i686/multiarch/s_fmaf.c b/sysdeps/i386/i686/multiarch/s_fmaf.c
446cf2
index 1ebb6e975ee86f54..638cd5b10ba57592 100644
446cf2
--- a/sysdeps/i386/i686/multiarch/s_fmaf.c
446cf2
+++ b/sysdeps/i386/i686/multiarch/s_fmaf.c
446cf2
@@ -27,7 +27,7 @@ extern float __fmaf_ia32 (float x, float y, float z) attribute_hidden;
446cf2
 extern float __fmaf_fma (float x, float y, float z) attribute_hidden;
446cf2
 
446cf2
 libm_ifunc (__fmaf,
446cf2
-	    HAS_ARCH_FEATURE (FMA_Usable) ? __fmaf_fma : __fmaf_ia32);
446cf2
+	    CPU_FEATURE_USABLE (FMA) ? __fmaf_fma : __fmaf_ia32);
446cf2
 libm_alias_float (__fma, fma)
446cf2
 
446cf2
 #define __fmaf __fmaf_ia32
446cf2
diff --git a/sysdeps/i386/i686/multiarch/wcscpy.c b/sysdeps/i386/i686/multiarch/wcscpy.c
446cf2
index be89ab81b066d463..ea149b0d3af357f2 100644
446cf2
--- a/sysdeps/i386/i686/multiarch/wcscpy.c
446cf2
+++ b/sysdeps/i386/i686/multiarch/wcscpy.c
446cf2
@@ -34,7 +34,7 @@ IFUNC_SELECTOR (void)
446cf2
 {
446cf2
   const struct cpu_features* cpu_features = __get_cpu_features ();
446cf2
 
446cf2
-  if (CPU_FEATURES_CPU_P (cpu_features, SSSE3))
446cf2
+  if (CPU_FEATURE_USABLE_P (cpu_features, SSSE3))
446cf2
     return OPTIMIZE (ssse3);
446cf2
 
446cf2
   return OPTIMIZE (ia32);
446cf2
diff --git a/sysdeps/i386/setfpucw.c b/sysdeps/i386/setfpucw.c
446cf2
index 931302bcd03d221b..3fa2651d46a70ab6 100644
446cf2
--- a/sysdeps/i386/setfpucw.c
446cf2
+++ b/sysdeps/i386/setfpucw.c
446cf2
@@ -39,7 +39,7 @@ __setfpucw (fpu_control_t set)
446cf2
   __asm__ ("fldcw %0" : : "m" (*&cw);;
446cf2
 
446cf2
   /* If the CPU supports SSE, we set the MXCSR as well.  */
446cf2
-  if (HAS_CPU_FEATURE (SSE))
446cf2
+  if (CPU_FEATURE_USABLE (SSE))
446cf2
     {
446cf2
       unsigned int xnew_exc;
446cf2
 
446cf2
diff --git a/sysdeps/unix/sysv/linux/x86/elision-conf.c b/sysdeps/unix/sysv/linux/x86/elision-conf.c
446cf2
index 22af294426596add..bdfc514a238f92a8 100644
446cf2
--- a/sysdeps/unix/sysv/linux/x86/elision-conf.c
446cf2
+++ b/sysdeps/unix/sysv/linux/x86/elision-conf.c
446cf2
@@ -64,7 +64,7 @@ do_set_elision_enable (int32_t elision_enable)
446cf2
      if __libc_enable_secure isn't enabled since elision_enable will be set
446cf2
      according to the default, which is disabled.  */
446cf2
   if (elision_enable == 1)
446cf2
-    __pthread_force_elision = HAS_CPU_FEATURE (RTM) ? 1 : 0;
446cf2
+    __pthread_force_elision = CPU_FEATURE_USABLE (RTM) ? 1 : 0;
446cf2
 }
446cf2
 
446cf2
 /* The pthread->elision_enable tunable is 0 or 1 indicating that elision
446cf2
diff --git a/sysdeps/x86/cacheinfo.c b/sysdeps/x86/cacheinfo.c
446cf2
index f4edbc0103beb435..fdfe2684759d968c 100644
446cf2
--- a/sysdeps/x86/cacheinfo.c
446cf2
+++ b/sysdeps/x86/cacheinfo.c
446cf2
@@ -583,7 +583,7 @@ get_common_cache_info (long int *shared_ptr, unsigned int *threads_ptr,
446cf2
 
446cf2
   /* A value of 0 for the HTT bit indicates there is only a single
446cf2
      logical processor.  */
446cf2
-  if (HAS_CPU_FEATURE (HTT))
446cf2
+  if (CPU_FEATURE_USABLE (HTT))
446cf2
     {
446cf2
       /* Figure out the number of logical threads that share the
446cf2
          highest cache level.  */
446cf2
@@ -732,7 +732,7 @@ intel_bug_no_cache_info:
446cf2
           /* Assume that all logical threads share the highest cache
446cf2
              level.  */
446cf2
           threads
446cf2
-            = ((cpu_features->cpuid[COMMON_CPUID_INDEX_1].ebx
446cf2
+            = ((cpu_features->features[COMMON_CPUID_INDEX_1].cpuid.ebx
446cf2
                 >> 16) & 0xff);
446cf2
         }
446cf2
 
446cf2
@@ -887,14 +887,14 @@ init_cacheinfo (void)
446cf2
   unsigned int minimum_rep_movsb_threshold;
446cf2
   /* NB: The default REP MOVSB threshold is 2048 * (VEC_SIZE / 16).  */
446cf2
   unsigned int rep_movsb_threshold;
446cf2
-  if (CPU_FEATURES_ARCH_P (cpu_features, AVX512F_Usable)
446cf2
-      && !CPU_FEATURES_ARCH_P (cpu_features, Prefer_No_AVX512))
446cf2
+  if (CPU_FEATURE_USABLE_P (cpu_features, AVX512F)
446cf2
+      && !CPU_FEATURE_PREFERRED_P (cpu_features, Prefer_No_AVX512))
446cf2
     {
446cf2
       rep_movsb_threshold = 2048 * (64 / 16);
446cf2
       minimum_rep_movsb_threshold = 64 * 8;
446cf2
     }
446cf2
-  else if (CPU_FEATURES_ARCH_P (cpu_features,
446cf2
-				AVX_Fast_Unaligned_Load))
446cf2
+  else if (CPU_FEATURE_PREFERRED_P (cpu_features,
446cf2
+				    AVX_Fast_Unaligned_Load))
446cf2
     {
446cf2
       rep_movsb_threshold = 2048 * (32 / 16);
446cf2
       minimum_rep_movsb_threshold = 32 * 8;
446cf2
diff --git a/sysdeps/x86/cpu-features.c b/sysdeps/x86/cpu-features.c
446cf2
index ad470f79ef7769fc..f13a1df4555c7000 100644
446cf2
--- a/sysdeps/x86/cpu-features.c
446cf2
+++ b/sysdeps/x86/cpu-features.c
446cf2
@@ -42,73 +42,109 @@ extern void TUNABLE_CALLBACK (set_x86_shstk) (tunable_val_t *)
446cf2
 #endif
446cf2
 
446cf2
 static void
446cf2
-get_extended_indices (struct cpu_features *cpu_features)
446cf2
+update_usable (struct cpu_features *cpu_features)
446cf2
 {
446cf2
-  unsigned int eax, ebx, ecx, edx;
446cf2
-  __cpuid (0x80000000, eax, ebx, ecx, edx);
446cf2
-  if (eax >= 0x80000001)
446cf2
-    __cpuid (0x80000001,
446cf2
-	     cpu_features->cpuid[COMMON_CPUID_INDEX_80000001].eax,
446cf2
-	     cpu_features->cpuid[COMMON_CPUID_INDEX_80000001].ebx,
446cf2
-	     cpu_features->cpuid[COMMON_CPUID_INDEX_80000001].ecx,
446cf2
-	     cpu_features->cpuid[COMMON_CPUID_INDEX_80000001].edx);
446cf2
-  if (eax >= 0x80000007)
446cf2
-    __cpuid (0x80000007,
446cf2
-	     cpu_features->cpuid[COMMON_CPUID_INDEX_80000007].eax,
446cf2
-	     cpu_features->cpuid[COMMON_CPUID_INDEX_80000007].ebx,
446cf2
-	     cpu_features->cpuid[COMMON_CPUID_INDEX_80000007].ecx,
446cf2
-	     cpu_features->cpuid[COMMON_CPUID_INDEX_80000007].edx);
446cf2
-  if (eax >= 0x80000008)
446cf2
-    __cpuid (0x80000008,
446cf2
-	     cpu_features->cpuid[COMMON_CPUID_INDEX_80000008].eax,
446cf2
-	     cpu_features->cpuid[COMMON_CPUID_INDEX_80000008].ebx,
446cf2
-	     cpu_features->cpuid[COMMON_CPUID_INDEX_80000008].ecx,
446cf2
-	     cpu_features->cpuid[COMMON_CPUID_INDEX_80000008].edx);
446cf2
-}
446cf2
-
446cf2
-static void
446cf2
-get_common_indices (struct cpu_features *cpu_features,
446cf2
-		    unsigned int *family, unsigned int *model,
446cf2
-		    unsigned int *extended_model, unsigned int *stepping)
446cf2
-{
446cf2
-  if (family)
446cf2
-    {
446cf2
-      unsigned int eax;
446cf2
-      __cpuid (1, eax, cpu_features->cpuid[COMMON_CPUID_INDEX_1].ebx,
446cf2
-	       cpu_features->cpuid[COMMON_CPUID_INDEX_1].ecx,
446cf2
-	       cpu_features->cpuid[COMMON_CPUID_INDEX_1].edx);
446cf2
-      cpu_features->cpuid[COMMON_CPUID_INDEX_1].eax = eax;
446cf2
-      *family = (eax >> 8) & 0x0f;
446cf2
-      *model = (eax >> 4) & 0x0f;
446cf2
-      *extended_model = (eax >> 12) & 0xf0;
446cf2
-      *stepping = eax & 0x0f;
446cf2
-      if (*family == 0x0f)
446cf2
-	{
446cf2
-	  *family += (eax >> 20) & 0xff;
446cf2
-	  *model += *extended_model;
446cf2
-	}
446cf2
-    }
446cf2
-
446cf2
-  if (cpu_features->basic.max_cpuid >= 7)
446cf2
-    {
446cf2
-      __cpuid_count (7, 0,
446cf2
-		     cpu_features->cpuid[COMMON_CPUID_INDEX_7].eax,
446cf2
-		     cpu_features->cpuid[COMMON_CPUID_INDEX_7].ebx,
446cf2
-		     cpu_features->cpuid[COMMON_CPUID_INDEX_7].ecx,
446cf2
-		     cpu_features->cpuid[COMMON_CPUID_INDEX_7].edx);
446cf2
-      __cpuid_count (7, 1,
446cf2
-		     cpu_features->cpuid[COMMON_CPUID_INDEX_7_ECX_1].eax,
446cf2
-		     cpu_features->cpuid[COMMON_CPUID_INDEX_7_ECX_1].ebx,
446cf2
-		     cpu_features->cpuid[COMMON_CPUID_INDEX_7_ECX_1].ecx,
446cf2
-		     cpu_features->cpuid[COMMON_CPUID_INDEX_7_ECX_1].edx);
446cf2
-    }
446cf2
-
446cf2
-  if (cpu_features->basic.max_cpuid >= 0xd)
446cf2
-    __cpuid_count (0xd, 1,
446cf2
-		   cpu_features->cpuid[COMMON_CPUID_INDEX_D_ECX_1].eax,
446cf2
-		   cpu_features->cpuid[COMMON_CPUID_INDEX_D_ECX_1].ebx,
446cf2
-		   cpu_features->cpuid[COMMON_CPUID_INDEX_D_ECX_1].ecx,
446cf2
-		   cpu_features->cpuid[COMMON_CPUID_INDEX_D_ECX_1].edx);
446cf2
+  /* Before COMMON_CPUID_INDEX_80000001, copy the cpuid array elements to
446cf2
+     the usable array.  */
446cf2
+  unsigned int i;
446cf2
+  for (i = 0; i < COMMON_CPUID_INDEX_80000001; i++)
446cf2
+    cpu_features->features[i].usable = cpu_features->features[i].cpuid;
446cf2
+
446cf2
+  /* Before COMMON_CPUID_INDEX_80000001, clear the unknown usable bits
446cf2
+     and the always zero bits.  */
446cf2
+  CPU_FEATURE_UNSET (cpu_features, INDEX_1_ECX_16);
446cf2
+  CPU_FEATURE_UNSET (cpu_features, INDEX_1_ECX_31);
446cf2
+  CPU_FEATURE_UNSET (cpu_features, INDEX_1_EDX_10);
446cf2
+  CPU_FEATURE_UNSET (cpu_features, INDEX_1_EDX_20);
446cf2
+  CPU_FEATURE_UNSET (cpu_features, INDEX_1_EDX_30);
446cf2
+  CPU_FEATURE_UNSET (cpu_features, INDEX_7_EBX_6);
446cf2
+  CPU_FEATURE_UNSET (cpu_features, INDEX_7_EBX_22);
446cf2
+  CPU_FEATURE_UNSET (cpu_features, INDEX_7_ECX_13);
446cf2
+  CPU_FEATURE_UNSET (cpu_features, INDEX_7_ECX_15);
446cf2
+  CPU_FEATURE_UNSET (cpu_features, INDEX_7_ECX_16);
446cf2
+  CPU_FEATURE_UNSET (cpu_features, INDEX_7_ECX_23);
446cf2
+  CPU_FEATURE_UNSET (cpu_features, INDEX_7_ECX_24);
446cf2
+  CPU_FEATURE_UNSET (cpu_features, INDEX_7_ECX_26);
446cf2
+  CPU_FEATURE_UNSET (cpu_features, INDEX_7_EDX_0);
446cf2
+  CPU_FEATURE_UNSET (cpu_features, INDEX_7_EDX_1);
446cf2
+  CPU_FEATURE_UNSET (cpu_features, INDEX_7_EDX_5);
446cf2
+  CPU_FEATURE_UNSET (cpu_features, INDEX_7_EDX_6);
446cf2
+  CPU_FEATURE_UNSET (cpu_features, INDEX_7_EDX_7);
446cf2
+  CPU_FEATURE_UNSET (cpu_features, INDEX_7_EDX_9);
446cf2
+  CPU_FEATURE_UNSET (cpu_features, INDEX_7_EDX_11);
446cf2
+  CPU_FEATURE_UNSET (cpu_features, INDEX_7_EDX_12);
446cf2
+  CPU_FEATURE_UNSET (cpu_features, INDEX_7_EDX_13);
446cf2
+  CPU_FEATURE_UNSET (cpu_features, INDEX_7_EDX_17);
446cf2
+  CPU_FEATURE_UNSET (cpu_features, INDEX_7_EDX_19);
446cf2
+  CPU_FEATURE_UNSET (cpu_features, INDEX_7_EDX_21);
446cf2
+  CPU_FEATURE_UNSET (cpu_features, INDEX_7_EDX_23);
446cf2
+
446cf2
+  /* EAX/EBX from COMMON_CPUID_INDEX_1 and EAX from COMMON_CPUID_INDEX_7
446cf2
+     aren't used for CPU feature detection.  */
446cf2
+  cpu_features->features[COMMON_CPUID_INDEX_1].usable.eax = 0;
446cf2
+  cpu_features->features[COMMON_CPUID_INDEX_1].usable.ebx = 0;
446cf2
+  cpu_features->features[COMMON_CPUID_INDEX_7].usable.eax = 0;
446cf2
+
446cf2
+  /* Starting from COMMON_CPUID_INDEX_80000001, copy the cpuid bits to
446cf2
+     usable bits.  */
446cf2
+  CPU_FEATURE_SET_USABLE (cpu_features, LAHF64_SAHF64);
446cf2
+  CPU_FEATURE_SET_USABLE (cpu_features, SVM);
446cf2
+  CPU_FEATURE_SET_USABLE (cpu_features, LZCNT);
446cf2
+  CPU_FEATURE_SET_USABLE (cpu_features, SSE4A);
446cf2
+  CPU_FEATURE_SET_USABLE (cpu_features, PREFETCHW);
446cf2
+  CPU_FEATURE_SET_USABLE (cpu_features, XOP);
446cf2
+  CPU_FEATURE_SET_USABLE (cpu_features, LWP);
446cf2
+  CPU_FEATURE_SET_USABLE (cpu_features, FMA4);
446cf2
+  CPU_FEATURE_SET_USABLE (cpu_features, TBM);
446cf2
+  CPU_FEATURE_SET_USABLE (cpu_features, SYSCALL_SYSRET);
446cf2
+  CPU_FEATURE_SET_USABLE (cpu_features, NX);
446cf2
+  CPU_FEATURE_SET_USABLE (cpu_features, PAGE1GB);
446cf2
+  CPU_FEATURE_SET_USABLE (cpu_features, RDTSCP);
446cf2
+  CPU_FEATURE_SET_USABLE (cpu_features, LM);
446cf2
+  CPU_FEATURE_SET_USABLE (cpu_features, XSAVEOPT);
446cf2
+  CPU_FEATURE_SET_USABLE (cpu_features, XSAVEC);
446cf2
+  CPU_FEATURE_SET_USABLE (cpu_features, XGETBV_ECX_1);
446cf2
+  CPU_FEATURE_SET_USABLE (cpu_features, XSAVES);
446cf2
+  CPU_FEATURE_SET_USABLE (cpu_features, XFD);
446cf2
+  CPU_FEATURE_SET_USABLE (cpu_features, INVARIANT_TSC);
446cf2
+  CPU_FEATURE_SET_USABLE (cpu_features, WBNOINVD);
446cf2
+  CPU_FEATURE_SET_USABLE (cpu_features, AVX512_BF16);
446cf2
+
446cf2
+  /* MPX has been deprecated.  */
446cf2
+  CPU_FEATURE_UNSET (cpu_features, MPX);
446cf2
+
446cf2
+  /* Clear the usable bits which require OS support.  */
446cf2
+  CPU_FEATURE_UNSET (cpu_features, FMA);
446cf2
+  CPU_FEATURE_UNSET (cpu_features, AVX);
446cf2
+  CPU_FEATURE_UNSET (cpu_features, F16C);
446cf2
+  CPU_FEATURE_UNSET (cpu_features, AVX2);
446cf2
+  CPU_FEATURE_UNSET (cpu_features, AVX512F);
446cf2
+  CPU_FEATURE_UNSET (cpu_features, AVX512DQ);
446cf2
+  CPU_FEATURE_UNSET (cpu_features, AVX512_IFMA);
446cf2
+  CPU_FEATURE_UNSET (cpu_features, AVX512PF);
446cf2
+  CPU_FEATURE_UNSET (cpu_features, AVX512ER);
446cf2
+  CPU_FEATURE_UNSET (cpu_features, AVX512CD);
446cf2
+  CPU_FEATURE_UNSET (cpu_features, AVX512BW);
446cf2
+  CPU_FEATURE_UNSET (cpu_features, AVX512VL);
446cf2
+  CPU_FEATURE_UNSET (cpu_features, AVX512_VBMI);
446cf2
+  CPU_FEATURE_UNSET (cpu_features, PKU);
446cf2
+  CPU_FEATURE_UNSET (cpu_features, AVX512_VBMI2);
446cf2
+  CPU_FEATURE_UNSET (cpu_features, VAES);
446cf2
+  CPU_FEATURE_UNSET (cpu_features, VPCLMULQDQ);
446cf2
+  CPU_FEATURE_UNSET (cpu_features, AVX512_VNNI);
446cf2
+  CPU_FEATURE_UNSET (cpu_features, AVX512_BITALG);
446cf2
+  CPU_FEATURE_UNSET (cpu_features, AVX512_VPOPCNTDQ);
446cf2
+  CPU_FEATURE_UNSET (cpu_features, AVX512_4VNNIW);
446cf2
+  CPU_FEATURE_UNSET (cpu_features, AVX512_4FMAPS);
446cf2
+  CPU_FEATURE_UNSET (cpu_features, AVX512_VP2INTERSECT);
446cf2
+  CPU_FEATURE_UNSET (cpu_features, AMX_BF16);
446cf2
+  CPU_FEATURE_UNSET (cpu_features, AMX_TILE);
446cf2
+  CPU_FEATURE_UNSET (cpu_features, AMX_INT8);
446cf2
+  CPU_FEATURE_UNSET (cpu_features, XOP);
446cf2
+  CPU_FEATURE_UNSET (cpu_features, FMA4);
446cf2
+  CPU_FEATURE_UNSET (cpu_features, XSAVEC);
446cf2
+  CPU_FEATURE_UNSET (cpu_features, XFD);
446cf2
+  CPU_FEATURE_UNSET (cpu_features, AVX512_BF16);
446cf2
 
446cf2
   /* Can we call xgetbv?  */
446cf2
   if (CPU_FEATURES_CPU_P (cpu_features, OSXSAVE))
446cf2
@@ -123,40 +159,28 @@ get_common_indices (struct cpu_features *cpu_features,
446cf2
 	  /* Determine if AVX is usable.  */
446cf2
 	  if (CPU_FEATURES_CPU_P (cpu_features, AVX))
446cf2
 	    {
446cf2
-	      cpu_features->usable[index_arch_AVX_Usable]
446cf2
-		|= bit_arch_AVX_Usable;
446cf2
+	      CPU_FEATURE_SET (cpu_features, AVX);
446cf2
 	      /* The following features depend on AVX being usable.  */
446cf2
 	      /* Determine if AVX2 is usable.  */
446cf2
 	      if (CPU_FEATURES_CPU_P (cpu_features, AVX2))
446cf2
-	      {
446cf2
-		cpu_features->usable[index_arch_AVX2_Usable]
446cf2
-		  |= bit_arch_AVX2_Usable;
446cf2
-
446cf2
-	        /* Unaligned load with 256-bit AVX registers are faster on
446cf2
-	           Intel/AMD processors with AVX2.  */
446cf2
-	        cpu_features->preferred[index_arch_AVX_Fast_Unaligned_Load]
446cf2
-		  |= bit_arch_AVX_Fast_Unaligned_Load;
446cf2
-	      }
446cf2
+		{
446cf2
+		  CPU_FEATURE_SET (cpu_features, AVX2);
446cf2
+
446cf2
+		  /* Unaligned load with 256-bit AVX registers are faster
446cf2
+		     on Intel/AMD processors with AVX2.  */
446cf2
+		  cpu_features->preferred[index_arch_AVX_Fast_Unaligned_Load]
446cf2
+		    |= bit_arch_AVX_Fast_Unaligned_Load;
446cf2
+		}
446cf2
 	      /* Determine if FMA is usable.  */
446cf2
-	      if (CPU_FEATURES_CPU_P (cpu_features, FMA))
446cf2
-		cpu_features->usable[index_arch_FMA_Usable]
446cf2
-		  |= bit_arch_FMA_Usable;
446cf2
+	      CPU_FEATURE_SET_USABLE (cpu_features, FMA);
446cf2
 	      /* Determine if VAES is usable.  */
446cf2
-	      if (CPU_FEATURES_CPU_P (cpu_features, VAES))
446cf2
-		cpu_features->usable[index_arch_VAES_Usable]
446cf2
-		  |= bit_arch_VAES_Usable;
446cf2
+	      CPU_FEATURE_SET_USABLE (cpu_features, VAES);
446cf2
 	      /* Determine if VPCLMULQDQ is usable.  */
446cf2
-	      if (CPU_FEATURES_CPU_P (cpu_features, VPCLMULQDQ))
446cf2
-		cpu_features->usable[index_arch_VPCLMULQDQ_Usable]
446cf2
-		  |= bit_arch_VPCLMULQDQ_Usable;
446cf2
+	      CPU_FEATURE_SET_USABLE (cpu_features, VPCLMULQDQ);
446cf2
 	      /* Determine if XOP is usable.  */
446cf2
-	      if (CPU_FEATURES_CPU_P (cpu_features, XOP))
446cf2
-		cpu_features->usable[index_arch_XOP_Usable]
446cf2
-		  |= bit_arch_XOP_Usable;
446cf2
+	      CPU_FEATURE_SET_USABLE (cpu_features, XOP);
446cf2
 	      /* Determine if F16C is usable.  */
446cf2
-	      if (CPU_FEATURES_CPU_P (cpu_features, F16C))
446cf2
-		cpu_features->usable[index_arch_F16C_Usable]
446cf2
-		  |= bit_arch_F16C_Usable;
446cf2
+	      CPU_FEATURE_SET_USABLE (cpu_features, F16C);
446cf2
 	    }
446cf2
 
446cf2
 	  /* Check if OPMASK state, upper 256-bit of ZMM0-ZMM15 and
446cf2
@@ -168,73 +192,41 @@ get_common_indices (struct cpu_features *cpu_features,
446cf2
 	      /* Determine if AVX512F is usable.  */
446cf2
 	      if (CPU_FEATURES_CPU_P (cpu_features, AVX512F))
446cf2
 		{
446cf2
-		  cpu_features->usable[index_arch_AVX512F_Usable]
446cf2
-		    |= bit_arch_AVX512F_Usable;
446cf2
+		  CPU_FEATURE_SET (cpu_features, AVX512F);
446cf2
 		  /* Determine if AVX512CD is usable.  */
446cf2
-		  if (CPU_FEATURES_CPU_P (cpu_features, AVX512CD))
446cf2
-		    cpu_features->usable[index_arch_AVX512CD_Usable]
446cf2
-		      |= bit_arch_AVX512CD_Usable;
446cf2
+		  CPU_FEATURE_SET_USABLE (cpu_features, AVX512CD);
446cf2
 		  /* Determine if AVX512ER is usable.  */
446cf2
-		  if (CPU_FEATURES_CPU_P (cpu_features, AVX512ER))
446cf2
-		    cpu_features->usable[index_arch_AVX512ER_Usable]
446cf2
-		      |= bit_arch_AVX512ER_Usable;
446cf2
+		  CPU_FEATURE_SET_USABLE (cpu_features, AVX512ER);
446cf2
 		  /* Determine if AVX512PF is usable.  */
446cf2
-		  if (CPU_FEATURES_CPU_P (cpu_features, AVX512PF))
446cf2
-		    cpu_features->usable[index_arch_AVX512PF_Usable]
446cf2
-		      |= bit_arch_AVX512PF_Usable;
446cf2
+		  CPU_FEATURE_SET_USABLE (cpu_features, AVX512PF);
446cf2
 		  /* Determine if AVX512VL is usable.  */
446cf2
-		  if (CPU_FEATURES_CPU_P (cpu_features, AVX512VL))
446cf2
-		    cpu_features->usable[index_arch_AVX512VL_Usable]
446cf2
-		      |= bit_arch_AVX512VL_Usable;
446cf2
+		  CPU_FEATURE_SET_USABLE (cpu_features, AVX512VL);
446cf2
 		  /* Determine if AVX512DQ is usable.  */
446cf2
-		  if (CPU_FEATURES_CPU_P (cpu_features, AVX512DQ))
446cf2
-		    cpu_features->usable[index_arch_AVX512DQ_Usable]
446cf2
-		      |= bit_arch_AVX512DQ_Usable;
446cf2
+		  CPU_FEATURE_SET_USABLE (cpu_features, AVX512DQ);
446cf2
 		  /* Determine if AVX512BW is usable.  */
446cf2
-		  if (CPU_FEATURES_CPU_P (cpu_features, AVX512BW))
446cf2
-		    cpu_features->usable[index_arch_AVX512BW_Usable]
446cf2
-		      |= bit_arch_AVX512BW_Usable;
446cf2
+		  CPU_FEATURE_SET_USABLE (cpu_features, AVX512BW);
446cf2
 		  /* Determine if AVX512_4FMAPS is usable.  */
446cf2
-		  if (CPU_FEATURES_CPU_P (cpu_features, AVX512_4FMAPS))
446cf2
-		    cpu_features->usable[index_arch_AVX512_4FMAPS_Usable]
446cf2
-		      |= bit_arch_AVX512_4FMAPS_Usable;
446cf2
+		  CPU_FEATURE_SET_USABLE (cpu_features, AVX512_4FMAPS);
446cf2
 		  /* Determine if AVX512_4VNNIW is usable.  */
446cf2
-		  if (CPU_FEATURES_CPU_P (cpu_features, AVX512_4VNNIW))
446cf2
-		    cpu_features->usable[index_arch_AVX512_4VNNIW_Usable]
446cf2
-		      |= bit_arch_AVX512_4VNNIW_Usable;
446cf2
+		  CPU_FEATURE_SET_USABLE (cpu_features, AVX512_4VNNIW);
446cf2
 		  /* Determine if AVX512_BITALG is usable.  */
446cf2
-		  if (CPU_FEATURES_CPU_P (cpu_features, AVX512_BITALG))
446cf2
-		    cpu_features->usable[index_arch_AVX512_BITALG_Usable]
446cf2
-		      |= bit_arch_AVX512_BITALG_Usable;
446cf2
+		  CPU_FEATURE_SET_USABLE (cpu_features, AVX512_BITALG);
446cf2
 		  /* Determine if AVX512_IFMA is usable.  */
446cf2
-		  if (CPU_FEATURES_CPU_P (cpu_features, AVX512_IFMA))
446cf2
-		    cpu_features->usable[index_arch_AVX512_IFMA_Usable]
446cf2
-		      |= bit_arch_AVX512_IFMA_Usable;
446cf2
+		  CPU_FEATURE_SET_USABLE (cpu_features, AVX512_IFMA);
446cf2
 		  /* Determine if AVX512_VBMI is usable.  */
446cf2
-		  if (CPU_FEATURES_CPU_P (cpu_features, AVX512_VBMI))
446cf2
-		    cpu_features->usable[index_arch_AVX512_VBMI_Usable]
446cf2
-		      |= bit_arch_AVX512_VBMI_Usable;
446cf2
+		  CPU_FEATURE_SET_USABLE (cpu_features, AVX512_VBMI);
446cf2
 		  /* Determine if AVX512_VBMI2 is usable.  */
446cf2
-		  if (CPU_FEATURES_CPU_P (cpu_features, AVX512_VBMI2))
446cf2
-		    cpu_features->usable[index_arch_AVX512_VBMI2_Usable]
446cf2
-		      |= bit_arch_AVX512_VBMI2_Usable;
446cf2
+		  CPU_FEATURE_SET_USABLE (cpu_features, AVX512_VBMI2);
446cf2
 		  /* Determine if is AVX512_VNNI usable.  */
446cf2
-		  if (CPU_FEATURES_CPU_P (cpu_features, AVX512_VNNI))
446cf2
-		    cpu_features->usable[index_arch_AVX512_VNNI_Usable]
446cf2
-		      |= bit_arch_AVX512_VNNI_Usable;
446cf2
+		  CPU_FEATURE_SET_USABLE (cpu_features, AVX512_VNNI);
446cf2
 		  /* Determine if AVX512_VPOPCNTDQ is usable.  */
446cf2
-		  if (CPU_FEATURES_CPU_P (cpu_features, AVX512_VPOPCNTDQ))
446cf2
-		    cpu_features->usable[index_arch_AVX512_VPOPCNTDQ_Usable]
446cf2
-		      |= bit_arch_AVX512_VPOPCNTDQ_Usable;
446cf2
+		  CPU_FEATURE_SET_USABLE (cpu_features,
446cf2
+					  AVX512_VPOPCNTDQ);
446cf2
 		  /* Determine if AVX512_VP2INTERSECT is usable.  */
446cf2
-		  if (CPU_FEATURES_CPU_P (cpu_features,
446cf2
-					  AVX512_VP2INTERSECT))
446cf2
-		    cpu_features->usable[index_arch_AVX512_VP2INTERSECT_Usable]
446cf2
-		      |= bit_arch_AVX512_VP2INTERSECT_Usable;
446cf2
+		  CPU_FEATURE_SET_USABLE (cpu_features,
446cf2
+					  AVX512_VP2INTERSECT);
446cf2
 		  /* Determine if AVX512_BF16 is usable.  */
446cf2
-		  if (CPU_FEATURES_CPU_P (cpu_features, AVX512_BF16))
446cf2
-		    cpu_features->usable[index_arch_AVX512_BF16_Usable]
446cf2
-		      |= bit_arch_AVX512_BF16_Usable;
446cf2
+		  CPU_FEATURE_SET_USABLE (cpu_features, AVX512_BF16);
446cf2
 		}
446cf2
 	    }
446cf2
 	}
446cf2
@@ -244,19 +236,17 @@ get_common_indices (struct cpu_features *cpu_features,
446cf2
 	  == (bit_XTILECFG_state | bit_XTILEDATA_state))
446cf2
 	{
446cf2
 	  /* Determine if AMX_BF16 is usable.  */
446cf2
-	  if (CPU_FEATURES_CPU_P (cpu_features, AMX_BF16))
446cf2
-	    cpu_features->usable[index_arch_AMX_BF16_Usable]
446cf2
-	      |= bit_arch_AMX_BF16_Usable;
446cf2
+	  CPU_FEATURE_SET_USABLE (cpu_features, AMX_BF16);
446cf2
 	  /* Determine if AMX_TILE is usable.  */
446cf2
-	  if (CPU_FEATURES_CPU_P (cpu_features, AMX_TILE))
446cf2
-	    cpu_features->usable[index_arch_AMX_TILE_Usable]
446cf2
-	      |= bit_arch_AMX_TILE_Usable;
446cf2
+	  CPU_FEATURE_SET_USABLE (cpu_features, AMX_TILE);
446cf2
 	  /* Determine if AMX_INT8 is usable.  */
446cf2
-	  if (CPU_FEATURES_CPU_P (cpu_features, AMX_INT8))
446cf2
-	    cpu_features->usable[index_arch_AMX_INT8_Usable]
446cf2
-	      |= bit_arch_AMX_INT8_Usable;
446cf2
+	  CPU_FEATURE_SET_USABLE (cpu_features, AMX_INT8);
446cf2
 	}
446cf2
 
446cf2
+
446cf2
+      /* XFD is usable only when OSXSAVE is enabled.  */
446cf2
+      CPU_FEATURE_SET_USABLE (cpu_features, XFD);
446cf2
+
446cf2
       /* For _dl_runtime_resolve, set xsave_state_size to xsave area
446cf2
 	 size + integer register save size and align it to 64 bytes.  */
446cf2
       if (cpu_features->basic.max_cpuid >= 0xd)
446cf2
@@ -318,8 +308,7 @@ get_common_indices (struct cpu_features *cpu_features,
446cf2
 		    {
446cf2
 		      cpu_features->xsave_state_size
446cf2
 			= ALIGN_UP (size + STATE_SAVE_OFFSET, 64);
446cf2
-		      cpu_features->usable[index_arch_XSAVEC_Usable]
446cf2
-			|= bit_arch_XSAVEC_Usable;
446cf2
+		      CPU_FEATURE_SET (cpu_features, XSAVEC);
446cf2
 		    }
446cf2
 		}
446cf2
 	    }
446cf2
@@ -328,8 +317,79 @@ get_common_indices (struct cpu_features *cpu_features,
446cf2
 
446cf2
   /* Determine if PKU is usable.  */
446cf2
   if (CPU_FEATURES_CPU_P (cpu_features, OSPKE))
446cf2
-    cpu_features->usable[index_arch_PKU_Usable]
446cf2
-      |= bit_arch_PKU_Usable;
446cf2
+    CPU_FEATURE_SET (cpu_features, PKU);
446cf2
+}
446cf2
+
446cf2
+static void
446cf2
+get_extended_indices (struct cpu_features *cpu_features)
446cf2
+{
446cf2
+  unsigned int eax, ebx, ecx, edx;
446cf2
+  __cpuid (0x80000000, eax, ebx, ecx, edx);
446cf2
+  if (eax >= 0x80000001)
446cf2
+    __cpuid (0x80000001,
446cf2
+	     cpu_features->features[COMMON_CPUID_INDEX_80000001].cpuid.eax,
446cf2
+	     cpu_features->features[COMMON_CPUID_INDEX_80000001].cpuid.ebx,
446cf2
+	     cpu_features->features[COMMON_CPUID_INDEX_80000001].cpuid.ecx,
446cf2
+	     cpu_features->features[COMMON_CPUID_INDEX_80000001].cpuid.edx);
446cf2
+  if (eax >= 0x80000007)
446cf2
+    __cpuid (0x80000007,
446cf2
+	     cpu_features->features[COMMON_CPUID_INDEX_80000007].cpuid.eax,
446cf2
+	     cpu_features->features[COMMON_CPUID_INDEX_80000007].cpuid.ebx,
446cf2
+	     cpu_features->features[COMMON_CPUID_INDEX_80000007].cpuid.ecx,
446cf2
+	     cpu_features->features[COMMON_CPUID_INDEX_80000007].cpuid.edx);
446cf2
+  if (eax >= 0x80000008)
446cf2
+    __cpuid (0x80000008,
446cf2
+	     cpu_features->features[COMMON_CPUID_INDEX_80000008].cpuid.eax,
446cf2
+	     cpu_features->features[COMMON_CPUID_INDEX_80000008].cpuid.ebx,
446cf2
+	     cpu_features->features[COMMON_CPUID_INDEX_80000008].cpuid.ecx,
446cf2
+	     cpu_features->features[COMMON_CPUID_INDEX_80000008].cpuid.edx);
446cf2
+}
446cf2
+
446cf2
+static void
446cf2
+get_common_indices (struct cpu_features *cpu_features,
446cf2
+		    unsigned int *family, unsigned int *model,
446cf2
+		    unsigned int *extended_model, unsigned int *stepping)
446cf2
+{
446cf2
+  if (family)
446cf2
+    {
446cf2
+      unsigned int eax;
446cf2
+      __cpuid (1, eax,
446cf2
+	       cpu_features->features[COMMON_CPUID_INDEX_1].cpuid.ebx,
446cf2
+	       cpu_features->features[COMMON_CPUID_INDEX_1].cpuid.ecx,
446cf2
+	       cpu_features->features[COMMON_CPUID_INDEX_1].cpuid.edx);
446cf2
+      cpu_features->features[COMMON_CPUID_INDEX_1].cpuid.eax = eax;
446cf2
+      *family = (eax >> 8) & 0x0f;
446cf2
+      *model = (eax >> 4) & 0x0f;
446cf2
+      *extended_model = (eax >> 12) & 0xf0;
446cf2
+      *stepping = eax & 0x0f;
446cf2
+      if (*family == 0x0f)
446cf2
+	{
446cf2
+	  *family += (eax >> 20) & 0xff;
446cf2
+	  *model += *extended_model;
446cf2
+	}
446cf2
+    }
446cf2
+
446cf2
+  if (cpu_features->basic.max_cpuid >= 7)
446cf2
+    {
446cf2
+      __cpuid_count (7, 0,
446cf2
+		     cpu_features->features[COMMON_CPUID_INDEX_7].cpuid.eax,
446cf2
+		     cpu_features->features[COMMON_CPUID_INDEX_7].cpuid.ebx,
446cf2
+		     cpu_features->features[COMMON_CPUID_INDEX_7].cpuid.ecx,
446cf2
+		     cpu_features->features[COMMON_CPUID_INDEX_7].cpuid.edx);
446cf2
+      __cpuid_count (7, 1,
446cf2
+		     cpu_features->features[COMMON_CPUID_INDEX_7_ECX_1].cpuid.eax,
446cf2
+		     cpu_features->features[COMMON_CPUID_INDEX_7_ECX_1].cpuid.ebx,
446cf2
+		     cpu_features->features[COMMON_CPUID_INDEX_7_ECX_1].cpuid.ecx,
446cf2
+		     cpu_features->features[COMMON_CPUID_INDEX_7_ECX_1].cpuid.edx);
446cf2
+    }
446cf2
+
446cf2
+  if (cpu_features->basic.max_cpuid >= 0xd)
446cf2
+    __cpuid_count (0xd, 1,
446cf2
+		   cpu_features->features[COMMON_CPUID_INDEX_D_ECX_1].cpuid.eax,
446cf2
+		   cpu_features->features[COMMON_CPUID_INDEX_D_ECX_1].cpuid.ebx,
446cf2
+		   cpu_features->features[COMMON_CPUID_INDEX_D_ECX_1].cpuid.ecx,
446cf2
+		   cpu_features->features[COMMON_CPUID_INDEX_D_ECX_1].cpuid.edx);
446cf2
+
446cf2
 }
446cf2
 
446cf2
 _Static_assert (((index_arch_Fast_Unaligned_Load
446cf2
@@ -353,8 +413,6 @@ init_cpu_features (struct cpu_features *cpu_features)
446cf2
   unsigned int stepping = 0;
446cf2
   enum cpu_features_kind kind;
446cf2
 
446cf2
-  cpu_features->usable_p = cpu_features->usable;
446cf2
-
446cf2
 #if !HAS_CPUID
446cf2
   if (__get_cpuid_max (0, 0) == 0)
446cf2
     {
446cf2
@@ -377,6 +435,8 @@ init_cpu_features (struct cpu_features *cpu_features)
446cf2
 
446cf2
       get_extended_indices (cpu_features);
446cf2
 
446cf2
+      update_usable (cpu_features);
446cf2
+
446cf2
       if (family == 0x06)
446cf2
 	{
446cf2
 	  model += extended_model;
446cf2
@@ -473,7 +533,7 @@ init_cpu_features (struct cpu_features *cpu_features)
446cf2
 		 with stepping >= 4) to avoid TSX on kernels that weren't
446cf2
 		 updated with the latest microcode package (which disables
446cf2
 		 broken feature by default).  */
446cf2
-	      cpu_features->cpuid[index_cpu_RTM].reg_RTM &= ~bit_cpu_RTM;
446cf2
+	      CPU_FEATURE_UNSET (cpu_features, RTM);
446cf2
 	      break;
446cf2
 	    }
446cf2
 	}
446cf2
@@ -501,15 +561,15 @@ init_cpu_features (struct cpu_features *cpu_features)
446cf2
 
446cf2
       get_extended_indices (cpu_features);
446cf2
 
446cf2
-      ecx = cpu_features->cpuid[COMMON_CPUID_INDEX_1].ecx;
446cf2
+      update_usable (cpu_features);
446cf2
 
446cf2
-      if (HAS_ARCH_FEATURE (AVX_Usable))
446cf2
+      ecx = cpu_features->features[COMMON_CPUID_INDEX_1].cpuid.ecx;
446cf2
+
446cf2
+      if (CPU_FEATURE_USABLE_P (cpu_features, AVX))
446cf2
 	{
446cf2
 	  /* Since the FMA4 bit is in COMMON_CPUID_INDEX_80000001 and
446cf2
 	     FMA4 requires AVX, determine if FMA4 is usable here.  */
446cf2
-	  if (CPU_FEATURES_CPU_P (cpu_features, FMA4))
446cf2
-	    cpu_features->usable[index_arch_FMA4_Usable]
446cf2
-	      |= bit_arch_FMA4_Usable;
446cf2
+	  CPU_FEATURE_SET_USABLE (cpu_features, FMA4);
446cf2
 	}
446cf2
 
446cf2
       if (family == 0x15)
446cf2
@@ -540,13 +600,15 @@ init_cpu_features (struct cpu_features *cpu_features)
446cf2
 
446cf2
       get_extended_indices (cpu_features);
446cf2
 
446cf2
+      update_usable (cpu_features);
446cf2
+
446cf2
       model += extended_model;
446cf2
       if (family == 0x6)
446cf2
         {
446cf2
           if (model == 0xf || model == 0x19)
446cf2
             {
446cf2
-              cpu_features->usable[index_arch_AVX_Usable]
446cf2
-                &= ~(bit_arch_AVX_Usable | bit_arch_AVX2_Usable);
446cf2
+	      CPU_FEATURE_UNSET (cpu_features, AVX);
446cf2
+	      CPU_FEATURE_UNSET (cpu_features, AVX2);
446cf2
 
446cf2
               cpu_features->preferred[index_arch_Slow_SSE4_2]
446cf2
                 |= bit_arch_Slow_SSE4_2;
446cf2
@@ -559,8 +621,8 @@ init_cpu_features (struct cpu_features *cpu_features)
446cf2
         {
446cf2
 	  if (model == 0x1b)
446cf2
 	    {
446cf2
-	      cpu_features->usable[index_arch_AVX_Usable]
446cf2
-		&= ~(bit_arch_AVX_Usable | bit_arch_AVX2_Usable);
446cf2
+	      CPU_FEATURE_UNSET (cpu_features, AVX);
446cf2
+	      CPU_FEATURE_UNSET (cpu_features, AVX2);
446cf2
 
446cf2
 	      cpu_features->preferred[index_arch_Slow_SSE4_2]
446cf2
 		|= bit_arch_Slow_SSE4_2;
446cf2
@@ -570,8 +632,8 @@ init_cpu_features (struct cpu_features *cpu_features)
446cf2
 	    }
446cf2
 	  else if (model == 0x3b)
446cf2
 	    {
446cf2
-	      cpu_features->usable[index_arch_AVX_Usable]
446cf2
-		&= ~(bit_arch_AVX_Usable | bit_arch_AVX2_Usable);
446cf2
+	      CPU_FEATURE_UNSET (cpu_features, AVX);
446cf2
+	      CPU_FEATURE_UNSET (cpu_features, AVX2);
446cf2
 
446cf2
 	      cpu_features->preferred[index_arch_AVX_Fast_Unaligned_Load]
446cf2
 		&= ~bit_arch_AVX_Fast_Unaligned_Load;
446cf2
@@ -582,6 +644,7 @@ init_cpu_features (struct cpu_features *cpu_features)
446cf2
     {
446cf2
       kind = arch_kind_other;
446cf2
       get_common_indices (cpu_features, NULL, NULL, NULL, NULL);
446cf2
+      update_usable (cpu_features);
446cf2
     }
446cf2
 
446cf2
   /* Support i586 if CX8 is available.  */
446cf2
@@ -628,31 +691,30 @@ no_cpuid:
446cf2
     {
446cf2
       const char *platform = NULL;
446cf2
 
446cf2
-      if (CPU_FEATURES_ARCH_P (cpu_features, AVX512F_Usable)
446cf2
-	  && CPU_FEATURES_CPU_P (cpu_features, AVX512CD))
446cf2
+      if (CPU_FEATURE_USABLE_P (cpu_features, AVX512CD))
446cf2
 	{
446cf2
-	  if (CPU_FEATURES_CPU_P (cpu_features, AVX512ER))
446cf2
+	  if (CPU_FEATURE_USABLE_P (cpu_features, AVX512ER))
446cf2
 	    {
446cf2
-	      if (CPU_FEATURES_CPU_P (cpu_features, AVX512PF))
446cf2
+	      if (CPU_FEATURE_USABLE_P (cpu_features, AVX512PF))
446cf2
 		platform = "xeon_phi";
446cf2
 	    }
446cf2
 	  else
446cf2
 	    {
446cf2
-	      if (CPU_FEATURES_CPU_P (cpu_features, AVX512BW)
446cf2
-		  && CPU_FEATURES_CPU_P (cpu_features, AVX512DQ)
446cf2
-		  && CPU_FEATURES_CPU_P (cpu_features, AVX512VL))
446cf2
+	      if (CPU_FEATURE_USABLE_P (cpu_features, AVX512BW)
446cf2
+		  && CPU_FEATURE_USABLE_P (cpu_features, AVX512DQ)
446cf2
+		  && CPU_FEATURE_USABLE_P (cpu_features, AVX512VL))
446cf2
 		GLRO(dl_hwcap) |= HWCAP_X86_AVX512_1;
446cf2
 	    }
446cf2
 	}
446cf2
 
446cf2
       if (platform == NULL
446cf2
-	  && CPU_FEATURES_ARCH_P (cpu_features, AVX2_Usable)
446cf2
-	  && CPU_FEATURES_ARCH_P (cpu_features, FMA_Usable)
446cf2
-	  && CPU_FEATURES_CPU_P (cpu_features, BMI1)
446cf2
-	  && CPU_FEATURES_CPU_P (cpu_features, BMI2)
446cf2
-	  && CPU_FEATURES_CPU_P (cpu_features, LZCNT)
446cf2
-	  && CPU_FEATURES_CPU_P (cpu_features, MOVBE)
446cf2
-	  && CPU_FEATURES_CPU_P (cpu_features, POPCNT))
446cf2
+	  && CPU_FEATURE_USABLE_P (cpu_features, AVX2)
446cf2
+	  && CPU_FEATURE_USABLE_P (cpu_features, FMA)
446cf2
+	  && CPU_FEATURE_USABLE_P (cpu_features, BMI1)
446cf2
+	  && CPU_FEATURE_USABLE_P (cpu_features, BMI2)
446cf2
+	  && CPU_FEATURE_USABLE_P (cpu_features, LZCNT)
446cf2
+	  && CPU_FEATURE_USABLE_P (cpu_features, MOVBE)
446cf2
+	  && CPU_FEATURE_USABLE_P (cpu_features, POPCNT))
446cf2
 	platform = "haswell";
446cf2
 
446cf2
       if (platform != NULL)
446cf2
@@ -660,7 +722,7 @@ no_cpuid:
446cf2
     }
446cf2
 #else
446cf2
   GLRO(dl_hwcap) = 0;
446cf2
-  if (CPU_FEATURES_CPU_P (cpu_features, SSE2))
446cf2
+  if (CPU_FEATURE_USABLE_P (cpu_features, SSE2))
446cf2
     GLRO(dl_hwcap) |= HWCAP_X86_SSE2;
446cf2
 
446cf2
   if (CPU_FEATURES_ARCH_P (cpu_features, I686))
446cf2
@@ -695,9 +757,9 @@ no_cpuid:
446cf2
 	     GLIBC_TUNABLES=glibc.cpu.hwcaps=-IBT,-SHSTK
446cf2
 	   */
446cf2
 	  unsigned int cet_feature = 0;
446cf2
-	  if (!HAS_CPU_FEATURE (IBT))
446cf2
+	  if (!CPU_FEATURE_USABLE (IBT))
446cf2
 	    cet_feature |= GNU_PROPERTY_X86_FEATURE_1_IBT;
446cf2
-	  if (!HAS_CPU_FEATURE (SHSTK))
446cf2
+	  if (!CPU_FEATURE_USABLE (SHSTK))
446cf2
 	    cet_feature |= GNU_PROPERTY_X86_FEATURE_1_SHSTK;
446cf2
 
446cf2
 	  if (cet_feature)
446cf2
diff --git a/sysdeps/x86/cpu-features.h b/sysdeps/x86/cpu-features.h
446cf2
index 0f19c64352c4d7f1..21708c028a12dbb2 100644
446cf2
--- a/sysdeps/x86/cpu-features.h
446cf2
+++ b/sysdeps/x86/cpu-features.h
446cf2
@@ -18,15 +18,6 @@
446cf2
 #ifndef cpu_features_h
446cf2
 #define cpu_features_h
446cf2
 
446cf2
-enum
446cf2
-{
446cf2
-  /* The integer bit array index for the first set of usable feature
446cf2
-     bits.  */
446cf2
-  USABLE_FEATURE_INDEX_1 = 0,
446cf2
-  /* The current maximum size of the feature integer bit array.  */
446cf2
-  USABLE_FEATURE_INDEX_MAX
446cf2
-};
446cf2
-
446cf2
 enum
446cf2
 {
446cf2
   /* The integer bit array index for the first set of preferred feature
446cf2
@@ -57,6 +48,12 @@ struct cpuid_registers
446cf2
   unsigned int edx;
446cf2
 };
446cf2
 
446cf2
+struct cpuid_features
446cf2
+{
446cf2
+  struct cpuid_registers cpuid;
446cf2
+  struct cpuid_registers usable;
446cf2
+};
446cf2
+
446cf2
 enum cpu_features_kind
446cf2
 {
446cf2
   arch_kind_unknown = 0,
446cf2
@@ -78,9 +75,7 @@ struct cpu_features_basic
446cf2
 struct cpu_features
446cf2
 {
446cf2
   struct cpu_features_basic basic;
446cf2
-  unsigned int *usable_p;
446cf2
-  struct cpuid_registers cpuid[COMMON_CPUID_INDEX_MAX];
446cf2
-  unsigned int usable[USABLE_FEATURE_INDEX_MAX];
446cf2
+  struct cpuid_features features[COMMON_CPUID_INDEX_MAX];
446cf2
   unsigned int preferred[PREFERRED_FEATURE_INDEX_MAX];
446cf2
   /* The state size for XSAVEC or XSAVE.  The type must be unsigned long
446cf2
      int so that we use
446cf2
@@ -91,7 +86,7 @@ struct cpu_features
446cf2
   unsigned long int xsave_state_size;
446cf2
   /* The full state size for XSAVE when XSAVEC is disabled by
446cf2
 
446cf2
-     GLIBC_TUNABLES=glibc.cpu.hwcaps=-XSAVEC_Usable
446cf2
+     GLIBC_TUNABLES=glibc.cpu.hwcaps=-XSAVEC
446cf2
    */
446cf2
   unsigned int xsave_state_full_size;
446cf2
   /* Data cache size for use in memory and string routines, typically
446cf2
@@ -114,117 +109,40 @@ extern const struct cpu_features *__get_cpu_features (void)
446cf2
      __attribute__ ((const));
446cf2
 
446cf2
 /* Only used directly in cpu-features.c.  */
446cf2
-# define CPU_FEATURES_CPU_P(ptr, name) \
446cf2
-  ((ptr->cpuid[index_cpu_##name].reg_##name & (bit_cpu_##name)) != 0)
446cf2
-# define CPU_FEATURES_ARCH_P(ptr, name) \
446cf2
-  ((ptr->feature_##name[index_arch_##name] & (bit_arch_##name)) != 0)
446cf2
+#define CPU_FEATURE_CHECK_P(ptr, name, check) \
446cf2
+  ((ptr->features[index_cpu_##name].check.reg_##name \
446cf2
+    & bit_cpu_##name) != 0)
446cf2
+#define CPU_FEATURE_SET(ptr, name) \
446cf2
+  ptr->features[index_cpu_##name].usable.reg_##name |= bit_cpu_##name;
446cf2
+#define CPU_FEATURE_UNSET(ptr, name) \
446cf2
+  ptr->features[index_cpu_##name].usable.reg_##name &= ~bit_cpu_##name;
446cf2
+#define CPU_FEATURE_SET_USABLE(ptr, name) \
446cf2
+  ptr->features[index_cpu_##name].usable.reg_##name \
446cf2
+     |= ptr->features[index_cpu_##name].cpuid.reg_##name & bit_cpu_##name;
446cf2
+#define CPU_FEATURE_PREFERRED_P(ptr, name) \
446cf2
+  ((ptr->preferred[index_arch_##name] & bit_arch_##name) != 0)
446cf2
+#define CPU_FEATURE_CPU_P(ptr, name) \
446cf2
+  CPU_FEATURE_CHECK_P (ptr, name, cpuid)
446cf2
+#define CPU_FEATURE_USABLE_P(ptr, name) \
446cf2
+  CPU_FEATURE_CHECK_P (ptr, name, usable)
446cf2
 
446cf2
 /* HAS_CPU_FEATURE evaluates to true if CPU supports the feature.  */
446cf2
 #define HAS_CPU_FEATURE(name) \
446cf2
-  CPU_FEATURES_CPU_P (__get_cpu_features (), name)
446cf2
-/* HAS_ARCH_FEATURE evaluates to true if we may use the feature at
446cf2
-   runtime.  */
446cf2
-# define HAS_ARCH_FEATURE(name) \
446cf2
-  CPU_FEATURES_ARCH_P (__get_cpu_features (), name)
446cf2
+  CPU_FEATURE_CPU_P (__get_cpu_features (), name)
446cf2
 /* CPU_FEATURE_USABLE evaluates to true if the feature is usable.  */
446cf2
 #define CPU_FEATURE_USABLE(name) \
446cf2
-  HAS_ARCH_FEATURE (name##_Usable)
446cf2
-
446cf2
-/* Architecture features.  */
446cf2
-
446cf2
-/* USABLE_FEATURE_INDEX_1.  */
446cf2
-#define bit_arch_AVX_Usable			(1u << 0)
446cf2
-#define bit_arch_AVX2_Usable			(1u << 1)
446cf2
-#define bit_arch_AVX512F_Usable			(1u << 2)
446cf2
-#define bit_arch_AVX512CD_Usable		(1u << 3)
446cf2
-#define bit_arch_AVX512ER_Usable		(1u << 4)
446cf2
-#define bit_arch_AVX512PF_Usable		(1u << 5)
446cf2
-#define bit_arch_AVX512VL_Usable		(1u << 6)
446cf2
-#define bit_arch_AVX512DQ_Usable		(1u << 7)
446cf2
-#define bit_arch_AVX512BW_Usable		(1u << 8)
446cf2
-#define bit_arch_AVX512_4FMAPS_Usable		(1u << 9)
446cf2
-#define bit_arch_AVX512_4VNNIW_Usable		(1u << 10)
446cf2
-#define bit_arch_AVX512_BITALG_Usable		(1u << 11)
446cf2
-#define bit_arch_AVX512_IFMA_Usable		(1u << 12)
446cf2
-#define bit_arch_AVX512_VBMI_Usable		(1u << 13)
446cf2
-#define bit_arch_AVX512_VBMI2_Usable		(1u << 14)
446cf2
-#define bit_arch_AVX512_VNNI_Usable		(1u << 15)
446cf2
-#define bit_arch_AVX512_VPOPCNTDQ_Usable	(1u << 16)
446cf2
-#define bit_arch_FMA_Usable			(1u << 17)
446cf2
-#define bit_arch_FMA4_Usable			(1u << 18)
446cf2
-#define bit_arch_VAES_Usable			(1u << 19)
446cf2
-#define bit_arch_VPCLMULQDQ_Usable		(1u << 20)
446cf2
-#define bit_arch_XOP_Usable			(1u << 21)
446cf2
-#define bit_arch_XSAVEC_Usable			(1u << 22)
446cf2
-#define bit_arch_F16C_Usable			(1u << 23)
446cf2
-#define bit_arch_AVX512_VP2INTERSECT_Usable	(1u << 24)
446cf2
-#define bit_arch_AVX512_BF16_Usable		(1u << 25)
446cf2
-#define bit_arch_PKU_Usable			(1u << 26)
446cf2
-#define bit_arch_AMX_BF16_Usable		(1u << 27)
446cf2
-#define bit_arch_AMX_TILE_Usable		(1u << 28)
446cf2
-#define bit_arch_AMX_INT8_Usable		(1u << 29)
446cf2
-
446cf2
-#define index_arch_AVX_Usable			USABLE_FEATURE_INDEX_1
446cf2
-#define index_arch_AVX2_Usable			USABLE_FEATURE_INDEX_1
446cf2
-#define index_arch_AVX512F_Usable		USABLE_FEATURE_INDEX_1
446cf2
-#define index_arch_AVX512CD_Usable		USABLE_FEATURE_INDEX_1
446cf2
-#define index_arch_AVX512ER_Usable		USABLE_FEATURE_INDEX_1
446cf2
-#define index_arch_AVX512PF_Usable		USABLE_FEATURE_INDEX_1
446cf2
-#define index_arch_AVX512VL_Usable		USABLE_FEATURE_INDEX_1
446cf2
-#define index_arch_AVX512BW_Usable		USABLE_FEATURE_INDEX_1
446cf2
-#define index_arch_AVX512DQ_Usable		USABLE_FEATURE_INDEX_1
446cf2
-#define index_arch_AVX512_4FMAPS_Usable		USABLE_FEATURE_INDEX_1
446cf2
-#define index_arch_AVX512_4VNNIW_Usable		USABLE_FEATURE_INDEX_1
446cf2
-#define index_arch_AVX512_BITALG_Usable		USABLE_FEATURE_INDEX_1
446cf2
-#define index_arch_AVX512_IFMA_Usable		USABLE_FEATURE_INDEX_1
446cf2
-#define index_arch_AVX512_VBMI_Usable		USABLE_FEATURE_INDEX_1
446cf2
-#define index_arch_AVX512_VBMI2_Usable		USABLE_FEATURE_INDEX_1
446cf2
-#define index_arch_AVX512_VNNI_Usable		USABLE_FEATURE_INDEX_1
446cf2
-#define index_arch_AVX512_VPOPCNTDQ_Usable	USABLE_FEATURE_INDEX_1
446cf2
-#define index_arch_FMA_Usable			USABLE_FEATURE_INDEX_1
446cf2
-#define index_arch_FMA4_Usable			USABLE_FEATURE_INDEX_1
446cf2
-#define index_arch_VAES_Usable			USABLE_FEATURE_INDEX_1
446cf2
-#define index_arch_VPCLMULQDQ_Usable		USABLE_FEATURE_INDEX_1
446cf2
-#define index_arch_XOP_Usable			USABLE_FEATURE_INDEX_1
446cf2
-#define index_arch_XSAVEC_Usable		USABLE_FEATURE_INDEX_1
446cf2
-#define index_arch_F16C_Usable			USABLE_FEATURE_INDEX_1
446cf2
-#define index_arch_AVX512_VP2INTERSECT_Usable	USABLE_FEATURE_INDEX_1
446cf2
-#define index_arch_AVX512_BF16_Usable		USABLE_FEATURE_INDEX_1
446cf2
-#define index_arch_PKU_Usable			USABLE_FEATURE_INDEX_1
446cf2
-#define index_arch_AMX_BF16_Usable		USABLE_FEATURE_INDEX_1
446cf2
-#define index_arch_AMX_TILE_Usable		USABLE_FEATURE_INDEX_1
446cf2
-#define index_arch_AMX_INT8_Usable		USABLE_FEATURE_INDEX_1
446cf2
-
446cf2
-#define feature_AVX_Usable			usable
446cf2
-#define feature_AVX2_Usable			usable
446cf2
-#define feature_AVX512F_Usable			usable
446cf2
-#define feature_AVX512CD_Usable			usable
446cf2
-#define feature_AVX512ER_Usable			usable
446cf2
-#define feature_AVX512PF_Usable			usable
446cf2
-#define feature_AVX512VL_Usable			usable
446cf2
-#define feature_AVX512BW_Usable			usable
446cf2
-#define feature_AVX512DQ_Usable			usable
446cf2
-#define feature_AVX512_4FMAPS_Usable		usable
446cf2
-#define feature_AVX512_4VNNIW_Usable		usable
446cf2
-#define feature_AVX512_BITALG_Usable		usable
446cf2
-#define feature_AVX512_IFMA_Usable		usable
446cf2
-#define feature_AVX512_VBMI_Usable		usable
446cf2
-#define feature_AVX512_VBMI2_Usable		usable
446cf2
-#define feature_AVX512_VNNI_Usable		usable
446cf2
-#define feature_AVX512_VPOPCNTDQ_Usable		usable
446cf2
-#define feature_FMA_Usable			usable
446cf2
-#define feature_FMA4_Usable			usable
446cf2
-#define feature_VAES_Usable			usable
446cf2
-#define feature_VPCLMULQDQ_Usable		usable
446cf2
-#define feature_XOP_Usable			usable
446cf2
-#define feature_XSAVEC_Usable			usable
446cf2
-#define feature_F16C_Usable			usable
446cf2
-#define feature_AVX512_VP2INTERSECT_Usable	usable
446cf2
-#define feature_AVX512_BF16_Usable		usable
446cf2
-#define feature_PKU_Usable			usable
446cf2
-#define feature_AMX_BF16_Usable			usable
446cf2
-#define feature_AMX_TILE_Usable			usable
446cf2
-#define feature_AMX_INT8_Usable			usable
446cf2
+  CPU_FEATURE_USABLE_P (__get_cpu_features (), name)
446cf2
+/* CPU_FEATURE_PREFER evaluates to true if we prefer the feature at
446cf2
+   runtime.  */
446cf2
+#define CPU_FEATURE_PREFERRED(name) \
446cf2
+  CPU_FEATURE_PREFERRED_P(__get_cpu_features (), name)
446cf2
+
446cf2
+#define CPU_FEATURES_CPU_P(ptr, name) \
446cf2
+  CPU_FEATURE_CPU_P (ptr, name)
446cf2
+#define CPU_FEATURES_ARCH_P(ptr, name) \
446cf2
+  CPU_FEATURE_PREFERRED_P (ptr, name)
446cf2
+#define HAS_ARCH_FEATURE(name) \
446cf2
+  CPU_FEATURE_PREFERRED (name)
446cf2
 
446cf2
 /* CPU features.  */
446cf2
 
446cf2
@@ -247,6 +165,7 @@ extern const struct cpu_features *__get_cpu_features (void)
446cf2
 #define bit_cpu_CMPXCHG16B	(1u << 13)
446cf2
 #define bit_cpu_XTPRUPDCTRL	(1u << 14)
446cf2
 #define bit_cpu_PDCM		(1u << 15)
446cf2
+#define bit_cpu_INDEX_1_ECX_16	(1u << 16)
446cf2
 #define bit_cpu_PCID		(1u << 17)
446cf2
 #define bit_cpu_DCA		(1u << 18)
446cf2
 #define bit_cpu_SSE4_1		(1u << 19)
446cf2
@@ -261,6 +180,7 @@ extern const struct cpu_features *__get_cpu_features (void)
446cf2
 #define bit_cpu_AVX		(1u << 28)
446cf2
 #define bit_cpu_F16C		(1u << 29)
446cf2
 #define bit_cpu_RDRAND		(1u << 30)
446cf2
+#define bit_cpu_INDEX_1_ECX_31	(1u << 31)
446cf2
 
446cf2
 /* EDX.  */
446cf2
 #define bit_cpu_FPU		(1u << 0)
446cf2
@@ -273,6 +193,7 @@ extern const struct cpu_features *__get_cpu_features (void)
446cf2
 #define bit_cpu_MCE		(1u << 7)
446cf2
 #define bit_cpu_CX8		(1u << 8)
446cf2
 #define bit_cpu_APIC		(1u << 9)
446cf2
+#define bit_cpu_INDEX_1_EDX_10	(1u << 10)
446cf2
 #define bit_cpu_SEP		(1u << 11)
446cf2
 #define bit_cpu_MTRR		(1u << 12)
446cf2
 #define bit_cpu_PGE		(1u << 13)
446cf2
@@ -282,6 +203,7 @@ extern const struct cpu_features *__get_cpu_features (void)
446cf2
 #define bit_cpu_PSE_36		(1u << 17)
446cf2
 #define bit_cpu_PSN		(1u << 18)
446cf2
 #define bit_cpu_CLFSH		(1u << 19)
446cf2
+#define bit_cpu_INDEX_1_EDX_20	(1u << 20)
446cf2
 #define bit_cpu_DS		(1u << 21)
446cf2
 #define bit_cpu_ACPI		(1u << 22)
446cf2
 #define bit_cpu_MMX		(1u << 23)
446cf2
@@ -291,6 +213,7 @@ extern const struct cpu_features *__get_cpu_features (void)
446cf2
 #define bit_cpu_SS		(1u << 27)
446cf2
 #define bit_cpu_HTT		(1u << 28)
446cf2
 #define bit_cpu_TM		(1u << 29)
446cf2
+#define bit_cpu_INDEX_1_EDX_30	(1u << 30)
446cf2
 #define bit_cpu_PBE		(1u << 31)
446cf2
 
446cf2
 /* COMMON_CPUID_INDEX_7.  */
446cf2
@@ -302,12 +225,14 @@ extern const struct cpu_features *__get_cpu_features (void)
446cf2
 #define bit_cpu_BMI1		(1u << 3)
446cf2
 #define bit_cpu_HLE		(1u << 4)
446cf2
 #define bit_cpu_AVX2		(1u << 5)
446cf2
+#define bit_cpu_INDEX_7_EBX_6	(1u << 6)
446cf2
 #define bit_cpu_SMEP		(1u << 7)
446cf2
 #define bit_cpu_BMI2		(1u << 8)
446cf2
 #define bit_cpu_ERMS		(1u << 9)
446cf2
 #define bit_cpu_INVPCID		(1u << 10)
446cf2
 #define bit_cpu_RTM		(1u << 11)
446cf2
 #define bit_cpu_PQM		(1u << 12)
446cf2
+#define bit_cpu_DEPR_FPU_CS_DS	(1u << 13)
446cf2
 #define bit_cpu_MPX		(1u << 14)
446cf2
 #define bit_cpu_PQE		(1u << 15)
446cf2
 #define bit_cpu_AVX512F		(1u << 16)
446cf2
@@ -316,6 +241,7 @@ extern const struct cpu_features *__get_cpu_features (void)
446cf2
 #define bit_cpu_ADX		(1u << 19)
446cf2
 #define bit_cpu_SMAP		(1u << 20)
446cf2
 #define bit_cpu_AVX512_IFMA	(1u << 21)
446cf2
+#define bit_cpu_INDEX_7_EBX_22	(1u << 22)
446cf2
 #define bit_cpu_CLFLUSHOPT	(1u << 23)
446cf2
 #define bit_cpu_CLWB		(1u << 24)
446cf2
 #define bit_cpu_TRACE		(1u << 25)
446cf2
@@ -340,9 +266,17 @@ extern const struct cpu_features *__get_cpu_features (void)
446cf2
 #define bit_cpu_VPCLMULQDQ	(1u << 10)
446cf2
 #define bit_cpu_AVX512_VNNI	(1u << 11)
446cf2
 #define bit_cpu_AVX512_BITALG	(1u << 12)
446cf2
+#define bit_cpu_INDEX_7_ECX_13	(1u << 13)
446cf2
 #define bit_cpu_AVX512_VPOPCNTDQ (1u << 14)
446cf2
+#define bit_cpu_INDEX_7_ECX_15	(1u << 15)
446cf2
+#define bit_cpu_INDEX_7_ECX_16	(1u << 16)
446cf2
+/* Note: Bits 17-21: The value of MAWAU used by the BNDLDX and BNDSTX
446cf2
+   instructions in 64-bit mode.  */
446cf2
 #define bit_cpu_RDPID		(1u << 22)
446cf2
+#define bit_cpu_INDEX_7_ECX_23	(1u << 23)
446cf2
+#define bit_cpu_INDEX_7_ECX_24	(1u << 24)
446cf2
 #define bit_cpu_CLDEMOTE	(1u << 25)
446cf2
+#define bit_cpu_INDEX_7_ECX_26	(1u << 26)
446cf2
 #define bit_cpu_MOVDIRI		(1u << 27)
446cf2
 #define bit_cpu_MOVDIR64B	(1u << 28)
446cf2
 #define bit_cpu_ENQCMD		(1u << 29)
446cf2
@@ -350,17 +284,30 @@ extern const struct cpu_features *__get_cpu_features (void)
446cf2
 #define bit_cpu_PKS		(1u << 31)
446cf2
 
446cf2
 /* EDX.  */
446cf2
+#define bit_cpu_INDEX_7_EDX_0	(1u << 0)
446cf2
+#define bit_cpu_INDEX_7_EDX_1	(1u << 1)
446cf2
 #define bit_cpu_AVX512_4VNNIW	(1u << 2)
446cf2
 #define bit_cpu_AVX512_4FMAPS	(1u << 3)
446cf2
 #define bit_cpu_FSRM		(1u << 4)
446cf2
+#define bit_cpu_INDEX_7_EDX_5	(1u << 5)
446cf2
+#define bit_cpu_INDEX_7_EDX_6	(1u << 6)
446cf2
+#define bit_cpu_INDEX_7_EDX_7	(1u << 7)
446cf2
 #define bit_cpu_AVX512_VP2INTERSECT (1u << 8)
446cf2
+#define bit_cpu_INDEX_7_EDX_9	(1u << 9)
446cf2
 #define bit_cpu_MD_CLEAR	(1u << 10)
446cf2
+#define bit_cpu_INDEX_7_EDX_11	(1u << 11)
446cf2
+#define bit_cpu_INDEX_7_EDX_12	(1u << 12)
446cf2
+#define bit_cpu_INDEX_7_EDX_13	(1u << 13)
446cf2
 #define bit_cpu_SERIALIZE	(1u << 14)
446cf2
 #define bit_cpu_HYBRID		(1u << 15)
446cf2
 #define bit_cpu_TSXLDTRK	(1u << 16)
446cf2
+#define bit_cpu_INDEX_7_EDX_17	(1u << 17)
446cf2
 #define bit_cpu_PCONFIG		(1u << 18)
446cf2
+#define bit_cpu_INDEX_7_EDX_19	(1u << 19)
446cf2
 #define bit_cpu_IBT		(1u << 20)
446cf2
+#define bit_cpu_INDEX_7_EDX_21	(1u << 21)
446cf2
 #define bit_cpu_AMX_BF16	(1u << 22)
446cf2
+#define bit_cpu_INDEX_7_EDX_23	(1u << 23)
446cf2
 #define bit_cpu_AMX_TILE	(1u << 24)
446cf2
 #define bit_cpu_AMX_INT8	(1u << 25)
446cf2
 #define bit_cpu_IBRS_IBPB	(1u << 26)
446cf2
@@ -433,6 +380,7 @@ extern const struct cpu_features *__get_cpu_features (void)
446cf2
 #define index_cpu_CMPXCHG16B	COMMON_CPUID_INDEX_1
446cf2
 #define index_cpu_XTPRUPDCTRL	COMMON_CPUID_INDEX_1
446cf2
 #define index_cpu_PDCM		COMMON_CPUID_INDEX_1
446cf2
+#define index_cpu_INDEX_1_ECX_16 COMMON_CPUID_INDEX_1
446cf2
 #define index_cpu_PCID		COMMON_CPUID_INDEX_1
446cf2
 #define index_cpu_DCA		COMMON_CPUID_INDEX_1
446cf2
 #define index_cpu_SSE4_1	COMMON_CPUID_INDEX_1
446cf2
@@ -447,6 +395,7 @@ extern const struct cpu_features *__get_cpu_features (void)
446cf2
 #define index_cpu_AVX		COMMON_CPUID_INDEX_1
446cf2
 #define index_cpu_F16C		COMMON_CPUID_INDEX_1
446cf2
 #define index_cpu_RDRAND	COMMON_CPUID_INDEX_1
446cf2
+#define index_cpu_INDEX_1_ECX_31 COMMON_CPUID_INDEX_1
446cf2
 
446cf2
 /* ECX.  */
446cf2
 #define index_cpu_FPU		COMMON_CPUID_INDEX_1
446cf2
@@ -459,6 +408,7 @@ extern const struct cpu_features *__get_cpu_features (void)
446cf2
 #define index_cpu_MCE		COMMON_CPUID_INDEX_1
446cf2
 #define index_cpu_CX8		COMMON_CPUID_INDEX_1
446cf2
 #define index_cpu_APIC		COMMON_CPUID_INDEX_1
446cf2
+#define index_cpu_INDEX_1_EDX_10 COMMON_CPUID_INDEX_1
446cf2
 #define index_cpu_SEP		COMMON_CPUID_INDEX_1
446cf2
 #define index_cpu_MTRR		COMMON_CPUID_INDEX_1
446cf2
 #define index_cpu_PGE		COMMON_CPUID_INDEX_1
446cf2
@@ -468,6 +418,7 @@ extern const struct cpu_features *__get_cpu_features (void)
446cf2
 #define index_cpu_PSE_36	COMMON_CPUID_INDEX_1
446cf2
 #define index_cpu_PSN		COMMON_CPUID_INDEX_1
446cf2
 #define index_cpu_CLFSH		COMMON_CPUID_INDEX_1
446cf2
+#define index_cpu_INDEX_1_EDX_20 COMMON_CPUID_INDEX_1
446cf2
 #define index_cpu_DS		COMMON_CPUID_INDEX_1
446cf2
 #define index_cpu_ACPI		COMMON_CPUID_INDEX_1
446cf2
 #define index_cpu_MMX		COMMON_CPUID_INDEX_1
446cf2
@@ -477,6 +428,7 @@ extern const struct cpu_features *__get_cpu_features (void)
446cf2
 #define index_cpu_SS		COMMON_CPUID_INDEX_1
446cf2
 #define index_cpu_HTT		COMMON_CPUID_INDEX_1
446cf2
 #define index_cpu_TM		COMMON_CPUID_INDEX_1
446cf2
+#define index_cpu_INDEX_1_EDX_30 COMMON_CPUID_INDEX_1
446cf2
 #define index_cpu_PBE		COMMON_CPUID_INDEX_1
446cf2
 
446cf2
 /* COMMON_CPUID_INDEX_7.  */
446cf2
@@ -488,12 +440,14 @@ extern const struct cpu_features *__get_cpu_features (void)
446cf2
 #define index_cpu_BMI1		COMMON_CPUID_INDEX_7
446cf2
 #define index_cpu_HLE		COMMON_CPUID_INDEX_7
446cf2
 #define index_cpu_AVX2		COMMON_CPUID_INDEX_7
446cf2
+#define index_cpu_INDEX_7_EBX_6	COMMON_CPUID_INDEX_7
446cf2
 #define index_cpu_SMEP		COMMON_CPUID_INDEX_7
446cf2
 #define index_cpu_BMI2		COMMON_CPUID_INDEX_7
446cf2
 #define index_cpu_ERMS		COMMON_CPUID_INDEX_7
446cf2
 #define index_cpu_INVPCID	COMMON_CPUID_INDEX_7
446cf2
 #define index_cpu_RTM		COMMON_CPUID_INDEX_7
446cf2
 #define index_cpu_PQM		COMMON_CPUID_INDEX_7
446cf2
+#define index_cpu_DEPR_FPU_CS_DS COMMON_CPUID_INDEX_7
446cf2
 #define index_cpu_MPX		COMMON_CPUID_INDEX_7
446cf2
 #define index_cpu_PQE		COMMON_CPUID_INDEX_7
446cf2
 #define index_cpu_AVX512F	COMMON_CPUID_INDEX_7
446cf2
@@ -502,6 +456,7 @@ extern const struct cpu_features *__get_cpu_features (void)
446cf2
 #define index_cpu_ADX		COMMON_CPUID_INDEX_7
446cf2
 #define index_cpu_SMAP		COMMON_CPUID_INDEX_7
446cf2
 #define index_cpu_AVX512_IFMA	COMMON_CPUID_INDEX_7
446cf2
+#define index_cpu_INDEX_7_EBX_22 COMMON_CPUID_INDEX_7
446cf2
 #define index_cpu_CLFLUSHOPT	COMMON_CPUID_INDEX_7
446cf2
 #define index_cpu_CLWB		COMMON_CPUID_INDEX_7
446cf2
 #define index_cpu_TRACE		COMMON_CPUID_INDEX_7
446cf2
@@ -526,9 +481,15 @@ extern const struct cpu_features *__get_cpu_features (void)
446cf2
 #define index_cpu_VPCLMULQDQ	COMMON_CPUID_INDEX_7
446cf2
 #define index_cpu_AVX512_VNNI	COMMON_CPUID_INDEX_7
446cf2
 #define index_cpu_AVX512_BITALG COMMON_CPUID_INDEX_7
446cf2
+#define index_cpu_INDEX_7_ECX_13 COMMON_CPUID_INDEX_7
446cf2
 #define index_cpu_AVX512_VPOPCNTDQ COMMON_CPUID_INDEX_7
446cf2
+#define index_cpu_INDEX_7_ECX_15 COMMON_CPUID_INDEX_7
446cf2
+#define index_cpu_INDEX_7_ECX_16 COMMON_CPUID_INDEX_7
446cf2
 #define index_cpu_RDPID		COMMON_CPUID_INDEX_7
446cf2
+#define index_cpu_INDEX_7_ECX_23 COMMON_CPUID_INDEX_7
446cf2
+#define index_cpu_INDEX_7_ECX_24 COMMON_CPUID_INDEX_7
446cf2
 #define index_cpu_CLDEMOTE	COMMON_CPUID_INDEX_7
446cf2
+#define index_cpu_INDEX_7_ECX_26 COMMON_CPUID_INDEX_7
446cf2
 #define index_cpu_MOVDIRI	COMMON_CPUID_INDEX_7
446cf2
 #define index_cpu_MOVDIR64B	COMMON_CPUID_INDEX_7
446cf2
 #define index_cpu_ENQCMD	COMMON_CPUID_INDEX_7
446cf2
@@ -536,17 +497,30 @@ extern const struct cpu_features *__get_cpu_features (void)
446cf2
 #define index_cpu_PKS		COMMON_CPUID_INDEX_7
446cf2
 
446cf2
 /* EDX.  */
446cf2
+#define index_cpu_INDEX_7_EDX_0	COMMON_CPUID_INDEX_7
446cf2
+#define index_cpu_INDEX_7_EDX_1	COMMON_CPUID_INDEX_7
446cf2
 #define index_cpu_AVX512_4VNNIW COMMON_CPUID_INDEX_7
446cf2
 #define index_cpu_AVX512_4FMAPS	COMMON_CPUID_INDEX_7
446cf2
 #define index_cpu_FSRM		COMMON_CPUID_INDEX_7
446cf2
+#define index_cpu_INDEX_7_EDX_5	COMMON_CPUID_INDEX_7
446cf2
+#define index_cpu_INDEX_7_EDX_6	COMMON_CPUID_INDEX_7
446cf2
+#define index_cpu_INDEX_7_EDX_7	COMMON_CPUID_INDEX_7
446cf2
 #define index_cpu_AVX512_VP2INTERSECT COMMON_CPUID_INDEX_7
446cf2
+#define index_cpu_INDEX_7_EDX_9	COMMON_CPUID_INDEX_7
446cf2
 #define index_cpu_MD_CLEAR	COMMON_CPUID_INDEX_7
446cf2
+#define index_cpu_INDEX_7_EDX_11 COMMON_CPUID_INDEX_7
446cf2
+#define index_cpu_INDEX_7_EDX_12 COMMON_CPUID_INDEX_7
446cf2
+#define index_cpu_INDEX_7_EDX_13 COMMON_CPUID_INDEX_7
446cf2
 #define index_cpu_SERIALIZE	COMMON_CPUID_INDEX_7
446cf2
 #define index_cpu_HYBRID	COMMON_CPUID_INDEX_7
446cf2
 #define index_cpu_TSXLDTRK	COMMON_CPUID_INDEX_7
446cf2
+#define index_cpu_INDEX_7_EDX_17 COMMON_CPUID_INDEX_7
446cf2
 #define index_cpu_PCONFIG	COMMON_CPUID_INDEX_7
446cf2
+#define index_cpu_INDEX_7_EDX_19 COMMON_CPUID_INDEX_7
446cf2
 #define index_cpu_IBT		COMMON_CPUID_INDEX_7
446cf2
+#define index_cpu_INDEX_7_EDX_21 COMMON_CPUID_INDEX_7
446cf2
 #define index_cpu_AMX_BF16	COMMON_CPUID_INDEX_7
446cf2
+#define index_cpu_INDEX_7_EDX_23 COMMON_CPUID_INDEX_7
446cf2
 #define index_cpu_AMX_TILE	COMMON_CPUID_INDEX_7
446cf2
 #define index_cpu_AMX_INT8	COMMON_CPUID_INDEX_7
446cf2
 #define index_cpu_IBRS_IBPB	COMMON_CPUID_INDEX_7
446cf2
@@ -619,6 +593,7 @@ extern const struct cpu_features *__get_cpu_features (void)
446cf2
 #define reg_CMPXCHG16B		ecx
446cf2
 #define reg_XTPRUPDCTRL		ecx
446cf2
 #define reg_PDCM		ecx
446cf2
+#define reg_INDEX_1_ECX_16	ecx
446cf2
 #define reg_PCID		ecx
446cf2
 #define reg_DCA			ecx
446cf2
 #define reg_SSE4_1		ecx
446cf2
@@ -633,6 +608,7 @@ extern const struct cpu_features *__get_cpu_features (void)
446cf2
 #define reg_AVX			ecx
446cf2
 #define reg_F16C		ecx
446cf2
 #define reg_RDRAND		ecx
446cf2
+#define reg_INDEX_1_ECX_31	ecx
446cf2
 
446cf2
 /* EDX.  */
446cf2
 #define reg_FPU			edx
446cf2
@@ -645,6 +621,7 @@ extern const struct cpu_features *__get_cpu_features (void)
446cf2
 #define reg_MCE			edx
446cf2
 #define reg_CX8			edx
446cf2
 #define reg_APIC		edx
446cf2
+#define reg_INDEX_1_EDX_10	edx
446cf2
 #define reg_SEP			edx
446cf2
 #define reg_MTRR		edx
446cf2
 #define reg_PGE			edx
446cf2
@@ -654,6 +631,7 @@ extern const struct cpu_features *__get_cpu_features (void)
446cf2
 #define reg_PSE_36		edx
446cf2
 #define reg_PSN			edx
446cf2
 #define reg_CLFSH		edx
446cf2
+#define reg_INDEX_1_EDX_20	edx
446cf2
 #define reg_DS			edx
446cf2
 #define reg_ACPI		edx
446cf2
 #define reg_MMX			edx
446cf2
@@ -663,6 +641,7 @@ extern const struct cpu_features *__get_cpu_features (void)
446cf2
 #define reg_SS			edx
446cf2
 #define reg_HTT			edx
446cf2
 #define reg_TM			edx
446cf2
+#define reg_INDEX_1_EDX_30	edx
446cf2
 #define reg_PBE			edx
446cf2
 
446cf2
 /* COMMON_CPUID_INDEX_7.  */
446cf2
@@ -675,11 +654,13 @@ extern const struct cpu_features *__get_cpu_features (void)
446cf2
 #define reg_HLE			ebx
446cf2
 #define reg_BMI2		ebx
446cf2
 #define reg_AVX2		ebx
446cf2
+#define reg_INDEX_7_EBX_6	ebx
446cf2
 #define reg_SMEP		ebx
446cf2
 #define reg_ERMS		ebx
446cf2
 #define reg_INVPCID		ebx
446cf2
 #define reg_RTM			ebx
446cf2
 #define reg_PQM			ebx
446cf2
+#define reg_DEPR_FPU_CS_DS	ebx
446cf2
 #define reg_MPX			ebx
446cf2
 #define reg_PQE			ebx
446cf2
 #define reg_AVX512F		ebx
446cf2
@@ -688,6 +669,7 @@ extern const struct cpu_features *__get_cpu_features (void)
446cf2
 #define reg_ADX			ebx
446cf2
 #define reg_SMAP		ebx
446cf2
 #define reg_AVX512_IFMA		ebx
446cf2
+#define reg_INDEX_7_EBX_22	ebx
446cf2
 #define reg_CLFLUSHOPT		ebx
446cf2
 #define reg_CLWB		ebx
446cf2
 #define reg_TRACE		ebx
446cf2
@@ -712,9 +694,15 @@ extern const struct cpu_features *__get_cpu_features (void)
446cf2
 #define reg_VPCLMULQDQ		ecx
446cf2
 #define reg_AVX512_VNNI		ecx
446cf2
 #define reg_AVX512_BITALG	ecx
446cf2
+#define reg_INDEX_7_ECX_13	ecx
446cf2
 #define reg_AVX512_VPOPCNTDQ	ecx
446cf2
+#define reg_INDEX_7_ECX_15	ecx
446cf2
+#define reg_INDEX_7_ECX_16	ecx
446cf2
 #define reg_RDPID		ecx
446cf2
+#define reg_INDEX_7_ECX_23	ecx
446cf2
+#define reg_INDEX_7_ECX_24	ecx
446cf2
 #define reg_CLDEMOTE		ecx
446cf2
+#define reg_INDEX_7_ECX_26	ecx
446cf2
 #define reg_MOVDIRI		ecx
446cf2
 #define reg_MOVDIR64B		ecx
446cf2
 #define reg_ENQCMD		ecx
446cf2
@@ -722,17 +710,30 @@ extern const struct cpu_features *__get_cpu_features (void)
446cf2
 #define reg_PKS			ecx
446cf2
 
446cf2
 /* EDX.  */
446cf2
+#define reg_INDEX_7_EDX_0	edx
446cf2
+#define reg_INDEX_7_EDX_1	edx
446cf2
 #define reg_AVX512_4VNNIW	edx
446cf2
 #define reg_AVX512_4FMAPS	edx
446cf2
 #define reg_FSRM		edx
446cf2
+#define reg_INDEX_7_EDX_5	edx
446cf2
+#define reg_INDEX_7_EDX_6	edx
446cf2
+#define reg_INDEX_7_EDX_7	edx
446cf2
 #define reg_AVX512_VP2INTERSECT	edx
446cf2
+#define reg_INDEX_7_EDX_9	edx
446cf2
 #define reg_MD_CLEAR		edx
446cf2
+#define reg_INDEX_7_EDX_11	edx
446cf2
+#define reg_INDEX_7_EDX_12	edx
446cf2
+#define reg_INDEX_7_EDX_13	edx
446cf2
 #define reg_SERIALIZE		edx
446cf2
 #define reg_HYBRID		edx
446cf2
 #define reg_TSXLDTRK		edx
446cf2
+#define reg_INDEX_7_EDX_17	edx
446cf2
 #define reg_PCONFIG		edx
446cf2
+#define reg_INDEX_7_EDX_19	edx
446cf2
 #define reg_IBT			edx
446cf2
+#define reg_INDEX_7_EDX_21	edx
446cf2
 #define reg_AMX_BF16		edx
446cf2
+#define reg_INDEX_7_EDX_23	edx
446cf2
 #define reg_AMX_TILE		edx
446cf2
 #define reg_AMX_INT8		edx
446cf2
 #define reg_IBRS_IBPB		edx
446cf2
@@ -821,23 +822,6 @@ extern const struct cpu_features *__get_cpu_features (void)
446cf2
 #define index_arch_MathVec_Prefer_No_AVX512	PREFERRED_FEATURE_INDEX_1
446cf2
 #define index_arch_Prefer_FSRM			PREFERRED_FEATURE_INDEX_1
446cf2
 
446cf2
-#define feature_Fast_Rep_String			preferred
446cf2
-#define feature_Fast_Copy_Backward		preferred
446cf2
-#define feature_Slow_BSF			preferred
446cf2
-#define feature_Fast_Unaligned_Load		preferred
446cf2
-#define feature_Prefer_PMINUB_for_stringop 	preferred
446cf2
-#define feature_Fast_Unaligned_Copy		preferred
446cf2
-#define feature_I586				preferred
446cf2
-#define feature_I686				preferred
446cf2
-#define feature_Slow_SSE4_2			preferred
446cf2
-#define feature_AVX_Fast_Unaligned_Load		preferred
446cf2
-#define feature_Prefer_MAP_32BIT_EXEC		preferred
446cf2
-#define feature_Prefer_No_VZEROUPPER		preferred
446cf2
-#define feature_Prefer_ERMS			preferred
446cf2
-#define feature_Prefer_No_AVX512		preferred
446cf2
-#define feature_MathVec_Prefer_No_AVX512	preferred
446cf2
-#define feature_Prefer_FSRM			preferred
446cf2
-
446cf2
 /* XCR0 Feature flags.  */
446cf2
 #define bit_XMM_state		(1u << 1)
446cf2
 #define bit_YMM_state		(1u << 2)
446cf2
@@ -851,8 +835,6 @@ extern const struct cpu_features *__get_cpu_features (void)
446cf2
 /* Unused for x86.  */
446cf2
 #  define INIT_ARCH()
446cf2
 #  define __get_cpu_features()	(&GLRO(dl_x86_cpu_features))
446cf2
-#  define x86_get_cpuid_registers(i) \
446cf2
-       (&(GLRO(dl_x86_cpu_features).cpuid[i]))
446cf2
 # endif
446cf2
 
446cf2
 #ifdef __x86_64__
446cf2
diff --git a/sysdeps/x86/cpu-tunables.c b/sysdeps/x86/cpu-tunables.c
446cf2
index 012ae48933055eaa..0728023007a0f423 100644
446cf2
--- a/sysdeps/x86/cpu-tunables.c
446cf2
+++ b/sysdeps/x86/cpu-tunables.c
446cf2
@@ -43,66 +43,45 @@ extern __typeof (memcmp) DEFAULT_MEMCMP;
446cf2
   _Static_assert (sizeof (#name) - 1 == len, #name " != " #len);	\
446cf2
   if (!DEFAULT_MEMCMP (f, #name, len))					\
446cf2
     {									\
446cf2
-      cpu_features->cpuid[index_cpu_##name].reg_##name			\
446cf2
-	&= ~bit_cpu_##name;						\
446cf2
+      CPU_FEATURE_UNSET (cpu_features, name)				\
446cf2
       break;								\
446cf2
     }
446cf2
 
446cf2
-/* Disable an ARCH feature NAME.  We don't enable an ARCH feature which
446cf2
-   isn't available.  */
446cf2
-# define CHECK_GLIBC_IFUNC_ARCH_OFF(f, cpu_features, name, len)		\
446cf2
+/* Disable a preferred feature NAME.  We don't enable a preferred feature
446cf2
+   which isn't available.  */
446cf2
+# define CHECK_GLIBC_IFUNC_PREFERRED_OFF(f, cpu_features, name, len)	\
446cf2
   _Static_assert (sizeof (#name) - 1 == len, #name " != " #len);	\
446cf2
   if (!DEFAULT_MEMCMP (f, #name, len))					\
446cf2
     {									\
446cf2
-      cpu_features->feature_##name[index_arch_##name]			\
446cf2
+      cpu_features->preferred[index_arch_##name]			\
446cf2
 	&= ~bit_arch_##name;						\
446cf2
       break;								\
446cf2
     }
446cf2
 
446cf2
-/* Enable/disable an ARCH feature NAME.  */
446cf2
-# define CHECK_GLIBC_IFUNC_ARCH_BOTH(f, cpu_features, name, disable,	\
446cf2
-				    len)				\
446cf2
+/* Enable/disable a preferred feature NAME.  */
446cf2
+# define CHECK_GLIBC_IFUNC_PREFERRED_BOTH(f, cpu_features, name,	\
446cf2
+					  disable, len)			\
446cf2
   _Static_assert (sizeof (#name) - 1 == len, #name " != " #len);	\
446cf2
   if (!DEFAULT_MEMCMP (f, #name, len))					\
446cf2
     {									\
446cf2
       if (disable)							\
446cf2
-	cpu_features->feature_##name[index_arch_##name]			\
446cf2
-	  &= ~bit_arch_##name;						\
446cf2
+	cpu_features->preferred[index_arch_##name] &= ~bit_arch_##name;	\
446cf2
       else								\
446cf2
-	cpu_features->feature_##name[index_arch_##name]			\
446cf2
-	  |= bit_arch_##name;						\
446cf2
+	cpu_features->preferred[index_arch_##name] |= bit_arch_##name;	\
446cf2
       break;								\
446cf2
     }
446cf2
 
446cf2
-/* Enable/disable an ARCH feature NAME.  Enable an ARCH feature only
446cf2
-   if the ARCH feature NEED is also enabled.  */
446cf2
-# define CHECK_GLIBC_IFUNC_ARCH_NEED_ARCH_BOTH(f, cpu_features, name,	\
446cf2
+/* Enable/disable a preferred feature NAME.  Enable a preferred feature
446cf2
+   only if the feature NEED is usable.  */
446cf2
+# define CHECK_GLIBC_IFUNC_PREFERRED_NEED_BOTH(f, cpu_features, name,	\
446cf2
 					       need, disable, len)	\
446cf2
   _Static_assert (sizeof (#name) - 1 == len, #name " != " #len);	\
446cf2
   if (!DEFAULT_MEMCMP (f, #name, len))					\
446cf2
     {									\
446cf2
       if (disable)							\
446cf2
-	cpu_features->feature_##name[index_arch_##name]			\
446cf2
-	  &= ~bit_arch_##name;						\
446cf2
-      else if (CPU_FEATURES_ARCH_P (cpu_features, need))		\
446cf2
-	cpu_features->feature_##name[index_arch_##name]			\
446cf2
-	  |= bit_arch_##name;						\
446cf2
-      break;								\
446cf2
-    }
446cf2
-
446cf2
-/* Enable/disable an ARCH feature NAME.  Enable an ARCH feature only
446cf2
-   if the CPU feature NEED is also enabled.  */
446cf2
-# define CHECK_GLIBC_IFUNC_ARCH_NEED_CPU_BOTH(f, cpu_features, name,	\
446cf2
-					      need, disable, len)	\
446cf2
-  _Static_assert (sizeof (#name) - 1 == len, #name " != " #len);	\
446cf2
-  if (!DEFAULT_MEMCMP (f, #name, len))					\
446cf2
-    {									\
446cf2
-      if (disable)							\
446cf2
-	cpu_features->feature_##name[index_arch_##name]			\
446cf2
-	  &= ~bit_arch_##name;						\
446cf2
-      else if (CPU_FEATURES_CPU_P (cpu_features, need))			\
446cf2
-	cpu_features->feature_##name[index_arch_##name]			\
446cf2
-	  |= bit_arch_##name;						\
446cf2
+	cpu_features->preferred[index_arch_##name] &= ~bit_arch_##name;	\
446cf2
+      else if (CPU_FEATURE_USABLE_P (cpu_features, need))		\
446cf2
+	cpu_features->preferred[index_arch_##name] |= bit_arch_##name;	\
446cf2
       break;								\
446cf2
     }
446cf2
 
446cf2
@@ -178,8 +157,8 @@ TUNABLE_CALLBACK (set_hwcaps) (tunable_val_t *valp)
446cf2
 	      CHECK_GLIBC_IFUNC_CPU_OFF (n, cpu_features, ERMS, 4);
446cf2
 	      CHECK_GLIBC_IFUNC_CPU_OFF (n, cpu_features, FMA4, 4);
446cf2
 	      CHECK_GLIBC_IFUNC_CPU_OFF (n, cpu_features, SSE2, 4);
446cf2
-	      CHECK_GLIBC_IFUNC_ARCH_OFF (n, cpu_features, I586, 4);
446cf2
-	      CHECK_GLIBC_IFUNC_ARCH_OFF (n, cpu_features, I686, 4);
446cf2
+	      CHECK_GLIBC_IFUNC_PREFERRED_OFF (n, cpu_features, I586, 4);
446cf2
+	      CHECK_GLIBC_IFUNC_PREFERRED_OFF (n, cpu_features, I686, 4);
446cf2
 	    }
446cf2
 	  break;
446cf2
 	case 5:
446cf2
@@ -197,6 +176,13 @@ TUNABLE_CALLBACK (set_hwcaps) (tunable_val_t *valp)
446cf2
 	      CHECK_GLIBC_IFUNC_CPU_OFF (n, cpu_features, POPCNT, 6);
446cf2
 	      CHECK_GLIBC_IFUNC_CPU_OFF (n, cpu_features, SSE4_1, 6);
446cf2
 	      CHECK_GLIBC_IFUNC_CPU_OFF (n, cpu_features, SSE4_2, 6);
446cf2
+	      if (!DEFAULT_MEMCMP (n, "XSAVEC", 6))
446cf2
+		{
446cf2
+		  /* Update xsave_state_size to XSAVE state size.  */
446cf2
+		  cpu_features->xsave_state_size
446cf2
+		    = cpu_features->xsave_state_full_size;
446cf2
+		  CPU_FEATURE_UNSET (cpu_features, XSAVEC);
446cf2
+		}
446cf2
 	    }
446cf2
 	  break;
446cf2
 	case 7:
446cf2
@@ -216,115 +202,85 @@ TUNABLE_CALLBACK (set_hwcaps) (tunable_val_t *valp)
446cf2
 	      CHECK_GLIBC_IFUNC_CPU_OFF (n, cpu_features, AVX512PF, 8);
446cf2
 	      CHECK_GLIBC_IFUNC_CPU_OFF (n, cpu_features, AVX512VL, 8);
446cf2
 	    }
446cf2
-	  CHECK_GLIBC_IFUNC_ARCH_BOTH (n, cpu_features, Slow_BSF,
446cf2
-				       disable, 8);
446cf2
-	  break;
446cf2
-	case 10:
446cf2
-	  if (disable)
446cf2
-	    {
446cf2
-	      CHECK_GLIBC_IFUNC_ARCH_OFF (n, cpu_features, AVX_Usable,
446cf2
-					  10);
446cf2
-	      CHECK_GLIBC_IFUNC_ARCH_OFF (n, cpu_features, FMA_Usable,
446cf2
-					  10);
446cf2
-	    }
446cf2
+	  CHECK_GLIBC_IFUNC_PREFERRED_BOTH (n, cpu_features, Slow_BSF,
446cf2
+					    disable, 8);
446cf2
 	  break;
446cf2
 	case 11:
446cf2
-	  if (disable)
446cf2
 	    {
446cf2
-	      CHECK_GLIBC_IFUNC_ARCH_OFF (n, cpu_features, AVX2_Usable,
446cf2
-					  11);
446cf2
-	      CHECK_GLIBC_IFUNC_ARCH_OFF (n, cpu_features, FMA4_Usable,
446cf2
-					  11);
446cf2
-	    }
446cf2
-	  CHECK_GLIBC_IFUNC_ARCH_BOTH (n, cpu_features, Prefer_ERMS,
446cf2
-				       disable, 11);
446cf2
-	  CHECK_GLIBC_IFUNC_ARCH_NEED_CPU_BOTH (n, cpu_features,
446cf2
-						Slow_SSE4_2, SSE4_2,
446cf2
+	      CHECK_GLIBC_IFUNC_PREFERRED_BOTH (n, cpu_features,
446cf2
+						Prefer_ERMS,
446cf2
 						disable, 11);
446cf2
-	  CHECK_GLIBC_IFUNC_ARCH_BOTH (n, cpu_features, Prefer_FSRM,
446cf2
-				       disable, 11);
446cf2
-	  break;
446cf2
-	case 13:
446cf2
-	  if (disable)
446cf2
-	    {
446cf2
-	      /* Update xsave_state_size to XSAVE state size.  */
446cf2
-	      cpu_features->xsave_state_size
446cf2
-		= cpu_features->xsave_state_full_size;
446cf2
-	      CHECK_GLIBC_IFUNC_ARCH_OFF (n, cpu_features,
446cf2
-					  XSAVEC_Usable, 13);
446cf2
-	    }
446cf2
-	  break;
446cf2
-	case 14:
446cf2
-	  if (disable)
446cf2
-	    {
446cf2
-	      CHECK_GLIBC_IFUNC_ARCH_OFF (n, cpu_features,
446cf2
-					  AVX512F_Usable, 14);
446cf2
+	      CHECK_GLIBC_IFUNC_PREFERRED_BOTH (n, cpu_features,
446cf2
+						Prefer_FSRM,
446cf2
+						disable, 11);
446cf2
+	      CHECK_GLIBC_IFUNC_PREFERRED_NEED_BOTH (n, cpu_features,
446cf2
+						     Slow_SSE4_2,
446cf2
+						     SSE4_2,
446cf2
+						     disable, 11);
446cf2
 	    }
446cf2
 	  break;
446cf2
 	case 15:
446cf2
-	  if (disable)
446cf2
 	    {
446cf2
-	      CHECK_GLIBC_IFUNC_ARCH_OFF (n, cpu_features,
446cf2
-					  AVX512DQ_Usable, 15);
446cf2
+	      CHECK_GLIBC_IFUNC_PREFERRED_BOTH (n, cpu_features,
446cf2
+						Fast_Rep_String,
446cf2
+						disable, 15);
446cf2
 	    }
446cf2
-	  CHECK_GLIBC_IFUNC_ARCH_BOTH (n, cpu_features, Fast_Rep_String,
446cf2
-				       disable, 15);
446cf2
 	  break;
446cf2
 	case 16:
446cf2
 	    {
446cf2
-	      CHECK_GLIBC_IFUNC_ARCH_NEED_ARCH_BOTH
446cf2
-		(n, cpu_features, Prefer_No_AVX512, AVX512F_Usable,
446cf2
+	      CHECK_GLIBC_IFUNC_PREFERRED_NEED_BOTH
446cf2
+		(n, cpu_features, Prefer_No_AVX512, AVX512F,
446cf2
 		 disable, 16);
446cf2
 	    }
446cf2
 	  break;
446cf2
 	case 18:
446cf2
 	    {
446cf2
-	      CHECK_GLIBC_IFUNC_ARCH_BOTH (n, cpu_features,
446cf2
-					   Fast_Copy_Backward, disable,
446cf2
-					   18);
446cf2
+	      CHECK_GLIBC_IFUNC_PREFERRED_BOTH (n, cpu_features,
446cf2
+						Fast_Copy_Backward,
446cf2
+						disable, 18);
446cf2
 	    }
446cf2
 	  break;
446cf2
 	case 19:
446cf2
 	    {
446cf2
-	      CHECK_GLIBC_IFUNC_ARCH_BOTH (n, cpu_features,
446cf2
-					   Fast_Unaligned_Load, disable,
446cf2
-					   19);
446cf2
-	      CHECK_GLIBC_IFUNC_ARCH_BOTH (n, cpu_features,
446cf2
-					   Fast_Unaligned_Copy, disable,
446cf2
-					   19);
446cf2
+	      CHECK_GLIBC_IFUNC_PREFERRED_BOTH (n, cpu_features,
446cf2
+						Fast_Unaligned_Load,
446cf2
+						disable, 19);
446cf2
+	      CHECK_GLIBC_IFUNC_PREFERRED_BOTH (n, cpu_features,
446cf2
+						Fast_Unaligned_Copy,
446cf2
+						disable, 19);
446cf2
 	    }
446cf2
 	  break;
446cf2
 	case 20:
446cf2
 	    {
446cf2
-	      CHECK_GLIBC_IFUNC_ARCH_NEED_ARCH_BOTH
446cf2
-		(n, cpu_features, Prefer_No_VZEROUPPER, AVX_Usable,
446cf2
-		 disable, 20);
446cf2
+	      CHECK_GLIBC_IFUNC_PREFERRED_NEED_BOTH
446cf2
+		(n, cpu_features, Prefer_No_VZEROUPPER, AVX, disable,
446cf2
+		 20);
446cf2
 	    }
446cf2
 	  break;
446cf2
 	case 21:
446cf2
 	    {
446cf2
-	      CHECK_GLIBC_IFUNC_ARCH_BOTH (n, cpu_features,
446cf2
-					   Prefer_MAP_32BIT_EXEC, disable,
446cf2
-					   21);
446cf2
+	      CHECK_GLIBC_IFUNC_PREFERRED_BOTH (n, cpu_features,
446cf2
+						Prefer_MAP_32BIT_EXEC,
446cf2
+						disable, 21);
446cf2
 	    }
446cf2
 	  break;
446cf2
 	case 23:
446cf2
 	    {
446cf2
-	      CHECK_GLIBC_IFUNC_ARCH_NEED_ARCH_BOTH
446cf2
-		(n, cpu_features, AVX_Fast_Unaligned_Load, AVX_Usable,
446cf2
+	      CHECK_GLIBC_IFUNC_PREFERRED_NEED_BOTH
446cf2
+		(n, cpu_features, AVX_Fast_Unaligned_Load, AVX,
446cf2
 		 disable, 23);
446cf2
 	    }
446cf2
 	  break;
446cf2
 	case 24:
446cf2
 	    {
446cf2
-	      CHECK_GLIBC_IFUNC_ARCH_NEED_ARCH_BOTH
446cf2
-		(n, cpu_features, MathVec_Prefer_No_AVX512,
446cf2
-		 AVX512F_Usable, disable, 24);
446cf2
+	      CHECK_GLIBC_IFUNC_PREFERRED_NEED_BOTH
446cf2
+		(n, cpu_features, MathVec_Prefer_No_AVX512, AVX512F,
446cf2
+		 disable, 24);
446cf2
 	    }
446cf2
 	  break;
446cf2
 	case 26:
446cf2
 	    {
446cf2
-	      CHECK_GLIBC_IFUNC_ARCH_NEED_CPU_BOTH
446cf2
+	      CHECK_GLIBC_IFUNC_PREFERRED_NEED_BOTH
446cf2
 		(n, cpu_features, Prefer_PMINUB_for_stringop, SSE2,
446cf2
 		 disable, 26);
446cf2
 	    }
446cf2
diff --git a/sysdeps/x86/dl-cet.c b/sysdeps/x86/dl-cet.c
446cf2
index d481bddc27e5d7cc..11ff0618fae7230f 100644
446cf2
--- a/sysdeps/x86/dl-cet.c
446cf2
+++ b/sysdeps/x86/dl-cet.c
446cf2
@@ -74,10 +74,10 @@ dl_cet_check (struct link_map *m, const char *program)
446cf2
 
446cf2
 	     GLIBC_TUNABLES=glibc.cpu.hwcaps=-IBT,-SHSTK
446cf2
 	   */
446cf2
-	  enable_ibt &= (HAS_CPU_FEATURE (IBT)
446cf2
+	  enable_ibt &= (CPU_FEATURE_USABLE (IBT)
446cf2
 			 && (enable_ibt_type == cet_always_on
446cf2
 			     || (m->l_cet & lc_ibt) != 0));
446cf2
-	  enable_shstk &= (HAS_CPU_FEATURE (SHSTK)
446cf2
+	  enable_shstk &= (CPU_FEATURE_USABLE (SHSTK)
446cf2
 			   && (enable_shstk_type == cet_always_on
446cf2
 			       || (m->l_cet & lc_shstk) != 0));
446cf2
 	}
446cf2
diff --git a/sysdeps/x86/tst-get-cpu-features.c b/sysdeps/x86/tst-get-cpu-features.c
446cf2
index c56f309ba0736c0d..85ec9d5a091e2c88 100644
446cf2
--- a/sysdeps/x86/tst-get-cpu-features.c
446cf2
+++ b/sysdeps/x86/tst-get-cpu-features.c
446cf2
@@ -137,6 +137,7 @@ do_test (void)
446cf2
   CHECK_CPU_FEATURE (INVPCID);
446cf2
   CHECK_CPU_FEATURE (RTM);
446cf2
   CHECK_CPU_FEATURE (PQM);
446cf2
+  CHECK_CPU_FEATURE (DEPR_FPU_CS_DS);
446cf2
   CHECK_CPU_FEATURE (MPX);
446cf2
   CHECK_CPU_FEATURE (PQE);
446cf2
   CHECK_CPU_FEATURE (AVX512F);
446cf2
@@ -218,35 +219,156 @@ do_test (void)
446cf2
   CHECK_CPU_FEATURE (AVX512_BF16);
446cf2
 
446cf2
   printf ("Usable CPU features:\n");
446cf2
+  CHECK_CPU_FEATURE_USABLE (SSE3);
446cf2
+  CHECK_CPU_FEATURE_USABLE (PCLMULQDQ);
446cf2
+  CHECK_CPU_FEATURE_USABLE (DTES64);
446cf2
+  CHECK_CPU_FEATURE_USABLE (MONITOR);
446cf2
+  CHECK_CPU_FEATURE_USABLE (DS_CPL);
446cf2
+  CHECK_CPU_FEATURE_USABLE (VMX);
446cf2
+  CHECK_CPU_FEATURE_USABLE (SMX);
446cf2
+  CHECK_CPU_FEATURE_USABLE (EST);
446cf2
+  CHECK_CPU_FEATURE_USABLE (TM2);
446cf2
+  CHECK_CPU_FEATURE_USABLE (SSSE3);
446cf2
+  CHECK_CPU_FEATURE_USABLE (CNXT_ID);
446cf2
+  CHECK_CPU_FEATURE_USABLE (SDBG);
446cf2
   CHECK_CPU_FEATURE_USABLE (FMA);
446cf2
+  CHECK_CPU_FEATURE_USABLE (CMPXCHG16B);
446cf2
+  CHECK_CPU_FEATURE_USABLE (XTPRUPDCTRL);
446cf2
+  CHECK_CPU_FEATURE_USABLE (PDCM);
446cf2
+  CHECK_CPU_FEATURE_USABLE (PCID);
446cf2
+  CHECK_CPU_FEATURE_USABLE (DCA);
446cf2
+  CHECK_CPU_FEATURE_USABLE (SSE4_1);
446cf2
+  CHECK_CPU_FEATURE_USABLE (SSE4_2);
446cf2
+  CHECK_CPU_FEATURE_USABLE (X2APIC);
446cf2
+  CHECK_CPU_FEATURE_USABLE (MOVBE);
446cf2
+  CHECK_CPU_FEATURE_USABLE (POPCNT);
446cf2
+  CHECK_CPU_FEATURE_USABLE (TSC_DEADLINE);
446cf2
+  CHECK_CPU_FEATURE_USABLE (AES);
446cf2
+  CHECK_CPU_FEATURE_USABLE (XSAVE);
446cf2
+  CHECK_CPU_FEATURE_USABLE (OSXSAVE);
446cf2
   CHECK_CPU_FEATURE_USABLE (AVX);
446cf2
   CHECK_CPU_FEATURE_USABLE (F16C);
446cf2
+  CHECK_CPU_FEATURE_USABLE (RDRAND);
446cf2
+  CHECK_CPU_FEATURE_USABLE (FPU);
446cf2
+  CHECK_CPU_FEATURE_USABLE (VME);
446cf2
+  CHECK_CPU_FEATURE_USABLE (DE);
446cf2
+  CHECK_CPU_FEATURE_USABLE (PSE);
446cf2
+  CHECK_CPU_FEATURE_USABLE (TSC);
446cf2
+  CHECK_CPU_FEATURE_USABLE (MSR);
446cf2
+  CHECK_CPU_FEATURE_USABLE (PAE);
446cf2
+  CHECK_CPU_FEATURE_USABLE (MCE);
446cf2
+  CHECK_CPU_FEATURE_USABLE (CX8);
446cf2
+  CHECK_CPU_FEATURE_USABLE (APIC);
446cf2
+  CHECK_CPU_FEATURE_USABLE (SEP);
446cf2
+  CHECK_CPU_FEATURE_USABLE (MTRR);
446cf2
+  CHECK_CPU_FEATURE_USABLE (PGE);
446cf2
+  CHECK_CPU_FEATURE_USABLE (MCA);
446cf2
+  CHECK_CPU_FEATURE_USABLE (CMOV);
446cf2
+  CHECK_CPU_FEATURE_USABLE (PAT);
446cf2
+  CHECK_CPU_FEATURE_USABLE (PSE_36);
446cf2
+  CHECK_CPU_FEATURE_USABLE (PSN);
446cf2
+  CHECK_CPU_FEATURE_USABLE (CLFSH);
446cf2
+  CHECK_CPU_FEATURE_USABLE (DS);
446cf2
+  CHECK_CPU_FEATURE_USABLE (ACPI);
446cf2
+  CHECK_CPU_FEATURE_USABLE (MMX);
446cf2
+  CHECK_CPU_FEATURE_USABLE (FXSR);
446cf2
+  CHECK_CPU_FEATURE_USABLE (SSE);
446cf2
+  CHECK_CPU_FEATURE_USABLE (SSE2);
446cf2
+  CHECK_CPU_FEATURE_USABLE (SS);
446cf2
+  CHECK_CPU_FEATURE_USABLE (HTT);
446cf2
+  CHECK_CPU_FEATURE_USABLE (TM);
446cf2
+  CHECK_CPU_FEATURE_USABLE (PBE);
446cf2
+  CHECK_CPU_FEATURE_USABLE (FSGSBASE);
446cf2
+  CHECK_CPU_FEATURE_USABLE (TSC_ADJUST);
446cf2
+  CHECK_CPU_FEATURE_USABLE (SGX);
446cf2
+  CHECK_CPU_FEATURE_USABLE (BMI1);
446cf2
+  CHECK_CPU_FEATURE_USABLE (HLE);
446cf2
   CHECK_CPU_FEATURE_USABLE (AVX2);
446cf2
+  CHECK_CPU_FEATURE_USABLE (SMEP);
446cf2
+  CHECK_CPU_FEATURE_USABLE (BMI2);
446cf2
+  CHECK_CPU_FEATURE_USABLE (ERMS);
446cf2
+  CHECK_CPU_FEATURE_USABLE (INVPCID);
446cf2
+  CHECK_CPU_FEATURE_USABLE (RTM);
446cf2
+  CHECK_CPU_FEATURE_USABLE (PQM);
446cf2
+  CHECK_CPU_FEATURE_USABLE (DEPR_FPU_CS_DS);
446cf2
+  CHECK_CPU_FEATURE_USABLE (MPX);
446cf2
+  CHECK_CPU_FEATURE_USABLE (PQE);
446cf2
   CHECK_CPU_FEATURE_USABLE (AVX512F);
446cf2
   CHECK_CPU_FEATURE_USABLE (AVX512DQ);
446cf2
+  CHECK_CPU_FEATURE_USABLE (RDSEED);
446cf2
+  CHECK_CPU_FEATURE_USABLE (ADX);
446cf2
+  CHECK_CPU_FEATURE_USABLE (SMAP);
446cf2
   CHECK_CPU_FEATURE_USABLE (AVX512_IFMA);
446cf2
+  CHECK_CPU_FEATURE_USABLE (CLFLUSHOPT);
446cf2
+  CHECK_CPU_FEATURE_USABLE (CLWB);
446cf2
+  CHECK_CPU_FEATURE_USABLE (TRACE);
446cf2
   CHECK_CPU_FEATURE_USABLE (AVX512PF);
446cf2
   CHECK_CPU_FEATURE_USABLE (AVX512ER);
446cf2
   CHECK_CPU_FEATURE_USABLE (AVX512CD);
446cf2
+  CHECK_CPU_FEATURE_USABLE (SHA);
446cf2
   CHECK_CPU_FEATURE_USABLE (AVX512BW);
446cf2
   CHECK_CPU_FEATURE_USABLE (AVX512VL);
446cf2
+  CHECK_CPU_FEATURE_USABLE (PREFETCHWT1);
446cf2
   CHECK_CPU_FEATURE_USABLE (AVX512_VBMI);
446cf2
+  CHECK_CPU_FEATURE_USABLE (UMIP);
446cf2
   CHECK_CPU_FEATURE_USABLE (PKU);
446cf2
+  CHECK_CPU_FEATURE_USABLE (OSPKE);
446cf2
+  CHECK_CPU_FEATURE_USABLE (WAITPKG);
446cf2
   CHECK_CPU_FEATURE_USABLE (AVX512_VBMI2);
446cf2
+  CHECK_CPU_FEATURE_USABLE (SHSTK);
446cf2
+  CHECK_CPU_FEATURE_USABLE (GFNI);
446cf2
   CHECK_CPU_FEATURE_USABLE (VAES);
446cf2
   CHECK_CPU_FEATURE_USABLE (VPCLMULQDQ);
446cf2
   CHECK_CPU_FEATURE_USABLE (AVX512_VNNI);
446cf2
   CHECK_CPU_FEATURE_USABLE (AVX512_BITALG);
446cf2
   CHECK_CPU_FEATURE_USABLE (AVX512_VPOPCNTDQ);
446cf2
+  CHECK_CPU_FEATURE_USABLE (RDPID);
446cf2
+  CHECK_CPU_FEATURE_USABLE (CLDEMOTE);
446cf2
+  CHECK_CPU_FEATURE_USABLE (MOVDIRI);
446cf2
+  CHECK_CPU_FEATURE_USABLE (MOVDIR64B);
446cf2
+  CHECK_CPU_FEATURE_USABLE (ENQCMD);
446cf2
+  CHECK_CPU_FEATURE_USABLE (SGX_LC);
446cf2
+  CHECK_CPU_FEATURE_USABLE (PKS);
446cf2
   CHECK_CPU_FEATURE_USABLE (AVX512_4VNNIW);
446cf2
   CHECK_CPU_FEATURE_USABLE (AVX512_4FMAPS);
446cf2
+  CHECK_CPU_FEATURE_USABLE (FSRM);
446cf2
   CHECK_CPU_FEATURE_USABLE (AVX512_VP2INTERSECT);
446cf2
+  CHECK_CPU_FEATURE_USABLE (MD_CLEAR);
446cf2
+  CHECK_CPU_FEATURE_USABLE (SERIALIZE);
446cf2
+  CHECK_CPU_FEATURE_USABLE (HYBRID);
446cf2
+  CHECK_CPU_FEATURE_USABLE (TSXLDTRK);
446cf2
+  CHECK_CPU_FEATURE_USABLE (PCONFIG);
446cf2
+  CHECK_CPU_FEATURE_USABLE (IBT);
446cf2
   CHECK_CPU_FEATURE_USABLE (AMX_BF16);
446cf2
   CHECK_CPU_FEATURE_USABLE (AMX_TILE);
446cf2
   CHECK_CPU_FEATURE_USABLE (AMX_INT8);
446cf2
+  CHECK_CPU_FEATURE_USABLE (IBRS_IBPB);
446cf2
+  CHECK_CPU_FEATURE_USABLE (STIBP);
446cf2
+  CHECK_CPU_FEATURE_USABLE (L1D_FLUSH);
446cf2
+  CHECK_CPU_FEATURE_USABLE (ARCH_CAPABILITIES);
446cf2
+  CHECK_CPU_FEATURE_USABLE (CORE_CAPABILITIES);
446cf2
+  CHECK_CPU_FEATURE_USABLE (SSBD);
446cf2
+  CHECK_CPU_FEATURE_USABLE (LAHF64_SAHF64);
446cf2
+  CHECK_CPU_FEATURE_USABLE (SVM);
446cf2
+  CHECK_CPU_FEATURE_USABLE (LZCNT);
446cf2
+  CHECK_CPU_FEATURE_USABLE (SSE4A);
446cf2
+  CHECK_CPU_FEATURE_USABLE (PREFETCHW);
446cf2
   CHECK_CPU_FEATURE_USABLE (XOP);
446cf2
+  CHECK_CPU_FEATURE_USABLE (LWP);
446cf2
   CHECK_CPU_FEATURE_USABLE (FMA4);
446cf2
+  CHECK_CPU_FEATURE_USABLE (TBM);
446cf2
+  CHECK_CPU_FEATURE_USABLE (SYSCALL_SYSRET);
446cf2
+  CHECK_CPU_FEATURE_USABLE (NX);
446cf2
+  CHECK_CPU_FEATURE_USABLE (PAGE1GB);
446cf2
+  CHECK_CPU_FEATURE_USABLE (RDTSCP);
446cf2
+  CHECK_CPU_FEATURE_USABLE (LM);
446cf2
+  CHECK_CPU_FEATURE_USABLE (XSAVEOPT);
446cf2
   CHECK_CPU_FEATURE_USABLE (XSAVEC);
446cf2
+  CHECK_CPU_FEATURE_USABLE (XGETBV_ECX_1);
446cf2
+  CHECK_CPU_FEATURE_USABLE (XSAVES);
446cf2
+  CHECK_CPU_FEATURE_USABLE (XFD);
446cf2
+  CHECK_CPU_FEATURE_USABLE (INVARIANT_TSC);
446cf2
+  CHECK_CPU_FEATURE_USABLE (WBNOINVD);
446cf2
   CHECK_CPU_FEATURE_USABLE (AVX512_BF16);
446cf2
 
446cf2
   return 0;
446cf2
diff --git a/sysdeps/x86_64/Makefile b/sysdeps/x86_64/Makefile
446cf2
index e3bb45d78811d70f..42b97c5cc73892cc 100644
446cf2
--- a/sysdeps/x86_64/Makefile
446cf2
+++ b/sysdeps/x86_64/Makefile
446cf2
@@ -57,7 +57,7 @@ modules-names += x86_64/tst-x86_64mod-1
446cf2
 LDFLAGS-tst-x86_64mod-1.so = -Wl,-soname,tst-x86_64mod-1.so
446cf2
 ifneq (no,$(have-tunables))
446cf2
 # Test the state size for XSAVE when XSAVEC is disabled.
446cf2
-tst-x86_64-1-ENV = GLIBC_TUNABLES=glibc.cpu.hwcaps=-XSAVEC_Usable
446cf2
+tst-x86_64-1-ENV = GLIBC_TUNABLES=glibc.cpu.hwcaps=-XSAVEC
446cf2
 endif
446cf2
 
446cf2
 $(objpfx)tst-x86_64-1: $(objpfx)x86_64/tst-x86_64mod-1.so
446cf2
@@ -71,10 +71,10 @@ CFLAGS-tst-platformmod-2.c = -mno-avx
446cf2
 LDFLAGS-tst-platformmod-2.so = -Wl,-soname,tst-platformmod-2.so
446cf2
 $(objpfx)tst-platform-1: $(objpfx)tst-platformmod-1.so
446cf2
 $(objpfx)tst-platform-1.out: $(objpfx)x86_64/tst-platformmod-2.so
446cf2
-# Turn off AVX512F_Usable and AVX2_Usable so that GLRO(dl_platform) is
446cf2
+# Turn off AVX512F and AVX2 so that GLRO(dl_platform) is
446cf2
 # always set to x86_64.
446cf2
 tst-platform-1-ENV = LD_PRELOAD=$(objpfx)\$$PLATFORM/tst-platformmod-2.so \
446cf2
-	GLIBC_TUNABLES=glibc.cpu.hwcaps=-AVX512F_Usable,-AVX2_Usable
446cf2
+	GLIBC_TUNABLES=glibc.cpu.hwcaps=-AVX512F,-AVX2
446cf2
 endif
446cf2
 
446cf2
 tests += tst-audit3 tst-audit4 tst-audit5 tst-audit6 tst-audit7 \
446cf2
diff --git a/sysdeps/x86_64/dl-machine.h b/sysdeps/x86_64/dl-machine.h
446cf2
index 23afb3c05dbe17d6..d58298d787ef352c 100644
446cf2
--- a/sysdeps/x86_64/dl-machine.h
446cf2
+++ b/sysdeps/x86_64/dl-machine.h
446cf2
@@ -99,9 +99,9 @@ elf_machine_runtime_setup (struct link_map *l, int lazy, int profile)
446cf2
 	 end in this function.  */
446cf2
       if (__glibc_unlikely (profile))
446cf2
 	{
446cf2
-	  if (HAS_ARCH_FEATURE (AVX512F_Usable))
446cf2
+	  if (CPU_FEATURE_USABLE (AVX512F))
446cf2
 	    *(ElfW(Addr) *) (got + 2) = (ElfW(Addr)) &_dl_runtime_profile_avx512;
446cf2
-	  else if (HAS_ARCH_FEATURE (AVX_Usable))
446cf2
+	  else if (CPU_FEATURE_USABLE (AVX))
446cf2
 	    *(ElfW(Addr) *) (got + 2) = (ElfW(Addr)) &_dl_runtime_profile_avx;
446cf2
 	  else
446cf2
 	    *(ElfW(Addr) *) (got + 2) = (ElfW(Addr)) &_dl_runtime_profile_sse;
446cf2
@@ -119,7 +119,7 @@ elf_machine_runtime_setup (struct link_map *l, int lazy, int profile)
446cf2
 	     the resolved address.  */
446cf2
 	  if (GLRO(dl_x86_cpu_features).xsave_state_size != 0)
446cf2
 	    *(ElfW(Addr) *) (got + 2)
446cf2
-	      = (HAS_ARCH_FEATURE (XSAVEC_Usable)
446cf2
+	      = (CPU_FEATURE_USABLE (XSAVEC)
446cf2
 		 ? (ElfW(Addr)) &_dl_runtime_resolve_xsavec
446cf2
 		 : (ElfW(Addr)) &_dl_runtime_resolve_xsave);
446cf2
 	  else
446cf2
diff --git a/sysdeps/x86_64/fpu/math-tests-arch.h b/sysdeps/x86_64/fpu/math-tests-arch.h
446cf2
index a5df133292ce39b0..61955d70863321fd 100644
446cf2
--- a/sysdeps/x86_64/fpu/math-tests-arch.h
446cf2
+++ b/sysdeps/x86_64/fpu/math-tests-arch.h
446cf2
@@ -24,7 +24,7 @@
446cf2
 # define CHECK_ARCH_EXT                                        \
446cf2
   do                                                           \
446cf2
     {                                                          \
446cf2
-      if (!HAS_ARCH_FEATURE (AVX_Usable)) return;              \
446cf2
+      if (!CPU_FEATURE_USABLE (AVX)) return;                   \
446cf2
     }                                                          \
446cf2
   while (0)
446cf2
 
446cf2
@@ -34,7 +34,7 @@
446cf2
 # define CHECK_ARCH_EXT                                        \
446cf2
   do                                                           \
446cf2
     {                                                          \
446cf2
-      if (!HAS_ARCH_FEATURE (AVX2_Usable)) return;             \
446cf2
+      if (!CPU_FEATURE_USABLE (AVX2)) return;                  \
446cf2
     }                                                          \
446cf2
   while (0)
446cf2
 
446cf2
@@ -44,7 +44,7 @@
446cf2
 # define CHECK_ARCH_EXT                                        \
446cf2
   do                                                           \
446cf2
     {                                                          \
446cf2
-      if (!HAS_ARCH_FEATURE (AVX512F_Usable)) return;          \
446cf2
+      if (!CPU_FEATURE_USABLE (AVX512F)) return;               \
446cf2
     }                                                          \
446cf2
   while (0)
446cf2
 
446cf2
diff --git a/sysdeps/x86_64/fpu/multiarch/ifunc-avx-fma4.h b/sysdeps/x86_64/fpu/multiarch/ifunc-avx-fma4.h
446cf2
index a5f9375afc683663..399ed90362f476b7 100644
446cf2
--- a/sysdeps/x86_64/fpu/multiarch/ifunc-avx-fma4.h
446cf2
+++ b/sysdeps/x86_64/fpu/multiarch/ifunc-avx-fma4.h
446cf2
@@ -29,14 +29,14 @@ IFUNC_SELECTOR (void)
446cf2
 {
446cf2
   const struct cpu_features* cpu_features = __get_cpu_features ();
446cf2
 
446cf2
-  if (CPU_FEATURES_ARCH_P (cpu_features, FMA_Usable)
446cf2
-      && CPU_FEATURES_ARCH_P (cpu_features, AVX2_Usable))
446cf2
+  if (CPU_FEATURE_USABLE_P (cpu_features, FMA)
446cf2
+      && CPU_FEATURE_USABLE_P (cpu_features, AVX2))
446cf2
     return OPTIMIZE (fma);
446cf2
 
446cf2
-  if (CPU_FEATURES_ARCH_P (cpu_features, FMA4_Usable))
446cf2
+  if (CPU_FEATURE_USABLE_P (cpu_features, FMA4))
446cf2
     return OPTIMIZE (fma4);
446cf2
 
446cf2
-  if (CPU_FEATURES_ARCH_P (cpu_features, AVX_Usable))
446cf2
+  if (CPU_FEATURE_USABLE_P (cpu_features, AVX))
446cf2
     return OPTIMIZE (avx);
446cf2
 
446cf2
   return OPTIMIZE (sse2);
446cf2
diff --git a/sysdeps/x86_64/fpu/multiarch/ifunc-fma.h b/sysdeps/x86_64/fpu/multiarch/ifunc-fma.h
446cf2
index 63a8cd221fb34e28..c6717d65dfd160e7 100644
446cf2
--- a/sysdeps/x86_64/fpu/multiarch/ifunc-fma.h
446cf2
+++ b/sysdeps/x86_64/fpu/multiarch/ifunc-fma.h
446cf2
@@ -26,8 +26,8 @@ IFUNC_SELECTOR (void)
446cf2
 {
446cf2
   const struct cpu_features* cpu_features = __get_cpu_features ();
446cf2
 
446cf2
-  if (CPU_FEATURES_ARCH_P (cpu_features, FMA_Usable)
446cf2
-      && CPU_FEATURES_ARCH_P (cpu_features, AVX2_Usable))
446cf2
+  if (CPU_FEATURE_USABLE_P (cpu_features, FMA)
446cf2
+      && CPU_FEATURE_USABLE_P (cpu_features, AVX2))
446cf2
     return OPTIMIZE (fma);
446cf2
 
446cf2
   return OPTIMIZE (sse2);
446cf2
diff --git a/sysdeps/x86_64/fpu/multiarch/ifunc-fma4.h b/sysdeps/x86_64/fpu/multiarch/ifunc-fma4.h
446cf2
index a2526a2ee0e55e18..76c677198dac5cb0 100644
446cf2
--- a/sysdeps/x86_64/fpu/multiarch/ifunc-fma4.h
446cf2
+++ b/sysdeps/x86_64/fpu/multiarch/ifunc-fma4.h
446cf2
@@ -28,11 +28,11 @@ IFUNC_SELECTOR (void)
446cf2
 {
446cf2
   const struct cpu_features* cpu_features = __get_cpu_features ();
446cf2
 
446cf2
-  if (CPU_FEATURES_ARCH_P (cpu_features, FMA_Usable)
446cf2
-      && CPU_FEATURES_ARCH_P (cpu_features, AVX2_Usable))
446cf2
+  if (CPU_FEATURE_USABLE_P (cpu_features, FMA)
446cf2
+      && CPU_FEATURE_USABLE_P (cpu_features, AVX2))
446cf2
     return OPTIMIZE (fma);
446cf2
 
446cf2
-  if (CPU_FEATURES_ARCH_P (cpu_features, FMA4_Usable))
446cf2
+  if (CPU_FEATURE_USABLE_P (cpu_features, FMA))
446cf2
     return OPTIMIZE (fma4);
446cf2
 
446cf2
   return OPTIMIZE (sse2);
446cf2
diff --git a/sysdeps/x86_64/fpu/multiarch/ifunc-mathvec-avx2.h b/sysdeps/x86_64/fpu/multiarch/ifunc-mathvec-avx2.h
446cf2
index bd2d32e4186c11e3..d84d82a3a22f0e86 100644
446cf2
--- a/sysdeps/x86_64/fpu/multiarch/ifunc-mathvec-avx2.h
446cf2
+++ b/sysdeps/x86_64/fpu/multiarch/ifunc-mathvec-avx2.h
446cf2
@@ -31,8 +31,8 @@ IFUNC_SELECTOR (void)
446cf2
 {
446cf2
   const struct cpu_features* cpu_features = __get_cpu_features ();
446cf2
 
446cf2
-  if (CPU_FEATURES_ARCH_P (cpu_features, FMA_Usable)
446cf2
-      && CPU_FEATURES_ARCH_P (cpu_features, AVX2_Usable))
446cf2
+  if (CPU_FEATURE_USABLE_P (cpu_features, FMA)
446cf2
+      && CPU_FEATURE_USABLE_P (cpu_features, AVX2))
446cf2
     return OPTIMIZE (avx2);
446cf2
 
446cf2
   return OPTIMIZE (sse_wrapper);
446cf2
diff --git a/sysdeps/x86_64/fpu/multiarch/ifunc-mathvec-avx512.h b/sysdeps/x86_64/fpu/multiarch/ifunc-mathvec-avx512.h
446cf2
index 174e462cfbcfa0a5..a2d9972e5a02b87c 100644
446cf2
--- a/sysdeps/x86_64/fpu/multiarch/ifunc-mathvec-avx512.h
446cf2
+++ b/sysdeps/x86_64/fpu/multiarch/ifunc-mathvec-avx512.h
446cf2
@@ -34,10 +34,10 @@ IFUNC_SELECTOR (void)
446cf2
 
446cf2
   if (!CPU_FEATURES_ARCH_P (cpu_features, MathVec_Prefer_No_AVX512))
446cf2
     {
446cf2
-      if (CPU_FEATURES_ARCH_P (cpu_features, AVX512DQ_Usable))
446cf2
+      if (CPU_FEATURE_USABLE_P (cpu_features, AVX512DQ))
446cf2
 	return OPTIMIZE (skx);
446cf2
 
446cf2
-      if (CPU_FEATURES_ARCH_P (cpu_features, AVX512F_Usable))
446cf2
+      if (CPU_FEATURE_USABLE_P (cpu_features, AVX512F))
446cf2
 	return OPTIMIZE (knl);
446cf2
     }
446cf2
 
446cf2
diff --git a/sysdeps/x86_64/fpu/multiarch/ifunc-mathvec-sse4_1.h b/sysdeps/x86_64/fpu/multiarch/ifunc-mathvec-sse4_1.h
446cf2
index c1e70ebfc1b424e6..64d03f6cb1caa9b7 100644
446cf2
--- a/sysdeps/x86_64/fpu/multiarch/ifunc-mathvec-sse4_1.h
446cf2
+++ b/sysdeps/x86_64/fpu/multiarch/ifunc-mathvec-sse4_1.h
446cf2
@@ -31,7 +31,7 @@ IFUNC_SELECTOR (void)
446cf2
 {
446cf2
   const struct cpu_features* cpu_features = __get_cpu_features ();
446cf2
 
446cf2
-  if (CPU_FEATURES_CPU_P (cpu_features, SSE4_1))
446cf2
+  if (CPU_FEATURE_USABLE_P (cpu_features, SSE4_1))
446cf2
     return OPTIMIZE (sse4);
446cf2
 
446cf2
   return OPTIMIZE (sse2);
446cf2
diff --git a/sysdeps/x86_64/fpu/multiarch/ifunc-sse4_1.h b/sysdeps/x86_64/fpu/multiarch/ifunc-sse4_1.h
446cf2
index a8710ba80226f13f..81bca1c9ecde9fb7 100644
446cf2
--- a/sysdeps/x86_64/fpu/multiarch/ifunc-sse4_1.h
446cf2
+++ b/sysdeps/x86_64/fpu/multiarch/ifunc-sse4_1.h
446cf2
@@ -26,7 +26,7 @@ IFUNC_SELECTOR (void)
446cf2
 {
446cf2
   const struct cpu_features* cpu_features = __get_cpu_features ();
446cf2
 
446cf2
-  if (CPU_FEATURES_CPU_P (cpu_features, SSE4_1))
446cf2
+  if (CPU_FEATURE_USABLE_P (cpu_features, SSE4_1))
446cf2
     return OPTIMIZE (sse41);
446cf2
 
446cf2
   return OPTIMIZE (c);
446cf2
diff --git a/sysdeps/x86_64/fpu/multiarch/s_fma.c b/sysdeps/x86_64/fpu/multiarch/s_fma.c
446cf2
index 875c76d3727e6d3c..9ea8d368d08220a9 100644
446cf2
--- a/sysdeps/x86_64/fpu/multiarch/s_fma.c
446cf2
+++ b/sysdeps/x86_64/fpu/multiarch/s_fma.c
446cf2
@@ -41,8 +41,8 @@ __fma_fma4 (double x, double y, double z)
446cf2
 }
446cf2
 
446cf2
 
446cf2
-libm_ifunc (__fma, HAS_ARCH_FEATURE (FMA_Usable)
446cf2
-	    ? __fma_fma3 : (HAS_ARCH_FEATURE (FMA4_Usable)
446cf2
+libm_ifunc (__fma, CPU_FEATURE_USABLE (FMA)
446cf2
+	    ? __fma_fma3 : (CPU_FEATURE_USABLE (FMA4)
446cf2
 			    ? __fma_fma4 : __fma_sse2));
446cf2
 libm_alias_double (__fma, fma)
446cf2
 
446cf2
diff --git a/sysdeps/x86_64/fpu/multiarch/s_fmaf.c b/sysdeps/x86_64/fpu/multiarch/s_fmaf.c
446cf2
index 5f4c2ec0be15c2dc..33e64ef8d1a03269 100644
446cf2
--- a/sysdeps/x86_64/fpu/multiarch/s_fmaf.c
446cf2
+++ b/sysdeps/x86_64/fpu/multiarch/s_fmaf.c
446cf2
@@ -40,8 +40,8 @@ __fmaf_fma4 (float x, float y, float z)
446cf2
 }
446cf2
 
446cf2
 
446cf2
-libm_ifunc (__fmaf, HAS_ARCH_FEATURE (FMA_Usable)
446cf2
-	    ? __fmaf_fma3 : (HAS_ARCH_FEATURE (FMA4_Usable)
446cf2
+libm_ifunc (__fmaf, CPU_FEATURE_USABLE (FMA)
446cf2
+	    ? __fmaf_fma3 : (CPU_FEATURE_USABLE (FMA4)
446cf2
 			     ? __fmaf_fma4 : __fmaf_sse2));
446cf2
 libm_alias_float (__fma, fma)
446cf2
 
446cf2
diff --git a/sysdeps/x86_64/multiarch/ifunc-avx2.h b/sysdeps/x86_64/multiarch/ifunc-avx2.h
446cf2
index 9cab837642b7af21..5c88640a2d901ec6 100644
446cf2
--- a/sysdeps/x86_64/multiarch/ifunc-avx2.h
446cf2
+++ b/sysdeps/x86_64/multiarch/ifunc-avx2.h
446cf2
@@ -28,7 +28,7 @@ IFUNC_SELECTOR (void)
446cf2
   const struct cpu_features* cpu_features = __get_cpu_features ();
446cf2
 
446cf2
   if (!CPU_FEATURES_ARCH_P (cpu_features, Prefer_No_VZEROUPPER)
446cf2
-      && CPU_FEATURES_ARCH_P (cpu_features, AVX2_Usable)
446cf2
+      && CPU_FEATURE_USABLE_P (cpu_features, AVX2)
446cf2
       && CPU_FEATURES_ARCH_P (cpu_features, AVX_Fast_Unaligned_Load))
446cf2
     return OPTIMIZE (avx2);
446cf2
 
446cf2
diff --git a/sysdeps/x86_64/multiarch/ifunc-impl-list.c b/sysdeps/x86_64/multiarch/ifunc-impl-list.c
446cf2
index 8b55bb6954000cc2..fe13505ca1ac7ef0 100644
446cf2
--- a/sysdeps/x86_64/multiarch/ifunc-impl-list.c
446cf2
+++ b/sysdeps/x86_64/multiarch/ifunc-impl-list.c
446cf2
@@ -41,19 +41,19 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array,
446cf2
   /* Support sysdeps/x86_64/multiarch/memchr.c.  */
446cf2
   IFUNC_IMPL (i, name, memchr,
446cf2
 	      IFUNC_IMPL_ADD (array, i, memchr,
446cf2
-			      HAS_ARCH_FEATURE (AVX2_Usable),
446cf2
+			      CPU_FEATURE_USABLE (AVX2),
446cf2
 			      __memchr_avx2)
446cf2
 	      IFUNC_IMPL_ADD (array, i, memchr, 1, __memchr_sse2))
446cf2
 
446cf2
   /* Support sysdeps/x86_64/multiarch/memcmp.c.  */
446cf2
   IFUNC_IMPL (i, name, memcmp,
446cf2
 	      IFUNC_IMPL_ADD (array, i, memcmp,
446cf2
-			      (HAS_ARCH_FEATURE (AVX2_Usable)
446cf2
-			       && HAS_CPU_FEATURE (MOVBE)),
446cf2
+			      (CPU_FEATURE_USABLE (AVX2)
446cf2
+			       && CPU_FEATURE_USABLE (MOVBE)),
446cf2
 			      __memcmp_avx2_movbe)
446cf2
-	      IFUNC_IMPL_ADD (array, i, memcmp, HAS_CPU_FEATURE (SSE4_1),
446cf2
+	      IFUNC_IMPL_ADD (array, i, memcmp, CPU_FEATURE_USABLE (SSE4_1),
446cf2
 			      __memcmp_sse4_1)
446cf2
-	      IFUNC_IMPL_ADD (array, i, memcmp, HAS_CPU_FEATURE (SSSE3),
446cf2
+	      IFUNC_IMPL_ADD (array, i, memcmp, CPU_FEATURE_USABLE (SSSE3),
446cf2
 			      __memcmp_ssse3)
446cf2
 	      IFUNC_IMPL_ADD (array, i, memcmp, 1, __memcmp_sse2))
446cf2
 
446cf2
@@ -61,25 +61,25 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array,
446cf2
   /* Support sysdeps/x86_64/multiarch/memmove_chk.c.  */
446cf2
   IFUNC_IMPL (i, name, __memmove_chk,
446cf2
 	      IFUNC_IMPL_ADD (array, i, __memmove_chk,
446cf2
-			      HAS_ARCH_FEATURE (AVX512F_Usable),
446cf2
+			      CPU_FEATURE_USABLE (AVX512F),
446cf2
 			      __memmove_chk_avx512_no_vzeroupper)
446cf2
 	      IFUNC_IMPL_ADD (array, i, __memmove_chk,
446cf2
-			      HAS_ARCH_FEATURE (AVX512F_Usable),
446cf2
+			      CPU_FEATURE_USABLE (AVX512F),
446cf2
 			      __memmove_chk_avx512_unaligned)
446cf2
 	      IFUNC_IMPL_ADD (array, i, __memmove_chk,
446cf2
-			      HAS_ARCH_FEATURE (AVX512F_Usable),
446cf2
+			      CPU_FEATURE_USABLE (AVX512F),
446cf2
 			      __memmove_chk_avx512_unaligned_erms)
446cf2
 	      IFUNC_IMPL_ADD (array, i, __memmove_chk,
446cf2
-			      HAS_ARCH_FEATURE (AVX_Usable),
446cf2
+			      CPU_FEATURE_USABLE (AVX),
446cf2
 			      __memmove_chk_avx_unaligned)
446cf2
 	      IFUNC_IMPL_ADD (array, i, __memmove_chk,
446cf2
-			      HAS_ARCH_FEATURE (AVX_Usable),
446cf2
+			      CPU_FEATURE_USABLE (AVX),
446cf2
 			      __memmove_chk_avx_unaligned_erms)
446cf2
 	      IFUNC_IMPL_ADD (array, i, __memmove_chk,
446cf2
-			      HAS_CPU_FEATURE (SSSE3),
446cf2
+			      CPU_FEATURE_USABLE (SSSE3),
446cf2
 			      __memmove_chk_ssse3_back)
446cf2
 	      IFUNC_IMPL_ADD (array, i, __memmove_chk,
446cf2
-			      HAS_CPU_FEATURE (SSSE3),
446cf2
+			      CPU_FEATURE_USABLE (SSSE3),
446cf2
 			      __memmove_chk_ssse3)
446cf2
 	      IFUNC_IMPL_ADD (array, i, __memmove_chk, 1,
446cf2
 			      __memmove_chk_sse2_unaligned)
446cf2
@@ -92,23 +92,23 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array,
446cf2
   /* Support sysdeps/x86_64/multiarch/memmove.c.  */
446cf2
   IFUNC_IMPL (i, name, memmove,
446cf2
 	      IFUNC_IMPL_ADD (array, i, memmove,
446cf2
-			      HAS_ARCH_FEATURE (AVX_Usable),
446cf2
+			      CPU_FEATURE_USABLE (AVX),
446cf2
 			      __memmove_avx_unaligned)
446cf2
 	      IFUNC_IMPL_ADD (array, i, memmove,
446cf2
-			      HAS_ARCH_FEATURE (AVX_Usable),
446cf2
+			      CPU_FEATURE_USABLE (AVX),
446cf2
 			      __memmove_avx_unaligned_erms)
446cf2
 	      IFUNC_IMPL_ADD (array, i, memmove,
446cf2
-			      HAS_ARCH_FEATURE (AVX512F_Usable),
446cf2
+			      CPU_FEATURE_USABLE (AVX512F),
446cf2
 			      __memmove_avx512_no_vzeroupper)
446cf2
 	      IFUNC_IMPL_ADD (array, i, memmove,
446cf2
-			      HAS_ARCH_FEATURE (AVX512F_Usable),
446cf2
+			      CPU_FEATURE_USABLE (AVX512F),
446cf2
 			      __memmove_avx512_unaligned)
446cf2
 	      IFUNC_IMPL_ADD (array, i, memmove,
446cf2
-			      HAS_ARCH_FEATURE (AVX512F_Usable),
446cf2
+			      CPU_FEATURE_USABLE (AVX512F),
446cf2
 			      __memmove_avx512_unaligned_erms)
446cf2
-	      IFUNC_IMPL_ADD (array, i, memmove, HAS_CPU_FEATURE (SSSE3),
446cf2
+	      IFUNC_IMPL_ADD (array, i, memmove, CPU_FEATURE_USABLE (SSSE3),
446cf2
 			      __memmove_ssse3_back)
446cf2
-	      IFUNC_IMPL_ADD (array, i, memmove, HAS_CPU_FEATURE (SSSE3),
446cf2
+	      IFUNC_IMPL_ADD (array, i, memmove, CPU_FEATURE_USABLE (SSSE3),
446cf2
 			      __memmove_ssse3)
446cf2
 	      IFUNC_IMPL_ADD (array, i, memmove, 1, __memmove_erms)
446cf2
 	      IFUNC_IMPL_ADD (array, i, memmove, 1,
446cf2
@@ -119,7 +119,7 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array,
446cf2
   /* Support sysdeps/x86_64/multiarch/memrchr.c.  */
446cf2
   IFUNC_IMPL (i, name, memrchr,
446cf2
 	      IFUNC_IMPL_ADD (array, i, memrchr,
446cf2
-			      HAS_ARCH_FEATURE (AVX2_Usable),
446cf2
+			      CPU_FEATURE_USABLE (AVX2),
446cf2
 			      __memrchr_avx2)
446cf2
 	      IFUNC_IMPL_ADD (array, i, memrchr, 1, __memrchr_sse2))
446cf2
 
446cf2
@@ -133,19 +133,19 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array,
446cf2
 	      IFUNC_IMPL_ADD (array, i, __memset_chk, 1,
446cf2
 			      __memset_chk_sse2_unaligned_erms)
446cf2
 	      IFUNC_IMPL_ADD (array, i, __memset_chk,
446cf2
-			      HAS_ARCH_FEATURE (AVX2_Usable),
446cf2
+			      CPU_FEATURE_USABLE (AVX2),
446cf2
 			      __memset_chk_avx2_unaligned)
446cf2
 	      IFUNC_IMPL_ADD (array, i, __memset_chk,
446cf2
-			      HAS_ARCH_FEATURE (AVX2_Usable),
446cf2
+			      CPU_FEATURE_USABLE (AVX2),
446cf2
 			      __memset_chk_avx2_unaligned_erms)
446cf2
 	      IFUNC_IMPL_ADD (array, i, __memset_chk,
446cf2
-			      HAS_ARCH_FEATURE (AVX512F_Usable),
446cf2
+			      CPU_FEATURE_USABLE (AVX512F),
446cf2
 			      __memset_chk_avx512_unaligned_erms)
446cf2
 	      IFUNC_IMPL_ADD (array, i, __memset_chk,
446cf2
-			      HAS_ARCH_FEATURE (AVX512F_Usable),
446cf2
+			      CPU_FEATURE_USABLE (AVX512F),
446cf2
 			      __memset_chk_avx512_unaligned)
446cf2
 	      IFUNC_IMPL_ADD (array, i, __memset_chk,
446cf2
-			      HAS_ARCH_FEATURE (AVX512F_Usable),
446cf2
+			      CPU_FEATURE_USABLE (AVX512F),
446cf2
 			      __memset_chk_avx512_no_vzeroupper)
446cf2
 	      )
446cf2
 #endif
446cf2
@@ -158,48 +158,48 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array,
446cf2
 			      __memset_sse2_unaligned_erms)
446cf2
 	      IFUNC_IMPL_ADD (array, i, memset, 1, __memset_erms)
446cf2
 	      IFUNC_IMPL_ADD (array, i, memset,
446cf2
-			      HAS_ARCH_FEATURE (AVX2_Usable),
446cf2
+			      CPU_FEATURE_USABLE (AVX2),
446cf2
 			      __memset_avx2_unaligned)
446cf2
 	      IFUNC_IMPL_ADD (array, i, memset,
446cf2
-			      HAS_ARCH_FEATURE (AVX2_Usable),
446cf2
+			      CPU_FEATURE_USABLE (AVX2),
446cf2
 			      __memset_avx2_unaligned_erms)
446cf2
 	      IFUNC_IMPL_ADD (array, i, memset,
446cf2
-			      HAS_ARCH_FEATURE (AVX512F_Usable),
446cf2
+			      CPU_FEATURE_USABLE (AVX512F),
446cf2
 			      __memset_avx512_unaligned_erms)
446cf2
 	      IFUNC_IMPL_ADD (array, i, memset,
446cf2
-			      HAS_ARCH_FEATURE (AVX512F_Usable),
446cf2
+			      CPU_FEATURE_USABLE (AVX512F),
446cf2
 			      __memset_avx512_unaligned)
446cf2
 	      IFUNC_IMPL_ADD (array, i, memset,
446cf2
-			      HAS_ARCH_FEATURE (AVX512F_Usable),
446cf2
+			      CPU_FEATURE_USABLE (AVX512F),
446cf2
 			      __memset_avx512_no_vzeroupper)
446cf2
 	     )
446cf2
 
446cf2
   /* Support sysdeps/x86_64/multiarch/rawmemchr.c.  */
446cf2
   IFUNC_IMPL (i, name, rawmemchr,
446cf2
 	      IFUNC_IMPL_ADD (array, i, rawmemchr,
446cf2
-			      HAS_ARCH_FEATURE (AVX2_Usable),
446cf2
+			      CPU_FEATURE_USABLE (AVX2),
446cf2
 			      __rawmemchr_avx2)
446cf2
 	      IFUNC_IMPL_ADD (array, i, rawmemchr, 1, __rawmemchr_sse2))
446cf2
 
446cf2
   /* Support sysdeps/x86_64/multiarch/strlen.c.  */
446cf2
   IFUNC_IMPL (i, name, strlen,
446cf2
 	      IFUNC_IMPL_ADD (array, i, strlen,
446cf2
-			      HAS_ARCH_FEATURE (AVX2_Usable),
446cf2
+			      CPU_FEATURE_USABLE (AVX2),
446cf2
 			      __strlen_avx2)
446cf2
 	      IFUNC_IMPL_ADD (array, i, strlen, 1, __strlen_sse2))
446cf2
 
446cf2
   /* Support sysdeps/x86_64/multiarch/strnlen.c.  */
446cf2
   IFUNC_IMPL (i, name, strnlen,
446cf2
 	      IFUNC_IMPL_ADD (array, i, strnlen,
446cf2
-			      HAS_ARCH_FEATURE (AVX2_Usable),
446cf2
+			      CPU_FEATURE_USABLE (AVX2),
446cf2
 			      __strnlen_avx2)
446cf2
 	      IFUNC_IMPL_ADD (array, i, strnlen, 1, __strnlen_sse2))
446cf2
 
446cf2
   /* Support sysdeps/x86_64/multiarch/stpncpy.c.  */
446cf2
   IFUNC_IMPL (i, name, stpncpy,
446cf2
-	      IFUNC_IMPL_ADD (array, i, stpncpy, HAS_CPU_FEATURE (SSSE3),
446cf2
+	      IFUNC_IMPL_ADD (array, i, stpncpy, CPU_FEATURE_USABLE (SSSE3),
446cf2
 			      __stpncpy_ssse3)
446cf2
-	      IFUNC_IMPL_ADD (array, i, stpncpy, HAS_ARCH_FEATURE (AVX2_Usable),
446cf2
+	      IFUNC_IMPL_ADD (array, i, stpncpy, CPU_FEATURE_USABLE (AVX2),
446cf2
 			      __stpncpy_avx2)
446cf2
 	      IFUNC_IMPL_ADD (array, i, stpncpy, 1,
446cf2
 			      __stpncpy_sse2_unaligned)
446cf2
@@ -207,9 +207,9 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array,
446cf2
 
446cf2
   /* Support sysdeps/x86_64/multiarch/stpcpy.c.  */
446cf2
   IFUNC_IMPL (i, name, stpcpy,
446cf2
-	      IFUNC_IMPL_ADD (array, i, stpcpy, HAS_CPU_FEATURE (SSSE3),
446cf2
+	      IFUNC_IMPL_ADD (array, i, stpcpy, CPU_FEATURE_USABLE (SSSE3),
446cf2
 			      __stpcpy_ssse3)
446cf2
-	      IFUNC_IMPL_ADD (array, i, stpcpy, HAS_ARCH_FEATURE (AVX2_Usable),
446cf2
+	      IFUNC_IMPL_ADD (array, i, stpcpy, CPU_FEATURE_USABLE (AVX2),
446cf2
 			      __stpcpy_avx2)
446cf2
 	      IFUNC_IMPL_ADD (array, i, stpcpy, 1, __stpcpy_sse2_unaligned)
446cf2
 	      IFUNC_IMPL_ADD (array, i, stpcpy, 1, __stpcpy_sse2))
446cf2
@@ -217,35 +217,35 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array,
446cf2
   /* Support sysdeps/x86_64/multiarch/strcasecmp_l.c.  */
446cf2
   IFUNC_IMPL (i, name, strcasecmp,
446cf2
 	      IFUNC_IMPL_ADD (array, i, strcasecmp,
446cf2
-			      HAS_ARCH_FEATURE (AVX_Usable),
446cf2
+			      CPU_FEATURE_USABLE (AVX),
446cf2
 			      __strcasecmp_avx)
446cf2
 	      IFUNC_IMPL_ADD (array, i, strcasecmp,
446cf2
-			      HAS_CPU_FEATURE (SSE4_2),
446cf2
+			      CPU_FEATURE_USABLE (SSE4_2),
446cf2
 			      __strcasecmp_sse42)
446cf2
 	      IFUNC_IMPL_ADD (array, i, strcasecmp,
446cf2
-			      HAS_CPU_FEATURE (SSSE3),
446cf2
+			      CPU_FEATURE_USABLE (SSSE3),
446cf2
 			      __strcasecmp_ssse3)
446cf2
 	      IFUNC_IMPL_ADD (array, i, strcasecmp, 1, __strcasecmp_sse2))
446cf2
 
446cf2
   /* Support sysdeps/x86_64/multiarch/strcasecmp_l.c.  */
446cf2
   IFUNC_IMPL (i, name, strcasecmp_l,
446cf2
 	      IFUNC_IMPL_ADD (array, i, strcasecmp_l,
446cf2
-			      HAS_ARCH_FEATURE (AVX_Usable),
446cf2
+			      CPU_FEATURE_USABLE (AVX),
446cf2
 			      __strcasecmp_l_avx)
446cf2
 	      IFUNC_IMPL_ADD (array, i, strcasecmp_l,
446cf2
-			      HAS_CPU_FEATURE (SSE4_2),
446cf2
+			      CPU_FEATURE_USABLE (SSE4_2),
446cf2
 			      __strcasecmp_l_sse42)
446cf2
 	      IFUNC_IMPL_ADD (array, i, strcasecmp_l,
446cf2
-			      HAS_CPU_FEATURE (SSSE3),
446cf2
+			      CPU_FEATURE_USABLE (SSSE3),
446cf2
 			      __strcasecmp_l_ssse3)
446cf2
 	      IFUNC_IMPL_ADD (array, i, strcasecmp_l, 1,
446cf2
 			      __strcasecmp_l_sse2))
446cf2
 
446cf2
   /* Support sysdeps/x86_64/multiarch/strcat.c.  */
446cf2
   IFUNC_IMPL (i, name, strcat,
446cf2
-	      IFUNC_IMPL_ADD (array, i, strcat, HAS_ARCH_FEATURE (AVX2_Usable),
446cf2
+	      IFUNC_IMPL_ADD (array, i, strcat, CPU_FEATURE_USABLE (AVX2),
446cf2
 			      __strcat_avx2)
446cf2
-	      IFUNC_IMPL_ADD (array, i, strcat, HAS_CPU_FEATURE (SSSE3),
446cf2
+	      IFUNC_IMPL_ADD (array, i, strcat, CPU_FEATURE_USABLE (SSSE3),
446cf2
 			      __strcat_ssse3)
446cf2
 	      IFUNC_IMPL_ADD (array, i, strcat, 1, __strcat_sse2_unaligned)
446cf2
 	      IFUNC_IMPL_ADD (array, i, strcat, 1, __strcat_sse2))
446cf2
@@ -253,7 +253,7 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array,
446cf2
   /* Support sysdeps/x86_64/multiarch/strchr.c.  */
446cf2
   IFUNC_IMPL (i, name, strchr,
446cf2
 	      IFUNC_IMPL_ADD (array, i, strchr,
446cf2
-			      HAS_ARCH_FEATURE (AVX2_Usable),
446cf2
+			      CPU_FEATURE_USABLE (AVX2),
446cf2
 			      __strchr_avx2)
446cf2
 	      IFUNC_IMPL_ADD (array, i, strchr, 1, __strchr_sse2_no_bsf)
446cf2
 	      IFUNC_IMPL_ADD (array, i, strchr, 1, __strchr_sse2))
446cf2
@@ -261,54 +261,54 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array,
446cf2
   /* Support sysdeps/x86_64/multiarch/strchrnul.c.  */
446cf2
   IFUNC_IMPL (i, name, strchrnul,
446cf2
 	      IFUNC_IMPL_ADD (array, i, strchrnul,
446cf2
-			      HAS_ARCH_FEATURE (AVX2_Usable),
446cf2
+			      CPU_FEATURE_USABLE (AVX2),
446cf2
 			      __strchrnul_avx2)
446cf2
 	      IFUNC_IMPL_ADD (array, i, strchrnul, 1, __strchrnul_sse2))
446cf2
 
446cf2
   /* Support sysdeps/x86_64/multiarch/strrchr.c.  */
446cf2
   IFUNC_IMPL (i, name, strrchr,
446cf2
 	      IFUNC_IMPL_ADD (array, i, strrchr,
446cf2
-			      HAS_ARCH_FEATURE (AVX2_Usable),
446cf2
+			      CPU_FEATURE_USABLE (AVX2),
446cf2
 			      __strrchr_avx2)
446cf2
 	      IFUNC_IMPL_ADD (array, i, strrchr, 1, __strrchr_sse2))
446cf2
 
446cf2
   /* Support sysdeps/x86_64/multiarch/strcmp.c.  */
446cf2
   IFUNC_IMPL (i, name, strcmp,
446cf2
 	      IFUNC_IMPL_ADD (array, i, strcmp,
446cf2
-			      HAS_ARCH_FEATURE (AVX2_Usable),
446cf2
+			      CPU_FEATURE_USABLE (AVX2),
446cf2
 			      __strcmp_avx2)
446cf2
-	      IFUNC_IMPL_ADD (array, i, strcmp, HAS_CPU_FEATURE (SSE4_2),
446cf2
+	      IFUNC_IMPL_ADD (array, i, strcmp, CPU_FEATURE_USABLE (SSE4_2),
446cf2
 			      __strcmp_sse42)
446cf2
-	      IFUNC_IMPL_ADD (array, i, strcmp, HAS_CPU_FEATURE (SSSE3),
446cf2
+	      IFUNC_IMPL_ADD (array, i, strcmp, CPU_FEATURE_USABLE (SSSE3),
446cf2
 			      __strcmp_ssse3)
446cf2
 	      IFUNC_IMPL_ADD (array, i, strcmp, 1, __strcmp_sse2_unaligned)
446cf2
 	      IFUNC_IMPL_ADD (array, i, strcmp, 1, __strcmp_sse2))
446cf2
 
446cf2
   /* Support sysdeps/x86_64/multiarch/strcpy.c.  */
446cf2
   IFUNC_IMPL (i, name, strcpy,
446cf2
-	      IFUNC_IMPL_ADD (array, i, strcpy, HAS_ARCH_FEATURE (AVX2_Usable),
446cf2
+	      IFUNC_IMPL_ADD (array, i, strcpy, CPU_FEATURE_USABLE (AVX2),
446cf2
 			      __strcpy_avx2)
446cf2
-	      IFUNC_IMPL_ADD (array, i, strcpy, HAS_CPU_FEATURE (SSSE3),
446cf2
+	      IFUNC_IMPL_ADD (array, i, strcpy, CPU_FEATURE_USABLE (SSSE3),
446cf2
 			      __strcpy_ssse3)
446cf2
 	      IFUNC_IMPL_ADD (array, i, strcpy, 1, __strcpy_sse2_unaligned)
446cf2
 	      IFUNC_IMPL_ADD (array, i, strcpy, 1, __strcpy_sse2))
446cf2
 
446cf2
   /* Support sysdeps/x86_64/multiarch/strcspn.c.  */
446cf2
   IFUNC_IMPL (i, name, strcspn,
446cf2
-	      IFUNC_IMPL_ADD (array, i, strcspn, HAS_CPU_FEATURE (SSE4_2),
446cf2
+	      IFUNC_IMPL_ADD (array, i, strcspn, CPU_FEATURE_USABLE (SSE4_2),
446cf2
 			      __strcspn_sse42)
446cf2
 	      IFUNC_IMPL_ADD (array, i, strcspn, 1, __strcspn_sse2))
446cf2
 
446cf2
   /* Support sysdeps/x86_64/multiarch/strncase_l.c.  */
446cf2
   IFUNC_IMPL (i, name, strncasecmp,
446cf2
 	      IFUNC_IMPL_ADD (array, i, strncasecmp,
446cf2
-			      HAS_ARCH_FEATURE (AVX_Usable),
446cf2
+			      CPU_FEATURE_USABLE (AVX),
446cf2
 			      __strncasecmp_avx)
446cf2
 	      IFUNC_IMPL_ADD (array, i, strncasecmp,
446cf2
-			      HAS_CPU_FEATURE (SSE4_2),
446cf2
+			      CPU_FEATURE_USABLE (SSE4_2),
446cf2
 			      __strncasecmp_sse42)
446cf2
 	      IFUNC_IMPL_ADD (array, i, strncasecmp,
446cf2
-			      HAS_CPU_FEATURE (SSSE3),
446cf2
+			      CPU_FEATURE_USABLE (SSSE3),
446cf2
 			      __strncasecmp_ssse3)
446cf2
 	      IFUNC_IMPL_ADD (array, i, strncasecmp, 1,
446cf2
 			      __strncasecmp_sse2))
446cf2
@@ -316,22 +316,22 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array,
446cf2
   /* Support sysdeps/x86_64/multiarch/strncase_l.c.  */
446cf2
   IFUNC_IMPL (i, name, strncasecmp_l,
446cf2
 	      IFUNC_IMPL_ADD (array, i, strncasecmp_l,
446cf2
-			      HAS_ARCH_FEATURE (AVX_Usable),
446cf2
+			      CPU_FEATURE_USABLE (AVX),
446cf2
 			      __strncasecmp_l_avx)
446cf2
 	      IFUNC_IMPL_ADD (array, i, strncasecmp_l,
446cf2
-			      HAS_CPU_FEATURE (SSE4_2),
446cf2
+			      CPU_FEATURE_USABLE (SSE4_2),
446cf2
 			      __strncasecmp_l_sse42)
446cf2
 	      IFUNC_IMPL_ADD (array, i, strncasecmp_l,
446cf2
-			      HAS_CPU_FEATURE (SSSE3),
446cf2
+			      CPU_FEATURE_USABLE (SSSE3),
446cf2
 			      __strncasecmp_l_ssse3)
446cf2
 	      IFUNC_IMPL_ADD (array, i, strncasecmp_l, 1,
446cf2
 			      __strncasecmp_l_sse2))
446cf2
 
446cf2
   /* Support sysdeps/x86_64/multiarch/strncat.c.  */
446cf2
   IFUNC_IMPL (i, name, strncat,
446cf2
-	      IFUNC_IMPL_ADD (array, i, strncat, HAS_ARCH_FEATURE (AVX2_Usable),
446cf2
+	      IFUNC_IMPL_ADD (array, i, strncat, CPU_FEATURE_USABLE (AVX2),
446cf2
 			      __strncat_avx2)
446cf2
-	      IFUNC_IMPL_ADD (array, i, strncat, HAS_CPU_FEATURE (SSSE3),
446cf2
+	      IFUNC_IMPL_ADD (array, i, strncat, CPU_FEATURE_USABLE (SSSE3),
446cf2
 			      __strncat_ssse3)
446cf2
 	      IFUNC_IMPL_ADD (array, i, strncat, 1,
446cf2
 			      __strncat_sse2_unaligned)
446cf2
@@ -339,9 +339,9 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array,
446cf2
 
446cf2
   /* Support sysdeps/x86_64/multiarch/strncpy.c.  */
446cf2
   IFUNC_IMPL (i, name, strncpy,
446cf2
-	      IFUNC_IMPL_ADD (array, i, strncpy, HAS_ARCH_FEATURE (AVX2_Usable),
446cf2
+	      IFUNC_IMPL_ADD (array, i, strncpy, CPU_FEATURE_USABLE (AVX2),
446cf2
 			      __strncpy_avx2)
446cf2
-	      IFUNC_IMPL_ADD (array, i, strncpy, HAS_CPU_FEATURE (SSSE3),
446cf2
+	      IFUNC_IMPL_ADD (array, i, strncpy, CPU_FEATURE_USABLE (SSSE3),
446cf2
 			      __strncpy_ssse3)
446cf2
 	      IFUNC_IMPL_ADD (array, i, strncpy, 1,
446cf2
 			      __strncpy_sse2_unaligned)
446cf2
@@ -349,14 +349,14 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array,
446cf2
 
446cf2
   /* Support sysdeps/x86_64/multiarch/strpbrk.c.  */
446cf2
   IFUNC_IMPL (i, name, strpbrk,
446cf2
-	      IFUNC_IMPL_ADD (array, i, strpbrk, HAS_CPU_FEATURE (SSE4_2),
446cf2
+	      IFUNC_IMPL_ADD (array, i, strpbrk, CPU_FEATURE_USABLE (SSE4_2),
446cf2
 			      __strpbrk_sse42)
446cf2
 	      IFUNC_IMPL_ADD (array, i, strpbrk, 1, __strpbrk_sse2))
446cf2
 
446cf2
 
446cf2
   /* Support sysdeps/x86_64/multiarch/strspn.c.  */
446cf2
   IFUNC_IMPL (i, name, strspn,
446cf2
-	      IFUNC_IMPL_ADD (array, i, strspn, HAS_CPU_FEATURE (SSE4_2),
446cf2
+	      IFUNC_IMPL_ADD (array, i, strspn, CPU_FEATURE_USABLE (SSE4_2),
446cf2
 			      __strspn_sse42)
446cf2
 	      IFUNC_IMPL_ADD (array, i, strspn, 1, __strspn_sse2))
446cf2
 
446cf2
@@ -368,70 +368,70 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array,
446cf2
   /* Support sysdeps/x86_64/multiarch/wcschr.c.  */
446cf2
   IFUNC_IMPL (i, name, wcschr,
446cf2
 	      IFUNC_IMPL_ADD (array, i, wcschr,
446cf2
-			      HAS_ARCH_FEATURE (AVX2_Usable),
446cf2
+			      CPU_FEATURE_USABLE (AVX2),
446cf2
 			      __wcschr_avx2)
446cf2
 	      IFUNC_IMPL_ADD (array, i, wcschr, 1, __wcschr_sse2))
446cf2
 
446cf2
   /* Support sysdeps/x86_64/multiarch/wcsrchr.c.  */
446cf2
   IFUNC_IMPL (i, name, wcsrchr,
446cf2
 	      IFUNC_IMPL_ADD (array, i, wcsrchr,
446cf2
-			      HAS_ARCH_FEATURE (AVX2_Usable),
446cf2
+			      CPU_FEATURE_USABLE (AVX2),
446cf2
 			      __wcsrchr_avx2)
446cf2
 	      IFUNC_IMPL_ADD (array, i, wcsrchr, 1, __wcsrchr_sse2))
446cf2
 
446cf2
   /* Support sysdeps/x86_64/multiarch/wcscmp.c.  */
446cf2
   IFUNC_IMPL (i, name, wcscmp,
446cf2
 	      IFUNC_IMPL_ADD (array, i, wcscmp,
446cf2
-			      HAS_ARCH_FEATURE (AVX2_Usable),
446cf2
+			      CPU_FEATURE_USABLE (AVX2),
446cf2
 			      __wcscmp_avx2)
446cf2
 	      IFUNC_IMPL_ADD (array, i, wcscmp, 1, __wcscmp_sse2))
446cf2
 
446cf2
   /* Support sysdeps/x86_64/multiarch/wcsncmp.c.  */
446cf2
   IFUNC_IMPL (i, name, wcsncmp,
446cf2
 	      IFUNC_IMPL_ADD (array, i, wcsncmp,
446cf2
-			      HAS_ARCH_FEATURE (AVX2_Usable),
446cf2
+			      CPU_FEATURE_USABLE (AVX2),
446cf2
 			      __wcsncmp_avx2)
446cf2
 	      IFUNC_IMPL_ADD (array, i, wcsncmp, 1, __wcsncmp_sse2))
446cf2
 
446cf2
   /* Support sysdeps/x86_64/multiarch/wcscpy.c.  */
446cf2
   IFUNC_IMPL (i, name, wcscpy,
446cf2
-	      IFUNC_IMPL_ADD (array, i, wcscpy, HAS_CPU_FEATURE (SSSE3),
446cf2
+	      IFUNC_IMPL_ADD (array, i, wcscpy, CPU_FEATURE_USABLE (SSSE3),
446cf2
 			      __wcscpy_ssse3)
446cf2
 	      IFUNC_IMPL_ADD (array, i, wcscpy, 1, __wcscpy_sse2))
446cf2
 
446cf2
   /* Support sysdeps/x86_64/multiarch/wcslen.c.  */
446cf2
   IFUNC_IMPL (i, name, wcslen,
446cf2
 	      IFUNC_IMPL_ADD (array, i, wcslen,
446cf2
-			      HAS_ARCH_FEATURE (AVX2_Usable),
446cf2
+			      CPU_FEATURE_USABLE (AVX2),
446cf2
 			      __wcslen_avx2)
446cf2
 	      IFUNC_IMPL_ADD (array, i, wcslen, 1, __wcslen_sse2))
446cf2
 
446cf2
   /* Support sysdeps/x86_64/multiarch/wcsnlen.c.  */
446cf2
   IFUNC_IMPL (i, name, wcsnlen,
446cf2
 	      IFUNC_IMPL_ADD (array, i, wcsnlen,
446cf2
-			      HAS_ARCH_FEATURE (AVX2_Usable),
446cf2
+			      CPU_FEATURE_USABLE (AVX2),
446cf2
 			      __wcsnlen_avx2)
446cf2
 	      IFUNC_IMPL_ADD (array, i, wcsnlen,
446cf2
-			      HAS_CPU_FEATURE (SSE4_1),
446cf2
+			      CPU_FEATURE_USABLE (SSE4_1),
446cf2
 			      __wcsnlen_sse4_1)
446cf2
 	      IFUNC_IMPL_ADD (array, i, wcsnlen, 1, __wcsnlen_sse2))
446cf2
 
446cf2
   /* Support sysdeps/x86_64/multiarch/wmemchr.c.  */
446cf2
   IFUNC_IMPL (i, name, wmemchr,
446cf2
 	      IFUNC_IMPL_ADD (array, i, wmemchr,
446cf2
-			      HAS_ARCH_FEATURE (AVX2_Usable),
446cf2
+			      CPU_FEATURE_USABLE (AVX2),
446cf2
 			      __wmemchr_avx2)
446cf2
 	      IFUNC_IMPL_ADD (array, i, wmemchr, 1, __wmemchr_sse2))
446cf2
 
446cf2
   /* Support sysdeps/x86_64/multiarch/wmemcmp.c.  */
446cf2
   IFUNC_IMPL (i, name, wmemcmp,
446cf2
 	      IFUNC_IMPL_ADD (array, i, wmemcmp,
446cf2
-			      (HAS_ARCH_FEATURE (AVX2_Usable)
446cf2
-			       && HAS_CPU_FEATURE (MOVBE)),
446cf2
+			      (CPU_FEATURE_USABLE (AVX2)
446cf2
+			       && CPU_FEATURE_USABLE (MOVBE)),
446cf2
 			      __wmemcmp_avx2_movbe)
446cf2
-	      IFUNC_IMPL_ADD (array, i, wmemcmp, HAS_CPU_FEATURE (SSE4_1),
446cf2
+	      IFUNC_IMPL_ADD (array, i, wmemcmp, CPU_FEATURE_USABLE (SSE4_1),
446cf2
 			      __wmemcmp_sse4_1)
446cf2
-	      IFUNC_IMPL_ADD (array, i, wmemcmp, HAS_CPU_FEATURE (SSSE3),
446cf2
+	      IFUNC_IMPL_ADD (array, i, wmemcmp, CPU_FEATURE_USABLE (SSSE3),
446cf2
 			      __wmemcmp_ssse3)
446cf2
 	      IFUNC_IMPL_ADD (array, i, wmemcmp, 1, __wmemcmp_sse2))
446cf2
 
446cf2
@@ -440,35 +440,35 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array,
446cf2
 	      IFUNC_IMPL_ADD (array, i, wmemset, 1,
446cf2
 			      __wmemset_sse2_unaligned)
446cf2
 	      IFUNC_IMPL_ADD (array, i, wmemset,
446cf2
-			      HAS_ARCH_FEATURE (AVX2_Usable),
446cf2
+			      CPU_FEATURE_USABLE (AVX2),
446cf2
 			      __wmemset_avx2_unaligned)
446cf2
 	      IFUNC_IMPL_ADD (array, i, wmemset,
446cf2
-			      HAS_ARCH_FEATURE (AVX512F_Usable),
446cf2
+			      CPU_FEATURE_USABLE (AVX512F),
446cf2
 			      __wmemset_avx512_unaligned))
446cf2
 
446cf2
 #ifdef SHARED
446cf2
   /* Support sysdeps/x86_64/multiarch/memcpy_chk.c.  */
446cf2
   IFUNC_IMPL (i, name, __memcpy_chk,
446cf2
 	      IFUNC_IMPL_ADD (array, i, __memcpy_chk,
446cf2
-			      HAS_ARCH_FEATURE (AVX512F_Usable),
446cf2
+			      CPU_FEATURE_USABLE (AVX512F),
446cf2
 			      __memcpy_chk_avx512_no_vzeroupper)
446cf2
 	      IFUNC_IMPL_ADD (array, i, __memcpy_chk,
446cf2
-			      HAS_ARCH_FEATURE (AVX512F_Usable),
446cf2
+			      CPU_FEATURE_USABLE (AVX512F),
446cf2
 			      __memcpy_chk_avx512_unaligned)
446cf2
 	      IFUNC_IMPL_ADD (array, i, __memcpy_chk,
446cf2
-			      HAS_ARCH_FEATURE (AVX512F_Usable),
446cf2
+			      CPU_FEATURE_USABLE (AVX512F),
446cf2
 			      __memcpy_chk_avx512_unaligned_erms)
446cf2
 	      IFUNC_IMPL_ADD (array, i, __memcpy_chk,
446cf2
-			      HAS_ARCH_FEATURE (AVX_Usable),
446cf2
+			      CPU_FEATURE_USABLE (AVX),
446cf2
 			      __memcpy_chk_avx_unaligned)
446cf2
 	      IFUNC_IMPL_ADD (array, i, __memcpy_chk,
446cf2
-			      HAS_ARCH_FEATURE (AVX_Usable),
446cf2
+			      CPU_FEATURE_USABLE (AVX),
446cf2
 			      __memcpy_chk_avx_unaligned_erms)
446cf2
 	      IFUNC_IMPL_ADD (array, i, __memcpy_chk,
446cf2
-			      HAS_CPU_FEATURE (SSSE3),
446cf2
+			      CPU_FEATURE_USABLE (SSSE3),
446cf2
 			      __memcpy_chk_ssse3_back)
446cf2
 	      IFUNC_IMPL_ADD (array, i, __memcpy_chk,
446cf2
-			      HAS_CPU_FEATURE (SSSE3),
446cf2
+			      CPU_FEATURE_USABLE (SSSE3),
446cf2
 			      __memcpy_chk_ssse3)
446cf2
 	      IFUNC_IMPL_ADD (array, i, __memcpy_chk, 1,
446cf2
 			      __memcpy_chk_sse2_unaligned)
446cf2
@@ -481,23 +481,23 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array,
446cf2
   /* Support sysdeps/x86_64/multiarch/memcpy.c.  */
446cf2
   IFUNC_IMPL (i, name, memcpy,
446cf2
 	      IFUNC_IMPL_ADD (array, i, memcpy,
446cf2
-			      HAS_ARCH_FEATURE (AVX_Usable),
446cf2
+			      CPU_FEATURE_USABLE (AVX),
446cf2
 			      __memcpy_avx_unaligned)
446cf2
 	      IFUNC_IMPL_ADD (array, i, memcpy,
446cf2
-			      HAS_ARCH_FEATURE (AVX_Usable),
446cf2
+			      CPU_FEATURE_USABLE (AVX),
446cf2
 			      __memcpy_avx_unaligned_erms)
446cf2
-	      IFUNC_IMPL_ADD (array, i, memcpy, HAS_CPU_FEATURE (SSSE3),
446cf2
+	      IFUNC_IMPL_ADD (array, i, memcpy, CPU_FEATURE_USABLE (SSSE3),
446cf2
 			      __memcpy_ssse3_back)
446cf2
-	      IFUNC_IMPL_ADD (array, i, memcpy, HAS_CPU_FEATURE (SSSE3),
446cf2
+	      IFUNC_IMPL_ADD (array, i, memcpy, CPU_FEATURE_USABLE (SSSE3),
446cf2
 			      __memcpy_ssse3)
446cf2
 	      IFUNC_IMPL_ADD (array, i, memcpy,
446cf2
-			      HAS_ARCH_FEATURE (AVX512F_Usable),
446cf2
+			      CPU_FEATURE_USABLE (AVX512F),
446cf2
 			      __memcpy_avx512_no_vzeroupper)
446cf2
 	      IFUNC_IMPL_ADD (array, i, memcpy,
446cf2
-			      HAS_ARCH_FEATURE (AVX512F_Usable),
446cf2
+			      CPU_FEATURE_USABLE (AVX512F),
446cf2
 			      __memcpy_avx512_unaligned)
446cf2
 	      IFUNC_IMPL_ADD (array, i, memcpy,
446cf2
-			      HAS_ARCH_FEATURE (AVX512F_Usable),
446cf2
+			      CPU_FEATURE_USABLE (AVX512F),
446cf2
 			      __memcpy_avx512_unaligned_erms)
446cf2
 	      IFUNC_IMPL_ADD (array, i, memcpy, 1, __memcpy_sse2_unaligned)
446cf2
 	      IFUNC_IMPL_ADD (array, i, memcpy, 1,
446cf2
@@ -508,25 +508,25 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array,
446cf2
   /* Support sysdeps/x86_64/multiarch/mempcpy_chk.c.  */
446cf2
   IFUNC_IMPL (i, name, __mempcpy_chk,
446cf2
 	      IFUNC_IMPL_ADD (array, i, __mempcpy_chk,
446cf2
-			      HAS_ARCH_FEATURE (AVX512F_Usable),
446cf2
+			      CPU_FEATURE_USABLE (AVX512F),
446cf2
 			      __mempcpy_chk_avx512_no_vzeroupper)
446cf2
 	      IFUNC_IMPL_ADD (array, i, __mempcpy_chk,
446cf2
-			      HAS_ARCH_FEATURE (AVX512F_Usable),
446cf2
+			      CPU_FEATURE_USABLE (AVX512F),
446cf2
 			      __mempcpy_chk_avx512_unaligned)
446cf2
 	      IFUNC_IMPL_ADD (array, i, __mempcpy_chk,
446cf2
-			      HAS_ARCH_FEATURE (AVX512F_Usable),
446cf2
+			      CPU_FEATURE_USABLE (AVX512F),
446cf2
 			      __mempcpy_chk_avx512_unaligned_erms)
446cf2
 	      IFUNC_IMPL_ADD (array, i, __mempcpy_chk,
446cf2
-			      HAS_ARCH_FEATURE (AVX_Usable),
446cf2
+			      CPU_FEATURE_USABLE (AVX),
446cf2
 			      __mempcpy_chk_avx_unaligned)
446cf2
 	      IFUNC_IMPL_ADD (array, i, __mempcpy_chk,
446cf2
-			      HAS_ARCH_FEATURE (AVX_Usable),
446cf2
+			      CPU_FEATURE_USABLE (AVX),
446cf2
 			      __mempcpy_chk_avx_unaligned_erms)
446cf2
 	      IFUNC_IMPL_ADD (array, i, __mempcpy_chk,
446cf2
-			      HAS_CPU_FEATURE (SSSE3),
446cf2
+			      CPU_FEATURE_USABLE (SSSE3),
446cf2
 			      __mempcpy_chk_ssse3_back)
446cf2
 	      IFUNC_IMPL_ADD (array, i, __mempcpy_chk,
446cf2
-			      HAS_CPU_FEATURE (SSSE3),
446cf2
+			      CPU_FEATURE_USABLE (SSSE3),
446cf2
 			      __mempcpy_chk_ssse3)
446cf2
 	      IFUNC_IMPL_ADD (array, i, __mempcpy_chk, 1,
446cf2
 			      __mempcpy_chk_sse2_unaligned)
446cf2
@@ -539,23 +539,23 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array,
446cf2
   /* Support sysdeps/x86_64/multiarch/mempcpy.c.  */
446cf2
   IFUNC_IMPL (i, name, mempcpy,
446cf2
 	      IFUNC_IMPL_ADD (array, i, mempcpy,
446cf2
-			      HAS_ARCH_FEATURE (AVX512F_Usable),
446cf2
+			      CPU_FEATURE_USABLE (AVX512F),
446cf2
 			      __mempcpy_avx512_no_vzeroupper)
446cf2
 	      IFUNC_IMPL_ADD (array, i, mempcpy,
446cf2
-			      HAS_ARCH_FEATURE (AVX512F_Usable),
446cf2
+			      CPU_FEATURE_USABLE (AVX512F),
446cf2
 			      __mempcpy_avx512_unaligned)
446cf2
 	      IFUNC_IMPL_ADD (array, i, mempcpy,
446cf2
-			      HAS_ARCH_FEATURE (AVX512F_Usable),
446cf2
+			      CPU_FEATURE_USABLE (AVX512F),
446cf2
 			      __mempcpy_avx512_unaligned_erms)
446cf2
 	      IFUNC_IMPL_ADD (array, i, mempcpy,
446cf2
-			      HAS_ARCH_FEATURE (AVX_Usable),
446cf2
+			      CPU_FEATURE_USABLE (AVX),
446cf2
 			      __mempcpy_avx_unaligned)
446cf2
 	      IFUNC_IMPL_ADD (array, i, mempcpy,
446cf2
-			      HAS_ARCH_FEATURE (AVX_Usable),
446cf2
+			      CPU_FEATURE_USABLE (AVX),
446cf2
 			      __mempcpy_avx_unaligned_erms)
446cf2
-	      IFUNC_IMPL_ADD (array, i, mempcpy, HAS_CPU_FEATURE (SSSE3),
446cf2
+	      IFUNC_IMPL_ADD (array, i, mempcpy, CPU_FEATURE_USABLE (SSSE3),
446cf2
 			      __mempcpy_ssse3_back)
446cf2
-	      IFUNC_IMPL_ADD (array, i, mempcpy, HAS_CPU_FEATURE (SSSE3),
446cf2
+	      IFUNC_IMPL_ADD (array, i, mempcpy, CPU_FEATURE_USABLE (SSSE3),
446cf2
 			      __mempcpy_ssse3)
446cf2
 	      IFUNC_IMPL_ADD (array, i, mempcpy, 1,
446cf2
 			      __mempcpy_sse2_unaligned)
446cf2
@@ -566,11 +566,11 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array,
446cf2
   /* Support sysdeps/x86_64/multiarch/strncmp.c.  */
446cf2
   IFUNC_IMPL (i, name, strncmp,
446cf2
 	      IFUNC_IMPL_ADD (array, i, strncmp,
446cf2
-			      HAS_ARCH_FEATURE (AVX2_Usable),
446cf2
+			      CPU_FEATURE_USABLE (AVX2),
446cf2
 			      __strncmp_avx2)
446cf2
-	      IFUNC_IMPL_ADD (array, i, strncmp, HAS_CPU_FEATURE (SSE4_2),
446cf2
+	      IFUNC_IMPL_ADD (array, i, strncmp, CPU_FEATURE_USABLE (SSE4_2),
446cf2
 			      __strncmp_sse42)
446cf2
-	      IFUNC_IMPL_ADD (array, i, strncmp, HAS_CPU_FEATURE (SSSE3),
446cf2
+	      IFUNC_IMPL_ADD (array, i, strncmp, CPU_FEATURE_USABLE (SSSE3),
446cf2
 			      __strncmp_ssse3)
446cf2
 	      IFUNC_IMPL_ADD (array, i, strncmp, 1, __strncmp_sse2))
446cf2
 
446cf2
@@ -580,10 +580,10 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array,
446cf2
 	      IFUNC_IMPL_ADD (array, i, __wmemset_chk, 1,
446cf2
 			      __wmemset_chk_sse2_unaligned)
446cf2
 	      IFUNC_IMPL_ADD (array, i, __wmemset_chk,
446cf2
-			      HAS_ARCH_FEATURE (AVX2_Usable),
446cf2
+			      CPU_FEATURE_USABLE (AVX2),
446cf2
 			      __wmemset_chk_avx2_unaligned)
446cf2
 	      IFUNC_IMPL_ADD (array, i, __wmemset_chk,
446cf2
-			      HAS_ARCH_FEATURE (AVX512F_Usable),
446cf2
+			      CPU_FEATURE_USABLE (AVX512F),
446cf2
 			      __wmemset_chk_avx512_unaligned))
446cf2
 #endif
446cf2
 
446cf2
diff --git a/sysdeps/x86_64/multiarch/ifunc-memcmp.h b/sysdeps/x86_64/multiarch/ifunc-memcmp.h
446cf2
index bf5ab8eb7ffd0002..6c1f3153579d19c4 100644
446cf2
--- a/sysdeps/x86_64/multiarch/ifunc-memcmp.h
446cf2
+++ b/sysdeps/x86_64/multiarch/ifunc-memcmp.h
446cf2
@@ -30,15 +30,15 @@ IFUNC_SELECTOR (void)
446cf2
   const struct cpu_features* cpu_features = __get_cpu_features ();
446cf2
 
446cf2
   if (!CPU_FEATURES_ARCH_P (cpu_features, Prefer_No_VZEROUPPER)
446cf2
-      && CPU_FEATURES_ARCH_P (cpu_features, AVX2_Usable)
446cf2
-      && CPU_FEATURES_CPU_P (cpu_features, MOVBE)
446cf2
+      && CPU_FEATURE_USABLE_P (cpu_features, AVX2)
446cf2
+      && CPU_FEATURE_USABLE_P (cpu_features, MOVBE)
446cf2
       && CPU_FEATURES_ARCH_P (cpu_features, AVX_Fast_Unaligned_Load))
446cf2
     return OPTIMIZE (avx2_movbe);
446cf2
 
446cf2
-  if (CPU_FEATURES_CPU_P (cpu_features, SSE4_1))
446cf2
+  if (CPU_FEATURE_USABLE_P (cpu_features, SSE4_1))
446cf2
     return OPTIMIZE (sse4_1);
446cf2
 
446cf2
-  if (CPU_FEATURES_CPU_P (cpu_features, SSSE3))
446cf2
+  if (CPU_FEATURE_USABLE_P (cpu_features, SSSE3))
446cf2
     return OPTIMIZE (ssse3);
446cf2
 
446cf2
   return OPTIMIZE (sse2);
446cf2
diff --git a/sysdeps/x86_64/multiarch/ifunc-memmove.h b/sysdeps/x86_64/multiarch/ifunc-memmove.h
446cf2
index 5b1eb1c92c2f199b..5e5f02994531ec14 100644
446cf2
--- a/sysdeps/x86_64/multiarch/ifunc-memmove.h
446cf2
+++ b/sysdeps/x86_64/multiarch/ifunc-memmove.h
446cf2
@@ -45,13 +45,13 @@ IFUNC_SELECTOR (void)
446cf2
       || CPU_FEATURES_ARCH_P (cpu_features, Prefer_FSRM))
446cf2
     return OPTIMIZE (erms);
446cf2
 
446cf2
-  if (CPU_FEATURES_ARCH_P (cpu_features, AVX512F_Usable)
446cf2
+  if (CPU_FEATURE_USABLE_P (cpu_features, AVX512F)
446cf2
       && !CPU_FEATURES_ARCH_P (cpu_features, Prefer_No_AVX512))
446cf2
     {
446cf2
       if (CPU_FEATURES_ARCH_P (cpu_features, Prefer_No_VZEROUPPER))
446cf2
 	return OPTIMIZE (avx512_no_vzeroupper);
446cf2
 
446cf2
-      if (CPU_FEATURES_CPU_P (cpu_features, ERMS))
446cf2
+      if (CPU_FEATURE_USABLE_P (cpu_features, ERMS))
446cf2
 	return OPTIMIZE (avx512_unaligned_erms);
446cf2
 
446cf2
       return OPTIMIZE (avx512_unaligned);
446cf2
@@ -59,16 +59,16 @@ IFUNC_SELECTOR (void)
446cf2
 
446cf2
   if (CPU_FEATURES_ARCH_P (cpu_features, AVX_Fast_Unaligned_Load))
446cf2
     {
446cf2
-      if (CPU_FEATURES_CPU_P (cpu_features, ERMS))
446cf2
+      if (CPU_FEATURE_USABLE_P (cpu_features, ERMS))
446cf2
 	return OPTIMIZE (avx_unaligned_erms);
446cf2
 
446cf2
       return OPTIMIZE (avx_unaligned);
446cf2
     }
446cf2
 
446cf2
-  if (!CPU_FEATURES_CPU_P (cpu_features, SSSE3)
446cf2
+  if (!CPU_FEATURE_USABLE_P (cpu_features, SSSE3)
446cf2
       || CPU_FEATURES_ARCH_P (cpu_features, Fast_Unaligned_Copy))
446cf2
     {
446cf2
-      if (CPU_FEATURES_CPU_P (cpu_features, ERMS))
446cf2
+      if (CPU_FEATURE_USABLE_P (cpu_features, ERMS))
446cf2
 	return OPTIMIZE (sse2_unaligned_erms);
446cf2
 
446cf2
       return OPTIMIZE (sse2_unaligned);
446cf2
diff --git a/sysdeps/x86_64/multiarch/ifunc-memset.h b/sysdeps/x86_64/multiarch/ifunc-memset.h
446cf2
index 19b5ae676c2d5d53..708bd72e2c3d3963 100644
446cf2
--- a/sysdeps/x86_64/multiarch/ifunc-memset.h
446cf2
+++ b/sysdeps/x86_64/multiarch/ifunc-memset.h
446cf2
@@ -42,27 +42,27 @@ IFUNC_SELECTOR (void)
446cf2
   if (CPU_FEATURES_ARCH_P (cpu_features, Prefer_ERMS))
446cf2
     return OPTIMIZE (erms);
446cf2
 
446cf2
-  if (CPU_FEATURES_ARCH_P (cpu_features, AVX512F_Usable)
446cf2
+  if (CPU_FEATURE_USABLE_P (cpu_features, AVX512F)
446cf2
       && !CPU_FEATURES_ARCH_P (cpu_features, Prefer_No_AVX512))
446cf2
     {
446cf2
       if (CPU_FEATURES_ARCH_P (cpu_features, Prefer_No_VZEROUPPER))
446cf2
 	return OPTIMIZE (avx512_no_vzeroupper);
446cf2
 
446cf2
-      if (CPU_FEATURES_CPU_P (cpu_features, ERMS))
446cf2
+      if (CPU_FEATURE_USABLE_P (cpu_features, ERMS))
446cf2
 	return OPTIMIZE (avx512_unaligned_erms);
446cf2
 
446cf2
       return OPTIMIZE (avx512_unaligned);
446cf2
     }
446cf2
 
446cf2
-  if (CPU_FEATURES_ARCH_P (cpu_features, AVX2_Usable))
446cf2
+  if (CPU_FEATURE_USABLE_P (cpu_features, AVX2))
446cf2
     {
446cf2
-      if (CPU_FEATURES_CPU_P (cpu_features, ERMS))
446cf2
+      if (CPU_FEATURE_USABLE_P (cpu_features, ERMS))
446cf2
 	return OPTIMIZE (avx2_unaligned_erms);
446cf2
       else
446cf2
 	return OPTIMIZE (avx2_unaligned);
446cf2
     }
446cf2
 
446cf2
-  if (CPU_FEATURES_CPU_P (cpu_features, ERMS))
446cf2
+  if (CPU_FEATURE_USABLE_P (cpu_features, ERMS))
446cf2
     return OPTIMIZE (sse2_unaligned_erms);
446cf2
 
446cf2
   return OPTIMIZE (sse2_unaligned);
446cf2
diff --git a/sysdeps/x86_64/multiarch/ifunc-sse4_2.h b/sysdeps/x86_64/multiarch/ifunc-sse4_2.h
446cf2
index f2b791cccf12c425..73383f4b583b29c8 100644
446cf2
--- a/sysdeps/x86_64/multiarch/ifunc-sse4_2.h
446cf2
+++ b/sysdeps/x86_64/multiarch/ifunc-sse4_2.h
446cf2
@@ -27,7 +27,7 @@ IFUNC_SELECTOR (void)
446cf2
 {
446cf2
   const struct cpu_features* cpu_features = __get_cpu_features ();
446cf2
 
446cf2
-  if (CPU_FEATURES_CPU_P (cpu_features, SSE4_2))
446cf2
+  if (CPU_FEATURE_USABLE_P (cpu_features, SSE4_2))
446cf2
     return OPTIMIZE (sse42);
446cf2
 
446cf2
   return OPTIMIZE (sse2);
446cf2
diff --git a/sysdeps/x86_64/multiarch/ifunc-strcasecmp.h b/sysdeps/x86_64/multiarch/ifunc-strcasecmp.h
446cf2
index 1ca170b663a4e65c..6a4bb07849a11f51 100644
446cf2
--- a/sysdeps/x86_64/multiarch/ifunc-strcasecmp.h
446cf2
+++ b/sysdeps/x86_64/multiarch/ifunc-strcasecmp.h
446cf2
@@ -29,14 +29,14 @@ IFUNC_SELECTOR (void)
446cf2
 {
446cf2
   const struct cpu_features* cpu_features = __get_cpu_features ();
446cf2
 
446cf2
-  if (CPU_FEATURES_ARCH_P (cpu_features, AVX_Usable))
446cf2
+  if (CPU_FEATURE_USABLE_P (cpu_features, AVX))
446cf2
     return OPTIMIZE (avx);
446cf2
 
446cf2
-  if (CPU_FEATURES_CPU_P (cpu_features, SSE4_2)
446cf2
+  if (CPU_FEATURE_USABLE_P (cpu_features, SSE4_2)
446cf2
       && !CPU_FEATURES_ARCH_P (cpu_features, Slow_SSE4_2))
446cf2
     return OPTIMIZE (sse42);
446cf2
 
446cf2
-  if (CPU_FEATURES_CPU_P (cpu_features, SSSE3))
446cf2
+  if (CPU_FEATURE_USABLE_P (cpu_features, SSSE3))
446cf2
     return OPTIMIZE (ssse3);
446cf2
 
446cf2
   return OPTIMIZE (sse2);
446cf2
diff --git a/sysdeps/x86_64/multiarch/ifunc-strcpy.h b/sysdeps/x86_64/multiarch/ifunc-strcpy.h
446cf2
index 4f2286fefccda069..100dca5cde0ecac5 100644
446cf2
--- a/sysdeps/x86_64/multiarch/ifunc-strcpy.h
446cf2
+++ b/sysdeps/x86_64/multiarch/ifunc-strcpy.h
446cf2
@@ -32,14 +32,14 @@ IFUNC_SELECTOR (void)
446cf2
   const struct cpu_features* cpu_features = __get_cpu_features ();
446cf2
 
446cf2
   if (!CPU_FEATURES_ARCH_P (cpu_features, Prefer_No_VZEROUPPER)
446cf2
-      && CPU_FEATURES_ARCH_P (cpu_features, AVX2_Usable)
446cf2
+      && CPU_FEATURE_USABLE_P (cpu_features, AVX2)
446cf2
       && CPU_FEATURES_ARCH_P (cpu_features, AVX_Fast_Unaligned_Load))
446cf2
     return OPTIMIZE (avx2);
446cf2
 
446cf2
   if (CPU_FEATURES_ARCH_P (cpu_features, Fast_Unaligned_Load))
446cf2
     return OPTIMIZE (sse2_unaligned);
446cf2
 
446cf2
-  if (CPU_FEATURES_CPU_P (cpu_features, SSSE3))
446cf2
+  if (CPU_FEATURE_USABLE_P (cpu_features, SSSE3))
446cf2
     return OPTIMIZE (ssse3);
446cf2
 
446cf2
   return OPTIMIZE (sse2);
446cf2
diff --git a/sysdeps/x86_64/multiarch/ifunc-wmemset.h b/sysdeps/x86_64/multiarch/ifunc-wmemset.h
446cf2
index 2f1085f5fc483c70..eb2422104751b235 100644
446cf2
--- a/sysdeps/x86_64/multiarch/ifunc-wmemset.h
446cf2
+++ b/sysdeps/x86_64/multiarch/ifunc-wmemset.h
446cf2
@@ -28,10 +28,10 @@ IFUNC_SELECTOR (void)
446cf2
   const struct cpu_features* cpu_features = __get_cpu_features ();
446cf2
 
446cf2
   if (!CPU_FEATURES_ARCH_P (cpu_features, Prefer_No_VZEROUPPER)
446cf2
-      && CPU_FEATURES_ARCH_P (cpu_features, AVX2_Usable)
446cf2
+      && CPU_FEATURE_USABLE_P (cpu_features, AVX2)
446cf2
       && CPU_FEATURES_ARCH_P (cpu_features, AVX_Fast_Unaligned_Load))
446cf2
     {
446cf2
-      if (CPU_FEATURES_ARCH_P (cpu_features, AVX512F_Usable)
446cf2
+      if (CPU_FEATURE_USABLE_P (cpu_features, AVX512F)
446cf2
 	  && !CPU_FEATURES_ARCH_P (cpu_features, Prefer_No_AVX512))
446cf2
 	return OPTIMIZE (avx512_unaligned);
446cf2
       else
446cf2
diff --git a/sysdeps/x86_64/multiarch/sched_cpucount.c b/sysdeps/x86_64/multiarch/sched_cpucount.c
446cf2
index 7949119dcdb5a94b..b38ff37c6511ca1b 100644
446cf2
--- a/sysdeps/x86_64/multiarch/sched_cpucount.c
446cf2
+++ b/sysdeps/x86_64/multiarch/sched_cpucount.c
446cf2
@@ -33,4 +33,4 @@
446cf2
 #undef __sched_cpucount
446cf2
 
446cf2
 libc_ifunc (__sched_cpucount,
446cf2
-	    HAS_CPU_FEATURE (POPCNT) ? popcount_cpucount : generic_cpucount);
446cf2
+	    CPU_FEATURE_USABLE (POPCNT) ? popcount_cpucount : generic_cpucount);
446cf2
diff --git a/sysdeps/x86_64/multiarch/strchr.c b/sysdeps/x86_64/multiarch/strchr.c
446cf2
index 76d64fb378e9bbac..329547132c3a301b 100644
446cf2
--- a/sysdeps/x86_64/multiarch/strchr.c
446cf2
+++ b/sysdeps/x86_64/multiarch/strchr.c
446cf2
@@ -36,7 +36,7 @@ IFUNC_SELECTOR (void)
446cf2
   const struct cpu_features* cpu_features = __get_cpu_features ();
446cf2
 
446cf2
   if (!CPU_FEATURES_ARCH_P (cpu_features, Prefer_No_VZEROUPPER)
446cf2
-      && CPU_FEATURES_ARCH_P (cpu_features, AVX2_Usable)
446cf2
+      && CPU_FEATURE_USABLE_P (cpu_features, AVX2)
446cf2
       && CPU_FEATURES_ARCH_P (cpu_features, AVX_Fast_Unaligned_Load))
446cf2
     return OPTIMIZE (avx2);
446cf2
 
446cf2
diff --git a/sysdeps/x86_64/multiarch/strcmp.c b/sysdeps/x86_64/multiarch/strcmp.c
446cf2
index b903e418df151ec1..3f433fbccf9e7121 100644
446cf2
--- a/sysdeps/x86_64/multiarch/strcmp.c
446cf2
+++ b/sysdeps/x86_64/multiarch/strcmp.c
446cf2
@@ -37,14 +37,14 @@ IFUNC_SELECTOR (void)
446cf2
   const struct cpu_features* cpu_features = __get_cpu_features ();
446cf2
 
446cf2
   if (!CPU_FEATURES_ARCH_P (cpu_features, Prefer_No_VZEROUPPER)
446cf2
-      && CPU_FEATURES_ARCH_P (cpu_features, AVX2_Usable)
446cf2
+      && CPU_FEATURE_USABLE_P (cpu_features, AVX2)
446cf2
       && CPU_FEATURES_ARCH_P (cpu_features, AVX_Fast_Unaligned_Load))
446cf2
     return OPTIMIZE (avx2);
446cf2
 
446cf2
   if (CPU_FEATURES_ARCH_P (cpu_features, Fast_Unaligned_Load))
446cf2
     return OPTIMIZE (sse2_unaligned);
446cf2
 
446cf2
-  if (CPU_FEATURES_CPU_P (cpu_features, SSSE3))
446cf2
+  if (CPU_FEATURE_USABLE_P (cpu_features, SSSE3))
446cf2
     return OPTIMIZE (ssse3);
446cf2
 
446cf2
   return OPTIMIZE (sse2);
446cf2
diff --git a/sysdeps/x86_64/multiarch/strncmp.c b/sysdeps/x86_64/multiarch/strncmp.c
446cf2
index 02b6d0b6f5717e2a..686d654f3da84379 100644
446cf2
--- a/sysdeps/x86_64/multiarch/strncmp.c
446cf2
+++ b/sysdeps/x86_64/multiarch/strncmp.c
446cf2
@@ -37,15 +37,15 @@ IFUNC_SELECTOR (void)
446cf2
   const struct cpu_features* cpu_features = __get_cpu_features ();
446cf2
 
446cf2
   if (!CPU_FEATURES_ARCH_P (cpu_features, Prefer_No_VZEROUPPER)
446cf2
-      && CPU_FEATURES_ARCH_P (cpu_features, AVX2_Usable)
446cf2
+      && CPU_FEATURE_USABLE_P (cpu_features, AVX2)
446cf2
       && CPU_FEATURES_ARCH_P (cpu_features, AVX_Fast_Unaligned_Load))
446cf2
     return OPTIMIZE (avx2);
446cf2
 
446cf2
-  if (CPU_FEATURES_CPU_P (cpu_features, SSE4_2)
446cf2
+  if (CPU_FEATURE_USABLE_P (cpu_features, SSE4_2)
446cf2
       && !CPU_FEATURES_ARCH_P (cpu_features, Slow_SSE4_2))
446cf2
     return OPTIMIZE (sse42);
446cf2
 
446cf2
-  if (CPU_FEATURES_CPU_P (cpu_features, SSSE3))
446cf2
+  if (CPU_FEATURE_USABLE_P (cpu_features, SSSE3))
446cf2
     return OPTIMIZE (ssse3);
446cf2
 
446cf2
   return OPTIMIZE (sse2);
446cf2
diff --git a/sysdeps/x86_64/multiarch/test-multiarch.c b/sysdeps/x86_64/multiarch/test-multiarch.c
446cf2
index 417147c3d5f325a5..cc2ea56a6753402d 100644
446cf2
--- a/sysdeps/x86_64/multiarch/test-multiarch.c
446cf2
+++ b/sysdeps/x86_64/multiarch/test-multiarch.c
446cf2
@@ -75,18 +75,18 @@ do_test (int argc, char **argv)
446cf2
   int fails;
446cf2
 
446cf2
   get_cpuinfo ();
446cf2
-  fails = check_proc ("avx", HAS_ARCH_FEATURE (AVX_Usable),
446cf2
-		      "HAS_ARCH_FEATURE (AVX_Usable)");
446cf2
-  fails += check_proc ("fma4", HAS_ARCH_FEATURE (FMA4_Usable),
446cf2
-		       "HAS_ARCH_FEATURE (FMA4_Usable)");
446cf2
-  fails += check_proc ("sse4_2", HAS_CPU_FEATURE (SSE4_2),
446cf2
-		       "HAS_CPU_FEATURE (SSE4_2)");
446cf2
-  fails += check_proc ("sse4_1", HAS_CPU_FEATURE (SSE4_1)
446cf2
-		       , "HAS_CPU_FEATURE (SSE4_1)");
446cf2
-  fails += check_proc ("ssse3", HAS_CPU_FEATURE (SSSE3),
446cf2
-		       "HAS_CPU_FEATURE (SSSE3)");
446cf2
-  fails += check_proc ("popcnt", HAS_CPU_FEATURE (POPCNT),
446cf2
-		       "HAS_CPU_FEATURE (POPCNT)");
446cf2
+  fails = check_proc ("avx", CPU_FEATURE_USABLE (AVX),
446cf2
+		      "CPU_FEATURE_USABLE (AVX)");
446cf2
+  fails += check_proc ("fma4", CPU_FEATURE_USABLE (FMA4),
446cf2
+		       "CPU_FEATURE_USABLE (FMA4)");
446cf2
+  fails += check_proc ("sse4_2", CPU_FEATURE_USABLE (SSE4_2),
446cf2
+		       "CPU_FEATURE_USABLE (SSE4_2)");
446cf2
+  fails += check_proc ("sse4_1", CPU_FEATURE_USABLE (SSE4_1)
446cf2
+		       , "CPU_FEATURE_USABLE (SSE4_1)");
446cf2
+  fails += check_proc ("ssse3", CPU_FEATURE_USABLE (SSSE3),
446cf2
+		       "CPU_FEATURE_USABLE (SSSE3)");
446cf2
+  fails += check_proc ("popcnt", CPU_FEATURE_USABLE (POPCNT),
446cf2
+		       "CPU_FEATURE_USABLE (POPCNT)");
446cf2
 
446cf2
   printf ("%d differences between /proc/cpuinfo and glibc code.\n", fails);
446cf2
 
446cf2
diff --git a/sysdeps/x86_64/multiarch/wcscpy.c b/sysdeps/x86_64/multiarch/wcscpy.c
446cf2
index f23b1fd853a4dcb4..8fffb5c3163ab3e4 100644
446cf2
--- a/sysdeps/x86_64/multiarch/wcscpy.c
446cf2
+++ b/sysdeps/x86_64/multiarch/wcscpy.c
446cf2
@@ -34,7 +34,7 @@ IFUNC_SELECTOR (void)
446cf2
 {
446cf2
   const struct cpu_features* cpu_features = __get_cpu_features ();
446cf2
 
446cf2
-  if (CPU_FEATURES_CPU_P (cpu_features, SSSE3))
446cf2
+  if (CPU_FEATURE_USABLE_P (cpu_features, SSSE3))
446cf2
     return OPTIMIZE (ssse3);
446cf2
 
446cf2
   return OPTIMIZE (sse2);
446cf2
diff --git a/sysdeps/x86_64/multiarch/wcsnlen.c b/sysdeps/x86_64/multiarch/wcsnlen.c
446cf2
index bd376057e3e26ed6..b3144c938df70b1e 100644
446cf2
--- a/sysdeps/x86_64/multiarch/wcsnlen.c
446cf2
+++ b/sysdeps/x86_64/multiarch/wcsnlen.c
446cf2
@@ -36,11 +36,11 @@ IFUNC_SELECTOR (void)
446cf2
   const struct cpu_features* cpu_features = __get_cpu_features ();
446cf2
 
446cf2
   if (!CPU_FEATURES_ARCH_P (cpu_features, Prefer_No_VZEROUPPER)
446cf2
-      && CPU_FEATURES_ARCH_P (cpu_features, AVX2_Usable)
446cf2
+      && CPU_FEATURE_USABLE_P (cpu_features, AVX2)
446cf2
       && CPU_FEATURES_ARCH_P (cpu_features, AVX_Fast_Unaligned_Load))
446cf2
     return OPTIMIZE (avx2);
446cf2
 
446cf2
-  if (CPU_FEATURES_CPU_P (cpu_features, SSE4_1))
446cf2
+  if (CPU_FEATURE_USABLE_P (cpu_features, SSE4_1))
446cf2
     return OPTIMIZE (sse4_1);
446cf2
 
446cf2
   return OPTIMIZE (sse2);