|
 |
446cf2 |
commit 76d5b2f002a1243ddba06bd646249553353f4322
|
|
|
446cf2 |
Author: H.J. Lu <hjl.tools@gmail.com>
|
|
|
446cf2 |
Date: Thu May 21 13:36:54 2020 -0700
|
|
|
446cf2 |
|
|
|
446cf2 |
x86: Update Intel Atom processor family optimization
|
|
|
446cf2 |
|
|
|
446cf2 |
Enable Intel Silvermont optimization for Intel Goldmont Plus. Detect more
|
|
|
446cf2 |
Intel Airmont processors. Optimize Intel Tremont like Intel Silvermont
|
|
|
446cf2 |
with rep string instructions.
|
|
|
446cf2 |
|
|
|
446cf2 |
diff --git a/sysdeps/x86/cpu-features.c b/sysdeps/x86/cpu-features.c
|
|
|
446cf2 |
index c432d646ce6806a6..2a801e1856cfe1b3 100644
|
|
|
446cf2 |
--- a/sysdeps/x86/cpu-features.c
|
|
|
446cf2 |
+++ b/sysdeps/x86/cpu-features.c
|
|
|
446cf2 |
@@ -347,18 +347,23 @@ init_cpu_features (struct cpu_features *cpu_features)
|
|
|
446cf2 |
case 0x57:
|
|
|
446cf2 |
/* Knights Landing. Enable Silvermont optimizations. */
|
|
|
446cf2 |
|
|
|
446cf2 |
+ case 0x7a:
|
|
|
446cf2 |
+ /* Unaligned load versions are faster than SSSE3
|
|
|
446cf2 |
+ on Goldmont Plus. */
|
|
|
446cf2 |
+
|
|
|
446cf2 |
case 0x5c:
|
|
|
446cf2 |
case 0x5f:
|
|
|
446cf2 |
/* Unaligned load versions are faster than SSSE3
|
|
|
446cf2 |
on Goldmont. */
|
|
|
446cf2 |
|
|
|
446cf2 |
case 0x4c:
|
|
|
446cf2 |
+ case 0x5a:
|
|
|
446cf2 |
+ case 0x75:
|
|
|
446cf2 |
/* Airmont is a die shrink of Silvermont. */
|
|
|
446cf2 |
|
|
|
446cf2 |
case 0x37:
|
|
|
446cf2 |
case 0x4a:
|
|
|
446cf2 |
case 0x4d:
|
|
|
446cf2 |
- case 0x5a:
|
|
|
446cf2 |
case 0x5d:
|
|
|
446cf2 |
/* Unaligned load versions are faster than SSSE3
|
|
|
446cf2 |
on Silvermont. */
|
|
|
446cf2 |
@@ -369,6 +374,19 @@ init_cpu_features (struct cpu_features *cpu_features)
|
|
|
446cf2 |
| bit_arch_Slow_SSE4_2);
|
|
|
446cf2 |
break;
|
|
|
446cf2 |
|
|
|
446cf2 |
+ case 0x86:
|
|
|
446cf2 |
+ case 0x96:
|
|
|
446cf2 |
+ case 0x9c:
|
|
|
446cf2 |
+ /* Enable rep string instructions, unaligned load, unaligned
|
|
|
446cf2 |
+ copy, pminub and avoid SSE 4.2 on Tremont. */
|
|
|
446cf2 |
+ cpu_features->feature[index_arch_Fast_Rep_String]
|
|
|
446cf2 |
+ |= (bit_arch_Fast_Rep_String
|
|
|
446cf2 |
+ | bit_arch_Fast_Unaligned_Load
|
|
|
446cf2 |
+ | bit_arch_Fast_Unaligned_Copy
|
|
|
446cf2 |
+ | bit_arch_Prefer_PMINUB_for_stringop
|
|
|
446cf2 |
+ | bit_arch_Slow_SSE4_2);
|
|
|
446cf2 |
+ break;
|
|
|
446cf2 |
+
|
|
|
446cf2 |
default:
|
|
|
446cf2 |
/* Unknown family 0x06 processors. Assuming this is one
|
|
|
446cf2 |
of Core i3/i5/i7 processors if AVX is available. */
|