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commit 32ac0b988466785d6e3cc1dffc364bb26fc63193
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Author: mayshao <mayshao-oc@zhaoxin.com>
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Date:   Fri Apr 24 12:55:38 2020 +0800
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    x86: Add CPU Vendor ID detection support for Zhaoxin processors
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    To recognize Zhaoxin CPU Vendor ID, add a new architecture type
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    arch_kind_zhaoxin for Vendor Zhaoxin detection.
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diff --git a/sysdeps/x86/cpu-features.c b/sysdeps/x86/cpu-features.c
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index ade37a9bb3de86cc..c432d646ce6806a6 100644
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--- a/sysdeps/x86/cpu-features.c
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+++ b/sysdeps/x86/cpu-features.c
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@@ -464,6 +464,60 @@ init_cpu_features (struct cpu_features *cpu_features)
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 	  }
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 	}
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     }
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+  /* This spells out "CentaurHauls" or " Shanghai ".  */
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+  else if ((ebx == 0x746e6543 && ecx == 0x736c7561 && edx == 0x48727561)
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+	   || (ebx == 0x68532020 && ecx == 0x20206961 && edx == 0x68676e61))
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+    {
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+      unsigned int extended_model, stepping;
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+
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+      kind = arch_kind_zhaoxin;
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+
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+      get_common_indices (cpu_features, &family, &model, &extended_model,
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+			  &stepping);
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+
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+      get_extended_indices (cpu_features);
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+
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+      model += extended_model;
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+      if (family == 0x6)
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+        {
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+          if (model == 0xf || model == 0x19)
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+            {
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+              cpu_features->feature[index_arch_AVX_Usable]
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+                &= (~bit_arch_AVX_Usable
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+                & ~bit_arch_AVX2_Usable);
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+
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+              cpu_features->feature[index_arch_Slow_SSE4_2]
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+                |= (bit_arch_Slow_SSE4_2);
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+
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+              cpu_features->feature[index_arch_AVX_Fast_Unaligned_Load]
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+                &= ~bit_arch_AVX_Fast_Unaligned_Load;
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+            }
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+        }
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+      else if (family == 0x7)
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+        {
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+          if (model == 0x1b)
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+            {
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+              cpu_features->feature[index_arch_AVX_Usable]
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+                &= (~bit_arch_AVX_Usable
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+                & ~bit_arch_AVX2_Usable);
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+
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+              cpu_features->feature[index_arch_Slow_SSE4_2]
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+                |= bit_arch_Slow_SSE4_2;
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+
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+              cpu_features->feature[index_arch_AVX_Fast_Unaligned_Load]
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+                &= ~bit_arch_AVX_Fast_Unaligned_Load;
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+           }
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+         else if (model == 0x3b)
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+           {
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+             cpu_features->feature[index_arch_AVX_Usable]
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+               &= (~bit_arch_AVX_Usable
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+               & ~bit_arch_AVX2_Usable);
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+
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+               cpu_features->feature[index_arch_AVX_Fast_Unaligned_Load]
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+               &= ~bit_arch_AVX_Fast_Unaligned_Load;
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+           }
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+       }
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+    }
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   else
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     {
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       kind = arch_kind_other;
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diff --git a/sysdeps/x86/cpu-features.h b/sysdeps/x86/cpu-features.h
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index 4917182e99a8ee90..388172a1c07bf979 100644
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--- a/sysdeps/x86/cpu-features.h
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+++ b/sysdeps/x86/cpu-features.h
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@@ -53,6 +53,7 @@ enum cpu_features_kind
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   arch_kind_unknown = 0,
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   arch_kind_intel,
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   arch_kind_amd,
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+  arch_kind_zhaoxin,
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   arch_kind_other
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 };
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