|
 |
446cf2 |
commit 32ac0b988466785d6e3cc1dffc364bb26fc63193
|
|
|
446cf2 |
Author: mayshao <mayshao-oc@zhaoxin.com>
|
|
|
446cf2 |
Date: Fri Apr 24 12:55:38 2020 +0800
|
|
|
446cf2 |
|
|
|
446cf2 |
x86: Add CPU Vendor ID detection support for Zhaoxin processors
|
|
|
446cf2 |
|
|
|
446cf2 |
To recognize Zhaoxin CPU Vendor ID, add a new architecture type
|
|
|
446cf2 |
arch_kind_zhaoxin for Vendor Zhaoxin detection.
|
|
|
446cf2 |
|
|
|
446cf2 |
diff --git a/sysdeps/x86/cpu-features.c b/sysdeps/x86/cpu-features.c
|
|
|
446cf2 |
index ade37a9bb3de86cc..c432d646ce6806a6 100644
|
|
|
446cf2 |
--- a/sysdeps/x86/cpu-features.c
|
|
|
446cf2 |
+++ b/sysdeps/x86/cpu-features.c
|
|
|
446cf2 |
@@ -464,6 +464,60 @@ init_cpu_features (struct cpu_features *cpu_features)
|
|
|
446cf2 |
}
|
|
|
446cf2 |
}
|
|
|
446cf2 |
}
|
|
|
446cf2 |
+ /* This spells out "CentaurHauls" or " Shanghai ". */
|
|
|
446cf2 |
+ else if ((ebx == 0x746e6543 && ecx == 0x736c7561 && edx == 0x48727561)
|
|
|
446cf2 |
+ || (ebx == 0x68532020 && ecx == 0x20206961 && edx == 0x68676e61))
|
|
|
446cf2 |
+ {
|
|
|
446cf2 |
+ unsigned int extended_model, stepping;
|
|
|
446cf2 |
+
|
|
|
446cf2 |
+ kind = arch_kind_zhaoxin;
|
|
|
446cf2 |
+
|
|
|
446cf2 |
+ get_common_indices (cpu_features, &family, &model, &extended_model,
|
|
|
446cf2 |
+ &stepping);
|
|
|
446cf2 |
+
|
|
|
446cf2 |
+ get_extended_indices (cpu_features);
|
|
|
446cf2 |
+
|
|
|
446cf2 |
+ model += extended_model;
|
|
|
446cf2 |
+ if (family == 0x6)
|
|
|
446cf2 |
+ {
|
|
|
446cf2 |
+ if (model == 0xf || model == 0x19)
|
|
|
446cf2 |
+ {
|
|
|
446cf2 |
+ cpu_features->feature[index_arch_AVX_Usable]
|
|
|
446cf2 |
+ &= (~bit_arch_AVX_Usable
|
|
|
446cf2 |
+ & ~bit_arch_AVX2_Usable);
|
|
|
446cf2 |
+
|
|
|
446cf2 |
+ cpu_features->feature[index_arch_Slow_SSE4_2]
|
|
|
446cf2 |
+ |= (bit_arch_Slow_SSE4_2);
|
|
|
446cf2 |
+
|
|
|
446cf2 |
+ cpu_features->feature[index_arch_AVX_Fast_Unaligned_Load]
|
|
|
446cf2 |
+ &= ~bit_arch_AVX_Fast_Unaligned_Load;
|
|
|
446cf2 |
+ }
|
|
|
446cf2 |
+ }
|
|
|
446cf2 |
+ else if (family == 0x7)
|
|
|
446cf2 |
+ {
|
|
|
446cf2 |
+ if (model == 0x1b)
|
|
|
446cf2 |
+ {
|
|
|
446cf2 |
+ cpu_features->feature[index_arch_AVX_Usable]
|
|
|
446cf2 |
+ &= (~bit_arch_AVX_Usable
|
|
|
446cf2 |
+ & ~bit_arch_AVX2_Usable);
|
|
|
446cf2 |
+
|
|
|
446cf2 |
+ cpu_features->feature[index_arch_Slow_SSE4_2]
|
|
|
446cf2 |
+ |= bit_arch_Slow_SSE4_2;
|
|
|
446cf2 |
+
|
|
|
446cf2 |
+ cpu_features->feature[index_arch_AVX_Fast_Unaligned_Load]
|
|
|
446cf2 |
+ &= ~bit_arch_AVX_Fast_Unaligned_Load;
|
|
|
446cf2 |
+ }
|
|
|
446cf2 |
+ else if (model == 0x3b)
|
|
|
446cf2 |
+ {
|
|
|
446cf2 |
+ cpu_features->feature[index_arch_AVX_Usable]
|
|
|
446cf2 |
+ &= (~bit_arch_AVX_Usable
|
|
|
446cf2 |
+ & ~bit_arch_AVX2_Usable);
|
|
|
446cf2 |
+
|
|
|
446cf2 |
+ cpu_features->feature[index_arch_AVX_Fast_Unaligned_Load]
|
|
|
446cf2 |
+ &= ~bit_arch_AVX_Fast_Unaligned_Load;
|
|
|
446cf2 |
+ }
|
|
|
446cf2 |
+ }
|
|
|
446cf2 |
+ }
|
|
|
446cf2 |
else
|
|
|
446cf2 |
{
|
|
|
446cf2 |
kind = arch_kind_other;
|
|
|
446cf2 |
diff --git a/sysdeps/x86/cpu-features.h b/sysdeps/x86/cpu-features.h
|
|
|
446cf2 |
index 4917182e99a8ee90..388172a1c07bf979 100644
|
|
|
446cf2 |
--- a/sysdeps/x86/cpu-features.h
|
|
|
446cf2 |
+++ b/sysdeps/x86/cpu-features.h
|
|
|
446cf2 |
@@ -53,6 +53,7 @@ enum cpu_features_kind
|
|
|
446cf2 |
arch_kind_unknown = 0,
|
|
|
446cf2 |
arch_kind_intel,
|
|
|
446cf2 |
arch_kind_amd,
|
|
|
446cf2 |
+ arch_kind_zhaoxin,
|
|
|
446cf2 |
arch_kind_other
|
|
|
446cf2 |
};
|
|
|
446cf2 |
|