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commit fb4c32aef64500c65c7fc95ca06d7e17d467be45
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Author: H.J. Lu <hjl.tools@gmail.com>
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Date: Mon Aug 6 06:25:28 2018 -0700
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x86: Move STATE_SAVE_OFFSET/STATE_SAVE_MASK to sysdep.h
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Move STATE_SAVE_OFFSET and STATE_SAVE_MASK to sysdep.h to make
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sysdeps/x86/cpu-features.h a C header file.
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* sysdeps/x86/cpu-features.h (STATE_SAVE_OFFSET): Removed.
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(STATE_SAVE_MASK): Likewise.
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Don't check __ASSEMBLER__ to include <cpu-features-offsets.h>.
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* sysdeps/x86/sysdep.h (STATE_SAVE_OFFSET): New.
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(STATE_SAVE_MASK): Likewise.
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* sysdeps/x86_64/dl-trampoline.S: Include <cpu-features-offsets.h>
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instead of <cpu-features.h>.
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diff --git a/sysdeps/x86/cpu-features.h b/sysdeps/x86/cpu-features.h
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index 4c6d08c709eea204..d342664c64ab7aa1 100644
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--- a/sysdeps/x86/cpu-features.h
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+++ b/sysdeps/x86/cpu-features.h
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@@ -92,18 +92,6 @@
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/* The current maximum size of the feature integer bit array. */
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#define FEATURE_INDEX_MAX 1
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-/* Offset for fxsave/xsave area used by _dl_runtime_resolve. Also need
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- space to preserve RCX, RDX, RSI, RDI, R8, R9 and RAX. It must be
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- aligned to 16 bytes for fxsave and 64 bytes for xsave. */
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-#define STATE_SAVE_OFFSET (8 * 7 + 8)
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-
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-/* Save SSE, AVX, AVX512, mask and bound registers. */
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-#define STATE_SAVE_MASK \
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- ((1 << 1) | (1 << 2) | (1 << 3) | (1 << 5) | (1 << 6) | (1 << 7))
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-
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-#ifdef __ASSEMBLER__
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-# include <cpu-features-offsets.h>
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-#else /* __ASSEMBLER__ */
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enum
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{
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COMMON_CPUID_INDEX_1 = 0,
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@@ -267,8 +255,6 @@ extern const struct cpu_features *__get_cpu_features (void)
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# define index_arch_XSAVEC_Usable FEATURE_INDEX_1
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# define index_arch_Prefer_FSRM FEATURE_INDEX_1
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-#endif /* !__ASSEMBLER__ */
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-
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#ifdef __x86_64__
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# define HAS_CPUID 1
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#elif defined __i586__ || defined __pentium__
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diff --git a/sysdeps/x86/sysdep.h b/sysdeps/x86/sysdep.h
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index 8776ad8374e056d3..f41f4ebd425cfbaf 100644
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--- a/sysdeps/x86/sysdep.h
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+++ b/sysdeps/x86/sysdep.h
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@@ -48,6 +48,15 @@ enum cf_protection_level
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# define SHSTK_ENABLED 0
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#endif
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+/* Offset for fxsave/xsave area used by _dl_runtime_resolve. Also need
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+ space to preserve RCX, RDX, RSI, RDI, R8, R9 and RAX. It must be
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+ aligned to 16 bytes for fxsave and 64 bytes for xsave. */
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+#define STATE_SAVE_OFFSET (8 * 7 + 8)
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+
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+/* Save SSE, AVX, AVX512, mask and bound registers. */
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+#define STATE_SAVE_MASK \
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+ ((1 << 1) | (1 << 2) | (1 << 3) | (1 << 5) | (1 << 6) | (1 << 7))
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+
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#ifdef __ASSEMBLER__
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/* Syntactic details of assembler. */
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diff --git a/sysdeps/x86_64/dl-trampoline.S b/sysdeps/x86_64/dl-trampoline.S
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index ef1425cbb909529a..fd918510fe155733 100644
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--- a/sysdeps/x86_64/dl-trampoline.S
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+++ b/sysdeps/x86_64/dl-trampoline.S
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@@ -18,7 +18,7 @@
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#include <config.h>
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#include <sysdep.h>
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-#include <cpu-features.h>
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+#include <cpu-features-offsets.h>
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#include <link-defines.h>
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#ifndef DL_STACK_ALIGNMENT
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