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commit fec2bd2c2d31bc731cf61623e150d047746954bd
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Author: Paul A. Clarke <pc@us.ibm.com>
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Date:   Tue Aug 6 00:13:45 2019 -0400
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    [powerpc] fesetenv: optimize FPSCR access
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    fesetenv() reads the current value of the Floating-Point Status and Control
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    Register (FPSCR) to determine the difference between the current state of
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    exception enables and the newly requested state.  All of these bits are also
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    returned by the lighter weight 'mffsl' instruction used by fegetenv_status().
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    Use that instead.
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    Also, remove a local macro _FPU_MASK_ALL in favor of a common macro,
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    FPU_ENABLES_MASK from fenv_libc.h.
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    Finally, use a local variable ('new') in favor of a pointer dereference
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    ('*envp').
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diff --git a/sysdeps/powerpc/fpu/fesetenv.c b/sysdeps/powerpc/fpu/fesetenv.c
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index ad9fda15b12f15e3..ac927c8f3ada40b4 100644
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--- a/sysdeps/powerpc/fpu/fesetenv.c
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+++ b/sysdeps/powerpc/fpu/fesetenv.c
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@@ -19,8 +19,6 @@
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 #include <fenv_libc.h>
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 #include <fpu_control.h>
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-#define _FPU_MASK_ALL (_FPU_MASK_ZM | _FPU_MASK_OM | _FPU_MASK_UM | _FPU_MASK_XM | _FPU_MASK_IM)
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-
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 int
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 __fesetenv (const fenv_t *envp)
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 {
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@@ -28,25 +26,23 @@ __fesetenv (const fenv_t *envp)
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   /* get the currently set exceptions.  */
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   new.fenv = *envp;
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-  old.fenv = fegetenv_register ();
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-  if (old.l == new.l)
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-    return 0;
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+  old.fenv = fegetenv_status ();
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   /* If the old env has no enabled exceptions and the new env has any enabled
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      exceptions, then unmask SIGFPE in the MSR FE0/FE1 bits.  This will put the
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      hardware into "precise mode" and may cause the FPU to run slower on some
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      hardware.  */
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-  if ((old.l & _FPU_MASK_ALL) == 0 && (new.l & _FPU_MASK_ALL) != 0)
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+  if ((old.l & FPSCR_ENABLES_MASK) == 0 && (new.l & FPSCR_ENABLES_MASK) != 0)
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     (void) __fe_nomask_env_priv ();
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   /* If the old env had any enabled exceptions and the new env has no enabled
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      exceptions, then mask SIGFPE in the MSR FE0/FE1 bits.  This may allow the
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      FPU to run faster because it always takes the default action and can not
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      generate SIGFPE. */
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-  if ((old.l & _FPU_MASK_ALL) != 0 && (new.l & _FPU_MASK_ALL) == 0)
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+  if ((old.l & FPSCR_ENABLES_MASK) != 0 && (new.l & FPSCR_ENABLES_MASK) == 0)
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     (void)__fe_mask_env ();
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-  fesetenv_register (*envp);
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+  fesetenv_register (new.fenv);
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   /* Success.  */
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   return 0;