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commit de751ebc9efa97ce0115e42bd55fa1beeb614380
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Author: Paul A. Clarke <pc@us.ibm.com>
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Date: Fri Mar 15 19:04:24 2019 -0400
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[powerpc] get_rounding_mode: utilize faster method to get rounding mode
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Add support to use 'mffsl' instruction if compiled for POWER9 (or later).
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Also, mask the result to avoid bleeding unrelated bits into the result of
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_FPU_GET_RC().
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Reviewed-by: Tulio Magno Quites Machado Filho <tuliom@linux.ibm.com>
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diff --git a/sysdeps/powerpc/fpu/get-rounding-mode.h b/sysdeps/powerpc/fpu/get-rounding-mode.h
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new file mode 100644
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index 0000000000000000..e2fdbbbcce72bd66
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--- /dev/null
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+++ b/sysdeps/powerpc/fpu/get-rounding-mode.h
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@@ -0,0 +1,33 @@
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+/* Determine floating-point rounding mode within libc. powerpc64 version.
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+ Copyright (C) 2019 Free Software Foundation, Inc.
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+ This file is part of the GNU C Library.
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+
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+ The GNU C Library is free software; you can redistribute it and/or
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+ modify it under the terms of the GNU Lesser General Public
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+ License as published by the Free Software Foundation; either
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+ version 2.1 of the License, or (at your option) any later version.
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+
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+ The GNU C Library is distributed in the hope that it will be useful,
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+ but WITHOUT ANY WARRANTY; without even the implied warranty of
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+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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+ Lesser General Public License for more details.
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+
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+ You should have received a copy of the GNU Lesser General Public
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+ License along with the GNU C Library; if not, see
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+ <http://www.gnu.org/licenses/>. */
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+
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+#ifndef _POWERPC64_GET_ROUNDING_MODE_H
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+#define _POWERPC64_GET_ROUNDING_MODE_H 1
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+
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+#include <fenv.h>
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+#include <fpu_control.h>
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+
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+/* Return the floating-point rounding mode. */
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+
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+static inline int
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+get_rounding_mode (void)
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+{
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+ return _FPU_GET_RC ();
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+}
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+
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+#endif /* get-rounding-mode.h */
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diff --git a/sysdeps/powerpc/fpu_control.h b/sysdeps/powerpc/fpu_control.h
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index 9d0698b4fc3eb595..62c478d72ae660cb 100644
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--- a/sysdeps/powerpc/fpu_control.h
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+++ b/sysdeps/powerpc/fpu_control.h
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@@ -71,6 +71,8 @@ extern fpu_control_t __fpu_control;
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# define _FPU_RC_UP 0x02
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# define _FPU_RC_ZERO 0x01
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+# define _FPU_MASK_RC (_FPU_RC_NEAREST|_FPU_RC_DOWN|_FPU_RC_UP|_FPU_RC_ZERO)
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+
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# define _FPU_MASK_NI 0x04 /* non-ieee mode */
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/* masking of interrupts */
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@@ -94,15 +96,36 @@ extern fpu_control_t __fpu_control;
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typedef unsigned int fpu_control_t;
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/* Macros for accessing the hardware control word. */
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+# define __FPU_MFFS() \
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+ ({register double __fr; \
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+ __asm__ ("mffs %0" : "=f" (__fr)); \
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+ __fr; \
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+ })
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+
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# define _FPU_GETCW(cw) \
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({union { double __d; unsigned long long __ll; } __u; \
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- register double __fr; \
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- __asm__ ("mffs %0" : "=f" (__fr)); \
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- __u.__d = __fr; \
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+ __u.__d = __FPU_MFFS(); \
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(cw) = (fpu_control_t) __u.__ll; \
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(fpu_control_t) __u.__ll; \
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})
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+#ifdef _ARCH_PWR9
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+# define __FPU_MFFSL() \
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+ ({register double __fr; \
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+ __asm__ ("mffsl %0" : "=f" (__fr)); \
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+ __fr; \
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+ })
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+#else
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+# define __FPU_MFFSL() __FPU_MFFS()
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+#endif
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+
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+# define _FPU_GET_RC() \
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+ ({union { double __d; unsigned long long __ll; } __u; \
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+ __u.__d = __FPU_MFFSL(); \
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+ __u.__ll &= _FPU_MASK_RC; \
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+ (fpu_control_t) __u.__ll; \
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+ })
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+
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# define _FPU_SETCW(cw) \
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{ union { double __d; unsigned long long __ll; } __u; \
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register double __fr; \
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