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commit d7a568af5546e0313abbc04060c8e9b0d3f750b4
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Author: Paul A. Clarke <pc@us.ibm.com>
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Date: Thu Sep 19 14:04:45 2019 -0500
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[powerpc] Rename fesetenv_mode to fesetenv_control
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fesetenv_mode is used variously to write the FPSCR exception enable
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bits and rounding mode bits. These are referred to as the control
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bits in the POWER ISA. Change the name to be reflective of its
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current and expected use, and match up well with fegetenv_control.
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diff --git a/sysdeps/powerpc/fpu/fedisblxcpt.c b/sysdeps/powerpc/fpu/fedisblxcpt.c
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index 1273987459655585..efa9c422fe54f5d8 100644
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--- a/sysdeps/powerpc/fpu/fedisblxcpt.c
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+++ b/sysdeps/powerpc/fpu/fedisblxcpt.c
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@@ -41,7 +41,7 @@ fedisableexcept (int excepts)
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fe.l &= ~new;
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if (fe.l != curr.l)
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- fesetenv_mode (fe.fenv);
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+ fesetenv_control (fe.fenv);
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__TEST_AND_ENTER_NON_STOP (-1ULL, fe.l);
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diff --git a/sysdeps/powerpc/fpu/feenablxcpt.c b/sysdeps/powerpc/fpu/feenablxcpt.c
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index fa233c305aedd5f6..dfcc6fb7bd24b8db 100644
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--- a/sysdeps/powerpc/fpu/feenablxcpt.c
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+++ b/sysdeps/powerpc/fpu/feenablxcpt.c
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@@ -41,7 +41,7 @@ feenableexcept (int excepts)
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fe.l |= new;
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if (fe.l != curr.l)
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- fesetenv_mode (fe.fenv);
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+ fesetenv_control (fe.fenv);
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__TEST_AND_EXIT_NON_STOP (0ULL, fe.l);
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diff --git a/sysdeps/powerpc/fpu/fenv_libc.h b/sysdeps/powerpc/fpu/fenv_libc.h
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index b5c8da1adefe93cb..287fc9f8f70e051c 100644
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--- a/sysdeps/powerpc/fpu/fenv_libc.h
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+++ b/sysdeps/powerpc/fpu/fenv_libc.h
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@@ -117,7 +117,7 @@ extern const fenv_t *__fe_mask_env (void) attribute_hidden;
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/* Set the last 2 nibbles of the FPSCR, which contain the
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exception enables and the rounding mode.
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'fegetenv_control' retrieves these bits by reading the FPSCR. */
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-#define fesetenv_mode(env) __builtin_mtfsf (0b00000011, (env));
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+#define fesetenv_control(env) __builtin_mtfsf (0b00000011, (env));
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/* This very handy macro:
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- Sets the rounding mode to 'round to nearest';
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diff --git a/sysdeps/powerpc/fpu/fenv_private.h b/sysdeps/powerpc/fpu/fenv_private.h
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index c88142fe3053580f..666fbfdd9fef7759 100644
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--- a/sysdeps/powerpc/fpu/fenv_private.h
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+++ b/sysdeps/powerpc/fpu/fenv_private.h
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@@ -61,7 +61,7 @@ __libc_femergeenv_ppc (const fenv_t *envp, unsigned long long old_mask,
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== (FPSCR_CONTROL_MASK|FPSCR_EXCEPTIONS_MASK) &&
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(old.l & FPSCR_EXCEPTIONS_MASK) == (new.l & FPSCR_EXCEPTIONS_MASK))
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{
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- fesetenv_mode (new.fenv);
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+ fesetenv_control (new.fenv);
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}
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else
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/* Atomically enable and raise (if appropriate) exceptions set in `new'. */
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@@ -142,7 +142,7 @@ libc_feholdsetround_noex_ppc_ctx (struct rm_ctx *ctx, int r)
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if (__glibc_unlikely (new.l != old.l))
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{
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__TEST_AND_ENTER_NON_STOP (old.l, 0ULL);
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- fesetenv_mode (new.fenv);
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+ fesetenv_control (new.fenv);
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ctx->updated_status = true;
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}
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else
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diff --git a/sysdeps/powerpc/fpu/fesetmode.c b/sysdeps/powerpc/fpu/fesetmode.c
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index e5938af04cb71ca1..fdaecb1a6a25a820 100644
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--- a/sysdeps/powerpc/fpu/fesetmode.c
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+++ b/sysdeps/powerpc/fpu/fesetmode.c
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@@ -36,6 +36,6 @@ fesetmode (const femode_t *modep)
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__TEST_AND_EXIT_NON_STOP (old.l, new.l);
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__TEST_AND_ENTER_NON_STOP (old.l, new.l);
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- fesetenv_mode (new.fenv);
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+ fesetenv_control (new.fenv);
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return 0;
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}
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