|
 |
8ae002 |
From 1e5a0d609f20a613e1e989802bbe479f61bed1ca Mon Sep 17 00:00:00 2001
|
|
|
8ae002 |
From: Rajalakshmi Srinivasaraghavan <raji@linux.vnet.ibm.com>
|
|
|
8ae002 |
Date: Thu, 1 Dec 2016 11:35:43 +0530
|
|
|
8ae002 |
Subject: [PATCH] powerpc: strcmp optimization for power9
|
|
|
8ae002 |
|
|
|
8ae002 |
Vectorized loops are used for strings > 32B when compared
|
|
|
8ae002 |
to power8 optimization.
|
|
|
8ae002 |
|
|
|
8ae002 |
Tested on power9 ppc64le simulator.
|
|
|
8ae002 |
|
|
|
8ae002 |
(cherry picked from commit 80ab6401a9bb566de940cc6a5fb7a6af650f17b9)
|
|
|
8ae002 |
|
|
|
8ae002 |
Conflicts:
|
|
|
8ae002 |
sysdeps/powerpc/powerpc64/multiarch/strcmp.c
|
|
|
8ae002 |
---
|
|
|
8ae002 |
ChangeLog | 11 +
|
|
|
8ae002 |
sysdeps/powerpc/powerpc64/multiarch/Makefile | 2 +-
|
|
|
8ae002 |
.../powerpc/powerpc64/multiarch/ifunc-impl-list.c | 3 +
|
|
|
8ae002 |
.../powerpc/powerpc64/multiarch/strcmp-power9.S | 40 +++
|
|
|
8ae002 |
sysdeps/powerpc/powerpc64/multiarch/strcmp.c | 13 +-
|
|
|
8ae002 |
sysdeps/powerpc/powerpc64/power9/strcmp.S | 278 +++++++++++++++++++++
|
|
|
8ae002 |
6 files changed, 341 insertions(+), 6 deletions(-)
|
|
|
8ae002 |
create mode 100644 sysdeps/powerpc/powerpc64/multiarch/strcmp-power9.S
|
|
|
8ae002 |
create mode 100644 sysdeps/powerpc/powerpc64/power9/strcmp.S
|
|
|
8ae002 |
|
|
|
8ae002 |
diff --git a/ChangeLog b/ChangeLog
|
|
|
8ae002 |
index 6d6aab3..57152b8 100644
|
|
|
8ae002 |
diff --git a/sysdeps/powerpc/powerpc64/multiarch/Makefile b/sysdeps/powerpc/powerpc64/multiarch/Makefile
|
|
|
8ae002 |
index e3ac285..2c83c22 100644
|
|
|
8ae002 |
--- a/sysdeps/powerpc/powerpc64/multiarch/Makefile
|
|
|
8ae002 |
+++ b/sysdeps/powerpc/powerpc64/multiarch/Makefile
|
|
|
8ae002 |
@@ -16,7 +16,7 @@ sysdep_routines += memcpy-power7 memcpy-a2 memcpy-power6 memcpy-cell \
|
|
|
8ae002 |
strncase-ppc64 strncase-power8 \
|
|
|
8ae002 |
strcasestr-power8 strcasestr-ppc64 \
|
|
|
8ae002 |
strcat-power8 strcat-power7 strcat-ppc64 \
|
|
|
8ae002 |
- strcmp-power8 strcmp-power7 strcmp-ppc64 \
|
|
|
8ae002 |
+ strcmp-power9 strcmp-power8 strcmp-power7 strcmp-ppc64 \
|
|
|
8ae002 |
strcpy-power8 strcpy-power7 strcpy-ppc64 \
|
|
|
8ae002 |
strcspn-power8 strcspn-ppc64 \
|
|
|
8ae002 |
stpncpy-power8 stpncpy-power7 stpncpy-ppc64 \
|
|
|
8ae002 |
diff --git a/sysdeps/powerpc/powerpc64/multiarch/ifunc-impl-list.c b/sysdeps/powerpc/powerpc64/multiarch/ifunc-impl-list.c
|
|
|
8ae002 |
index aabd7bc..404a226 100644
|
|
|
8ae002 |
--- a/sysdeps/powerpc/powerpc64/multiarch/ifunc-impl-list.c
|
|
|
8ae002 |
+++ b/sysdeps/powerpc/powerpc64/multiarch/ifunc-impl-list.c
|
|
|
8ae002 |
@@ -311,6 +311,9 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array,
|
|
|
8ae002 |
/* Support sysdeps/powerpc/powerpc64/multiarch/strcmp.c. */
|
|
|
8ae002 |
IFUNC_IMPL (i, name, strcmp,
|
|
|
8ae002 |
IFUNC_IMPL_ADD (array, i, strcmp,
|
|
|
8ae002 |
+ hwcap2 & PPC_FEATURE2_ARCH_3_00,
|
|
|
8ae002 |
+ __strcmp_power9)
|
|
|
8ae002 |
+ IFUNC_IMPL_ADD (array, i, strcmp,
|
|
|
8ae002 |
hwcap2 & PPC_FEATURE2_ARCH_2_07,
|
|
|
8ae002 |
__strcmp_power8)
|
|
|
8ae002 |
IFUNC_IMPL_ADD (array, i, strcmp,
|
|
|
8ae002 |
diff --git a/sysdeps/powerpc/powerpc64/multiarch/strcmp-power9.S b/sysdeps/powerpc/powerpc64/multiarch/strcmp-power9.S
|
|
|
8ae002 |
new file mode 100644
|
|
|
8ae002 |
index 0000000..0a09e5b
|
|
|
8ae002 |
--- /dev/null
|
|
|
8ae002 |
+++ b/sysdeps/powerpc/powerpc64/multiarch/strcmp-power9.S
|
|
|
8ae002 |
@@ -0,0 +1,40 @@
|
|
|
8ae002 |
+/* Optimized strcmp implementation for POWER9/PPC64.
|
|
|
8ae002 |
+ Copyright (C) 2016 Free Software Foundation, Inc.
|
|
|
8ae002 |
+ This file is part of the GNU C Library.
|
|
|
8ae002 |
+
|
|
|
8ae002 |
+ The GNU C Library is free software; you can redistribute it and/or
|
|
|
8ae002 |
+ modify it under the terms of the GNU Lesser General Public
|
|
|
8ae002 |
+ License as published by the Free Software Foundation; either
|
|
|
8ae002 |
+ version 2.1 of the License, or (at your option) any later version.
|
|
|
8ae002 |
+
|
|
|
8ae002 |
+ The GNU C Library is distributed in the hope that it will be useful,
|
|
|
8ae002 |
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
|
8ae002 |
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
|
|
8ae002 |
+ Lesser General Public License for more details.
|
|
|
8ae002 |
+
|
|
|
8ae002 |
+ You should have received a copy of the GNU Lesser General Public
|
|
|
8ae002 |
+ License along with the GNU C Library; if not, see
|
|
|
8ae002 |
+ <http://www.gnu.org/licenses/>. */
|
|
|
8ae002 |
+
|
|
|
8ae002 |
+#include <sysdep.h>
|
|
|
8ae002 |
+
|
|
|
8ae002 |
+#undef EALIGN
|
|
|
8ae002 |
+#define EALIGN(name, alignt, words) \
|
|
|
8ae002 |
+ .section ".text"; \
|
|
|
8ae002 |
+ ENTRY_2(__strcmp_power9) \
|
|
|
8ae002 |
+ .align ALIGNARG(alignt); \
|
|
|
8ae002 |
+ EALIGN_W_##words; \
|
|
|
8ae002 |
+ BODY_LABEL(__strcmp_power9): \
|
|
|
8ae002 |
+ cfi_startproc; \
|
|
|
8ae002 |
+ LOCALENTRY(__strcmp_power9)
|
|
|
8ae002 |
+
|
|
|
8ae002 |
+#undef END
|
|
|
8ae002 |
+#define END(name) \
|
|
|
8ae002 |
+ cfi_endproc; \
|
|
|
8ae002 |
+ TRACEBACK(__strcmp_power9) \
|
|
|
8ae002 |
+ END_2(__strcmp_power9)
|
|
|
8ae002 |
+
|
|
|
8ae002 |
+#undef libc_hidden_builtin_def
|
|
|
8ae002 |
+#define libc_hidden_builtin_def(name)
|
|
|
8ae002 |
+
|
|
|
8ae002 |
+#include <sysdeps/powerpc/powerpc64/power9/strcmp.S>
|
|
|
8ae002 |
diff --git a/sysdeps/powerpc/powerpc64/multiarch/strcmp.c b/sysdeps/powerpc/powerpc64/multiarch/strcmp.c
|
|
|
8ae002 |
index b45ba1f..7345f5a 100644
|
|
|
8ae002 |
--- a/sysdeps/powerpc/powerpc64/multiarch/strcmp.c
|
|
|
8ae002 |
+++ b/sysdeps/powerpc/powerpc64/multiarch/strcmp.c
|
|
|
8ae002 |
@@ -24,11 +24,14 @@
|
|
|
8ae002 |
extern __typeof (strcmp) __strcmp_ppc attribute_hidden;
|
|
|
8ae002 |
extern __typeof (strcmp) __strcmp_power7 attribute_hidden;
|
|
|
8ae002 |
extern __typeof (strcmp) __strcmp_power8 attribute_hidden;
|
|
|
8ae002 |
+extern __typeof (strcmp) __strcmp_power9 attribute_hidden;
|
|
|
8ae002 |
|
|
|
8ae002 |
libc_ifunc (strcmp,
|
|
|
8ae002 |
- (hwcap2 & PPC_FEATURE2_ARCH_2_07)
|
|
|
8ae002 |
- ? __strcmp_power8 :
|
|
|
8ae002 |
- (hwcap & PPC_FEATURE_HAS_VSX)
|
|
|
8ae002 |
- ? __strcmp_power7
|
|
|
8ae002 |
- : __strcmp_ppc);
|
|
|
8ae002 |
+ (hwcap2 & PPC_FEATURE2_ARCH_3_00)
|
|
|
8ae002 |
+ ? __strcmp_power9 :
|
|
|
8ae002 |
+ (hwcap2 & PPC_FEATURE2_ARCH_2_07)
|
|
|
8ae002 |
+ ? __strcmp_power8 :
|
|
|
8ae002 |
+ (hwcap & PPC_FEATURE_HAS_VSX)
|
|
|
8ae002 |
+ ? __strcmp_power7
|
|
|
8ae002 |
+ : __strcmp_ppc);
|
|
|
8ae002 |
#endif
|
|
|
8ae002 |
diff --git a/sysdeps/powerpc/powerpc64/power9/strcmp.S b/sysdeps/powerpc/powerpc64/power9/strcmp.S
|
|
|
8ae002 |
new file mode 100644
|
|
|
8ae002 |
index 0000000..754d508
|
|
|
8ae002 |
--- /dev/null
|
|
|
8ae002 |
+++ b/sysdeps/powerpc/powerpc64/power9/strcmp.S
|
|
|
8ae002 |
@@ -0,0 +1,278 @@
|
|
|
8ae002 |
+/* Optimized strcmp implementation for PowerPC64/POWER9.
|
|
|
8ae002 |
+ Copyright (C) 2016 Free Software Foundation, Inc.
|
|
|
8ae002 |
+ This file is part of the GNU C Library.
|
|
|
8ae002 |
+
|
|
|
8ae002 |
+ The GNU C Library is free software; you can redistribute it and/or
|
|
|
8ae002 |
+ modify it under the terms of the GNU Lesser General Public
|
|
|
8ae002 |
+ License as published by the Free Software Foundation; either
|
|
|
8ae002 |
+ version 2.1 of the License, or (at your option) any later version.
|
|
|
8ae002 |
+
|
|
|
8ae002 |
+ The GNU C Library is distributed in the hope that it will be useful,
|
|
|
8ae002 |
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
|
8ae002 |
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
|
|
8ae002 |
+ Lesser General Public License for more details.
|
|
|
8ae002 |
+
|
|
|
8ae002 |
+ You should have received a copy of the GNU Lesser General Public
|
|
|
8ae002 |
+ License along with the GNU C Library; if not, see
|
|
|
8ae002 |
+ <http://www.gnu.org/licenses/>. */
|
|
|
8ae002 |
+#ifdef __LITTLE_ENDIAN__
|
|
|
8ae002 |
+#include <sysdep.h>
|
|
|
8ae002 |
+
|
|
|
8ae002 |
+/* Implements the function
|
|
|
8ae002 |
+
|
|
|
8ae002 |
+ int [r3] strcmp (const char *s1 [r3], const char *s2 [r4])
|
|
|
8ae002 |
+
|
|
|
8ae002 |
+ The implementation uses unaligned doubleword access for first 32 bytes
|
|
|
8ae002 |
+ as in POWER8 patch and uses vectorised loops after that. */
|
|
|
8ae002 |
+
|
|
|
8ae002 |
+/* TODO: Change this to actual instructions when minimum binutils is upgraded
|
|
|
8ae002 |
+ to 2.27. Macros are defined below for these newer instructions in order
|
|
|
8ae002 |
+ to maintain compatibility. */
|
|
|
8ae002 |
+# define VCTZLSBB(r,v) .long (0x10010602 | ((r)<<(32-11)) | ((v)<<(32-21)))
|
|
|
8ae002 |
+
|
|
|
8ae002 |
+# define VEXTUBRX(t,a,b) .long (0x1000070d \
|
|
|
8ae002 |
+ | ((t)<<(32-11)) \
|
|
|
8ae002 |
+ | ((a)<<(32-16)) \
|
|
|
8ae002 |
+ | ((b)<<(32-21)) )
|
|
|
8ae002 |
+
|
|
|
8ae002 |
+# define VCMPNEZB(t,a,b) .long (0x10000507 \
|
|
|
8ae002 |
+ | ((t)<<(32-11)) \
|
|
|
8ae002 |
+ | ((a)<<(32-16)) \
|
|
|
8ae002 |
+ | ((b)<<(32-21)) )
|
|
|
8ae002 |
+
|
|
|
8ae002 |
+/* Get 16 bytes for unaligned case.
|
|
|
8ae002 |
+ reg1: Vector to hold next 16 bytes.
|
|
|
8ae002 |
+ reg2: Address to read from.
|
|
|
8ae002 |
+ reg3: Permute control vector. */
|
|
|
8ae002 |
+# define GET16BYTES(reg1, reg2, reg3) \
|
|
|
8ae002 |
+ lvx reg1, 0, reg2; \
|
|
|
8ae002 |
+ vperm v8, v2, reg1, reg3; \
|
|
|
8ae002 |
+ vcmpequb. v8, v0, v8; \
|
|
|
8ae002 |
+ beq cr6, 1f; \
|
|
|
8ae002 |
+ vspltisb v9, 0; \
|
|
|
8ae002 |
+ b 2f; \
|
|
|
8ae002 |
+ .align 4; \
|
|
|
8ae002 |
+1: \
|
|
|
8ae002 |
+ addi r6, reg2, 16; \
|
|
|
8ae002 |
+ lvx v9, 0, r6; \
|
|
|
8ae002 |
+2: \
|
|
|
8ae002 |
+ vperm reg1, v9, reg1, reg3;
|
|
|
8ae002 |
+
|
|
|
8ae002 |
+/* TODO: change this to .machine power9 when the minimum required binutils
|
|
|
8ae002 |
+ allows it. */
|
|
|
8ae002 |
+
|
|
|
8ae002 |
+ .machine power7
|
|
|
8ae002 |
+EALIGN (strcmp, 4, 0)
|
|
|
8ae002 |
+ li r0, 0
|
|
|
8ae002 |
+
|
|
|
8ae002 |
+ /* Check if [s1]+32 or [s2]+32 will cross a 4K page boundary using
|
|
|
8ae002 |
+ the code:
|
|
|
8ae002 |
+
|
|
|
8ae002 |
+ (((size_t) s1) % PAGE_SIZE > (PAGE_SIZE - ITER_SIZE))
|
|
|
8ae002 |
+
|
|
|
8ae002 |
+ with PAGE_SIZE being 4096 and ITER_SIZE begin 32. */
|
|
|
8ae002 |
+
|
|
|
8ae002 |
+ rldicl r7, r3, 0, 52
|
|
|
8ae002 |
+ rldicl r9, r4, 0, 52
|
|
|
8ae002 |
+ cmpldi cr7, r7, 4096-32
|
|
|
8ae002 |
+ bgt cr7, L(pagecross_check)
|
|
|
8ae002 |
+ cmpldi cr5, r9, 4096-32
|
|
|
8ae002 |
+ bgt cr5, L(pagecross_check)
|
|
|
8ae002 |
+
|
|
|
8ae002 |
+ /* For short strings up to 32 bytes, load both s1 and s2 using
|
|
|
8ae002 |
+ unaligned dwords and compare. */
|
|
|
8ae002 |
+ ld r8, 0(r3)
|
|
|
8ae002 |
+ ld r10, 0(r4)
|
|
|
8ae002 |
+ cmpb r12, r8, r0
|
|
|
8ae002 |
+ cmpb r11, r8, r10
|
|
|
8ae002 |
+ orc. r9, r12, r11
|
|
|
8ae002 |
+ bne cr0, L(different_nocmpb)
|
|
|
8ae002 |
+
|
|
|
8ae002 |
+ ld r8, 8(r3)
|
|
|
8ae002 |
+ ld r10, 8(r4)
|
|
|
8ae002 |
+ cmpb r12, r8, r0
|
|
|
8ae002 |
+ cmpb r11, r8, r10
|
|
|
8ae002 |
+ orc. r9, r12, r11
|
|
|
8ae002 |
+ bne cr0, L(different_nocmpb)
|
|
|
8ae002 |
+
|
|
|
8ae002 |
+ ld r8, 16(r3)
|
|
|
8ae002 |
+ ld r10, 16(r4)
|
|
|
8ae002 |
+ cmpb r12, r8, r0
|
|
|
8ae002 |
+ cmpb r11, r8, r10
|
|
|
8ae002 |
+ orc. r9, r12, r11
|
|
|
8ae002 |
+ bne cr0, L(different_nocmpb)
|
|
|
8ae002 |
+
|
|
|
8ae002 |
+ ld r8, 24(r3)
|
|
|
8ae002 |
+ ld r10, 24(r4)
|
|
|
8ae002 |
+ cmpb r12, r8, r0
|
|
|
8ae002 |
+ cmpb r11, r8, r10
|
|
|
8ae002 |
+ orc. r9, r12, r11
|
|
|
8ae002 |
+ bne cr0, L(different_nocmpb)
|
|
|
8ae002 |
+
|
|
|
8ae002 |
+ addi r7, r3, 32
|
|
|
8ae002 |
+ addi r4, r4, 32
|
|
|
8ae002 |
+
|
|
|
8ae002 |
+L(align):
|
|
|
8ae002 |
+ /* Now it has checked for first 32 bytes. */
|
|
|
8ae002 |
+ vspltisb v0, 0
|
|
|
8ae002 |
+ vspltisb v2, -1
|
|
|
8ae002 |
+ lvsr v6, 0, r4 /* Compute mask. */
|
|
|
8ae002 |
+ or r5, r4, r7
|
|
|
8ae002 |
+ andi. r5, r5, 0xF
|
|
|
8ae002 |
+ beq cr0, L(aligned)
|
|
|
8ae002 |
+ andi. r5, r7, 0xF
|
|
|
8ae002 |
+ beq cr0, L(s1_align)
|
|
|
8ae002 |
+ lvsr v10, 0, r7 /* Compute mask. */
|
|
|
8ae002 |
+
|
|
|
8ae002 |
+ /* Both s1 and s2 are unaligned. */
|
|
|
8ae002 |
+ GET16BYTES(v4, r7, v10)
|
|
|
8ae002 |
+ GET16BYTES(v5, r4, v6)
|
|
|
8ae002 |
+ VCMPNEZB(v7, v5, v4)
|
|
|
8ae002 |
+ beq cr6, L(match)
|
|
|
8ae002 |
+ b L(different)
|
|
|
8ae002 |
+
|
|
|
8ae002 |
+ /* Align s1 to qw and adjust s2 address. */
|
|
|
8ae002 |
+ .align 4
|
|
|
8ae002 |
+L(match):
|
|
|
8ae002 |
+ clrldi r6, r7, 60
|
|
|
8ae002 |
+ subfic r5, r6, 16
|
|
|
8ae002 |
+ add r7, r7, r5
|
|
|
8ae002 |
+ add r4, r4, r5
|
|
|
8ae002 |
+ andi. r5, r4, 0xF
|
|
|
8ae002 |
+ beq cr0, L(aligned)
|
|
|
8ae002 |
+ lvsr v6, 0, r4
|
|
|
8ae002 |
+ /* There are 2 loops depending on the input alignment.
|
|
|
8ae002 |
+ Each loop gets 16 bytes from s1 and s2 and compares.
|
|
|
8ae002 |
+ Loop until a mismatch or null occurs. */
|
|
|
8ae002 |
+L(s1_align):
|
|
|
8ae002 |
+ lvx v4, r7, r0
|
|
|
8ae002 |
+ GET16BYTES(v5, r4, v6)
|
|
|
8ae002 |
+ VCMPNEZB(v7, v5, v4)
|
|
|
8ae002 |
+ addi r7, r7, 16
|
|
|
8ae002 |
+ addi r4, r4, 16
|
|
|
8ae002 |
+ bne cr6, L(different)
|
|
|
8ae002 |
+
|
|
|
8ae002 |
+ lvx v4, r7, r0
|
|
|
8ae002 |
+ GET16BYTES(v5, r4, v6)
|
|
|
8ae002 |
+ VCMPNEZB(v7, v5, v4)
|
|
|
8ae002 |
+ addi r7, r7, 16
|
|
|
8ae002 |
+ addi r4, r4, 16
|
|
|
8ae002 |
+ bne cr6, L(different)
|
|
|
8ae002 |
+
|
|
|
8ae002 |
+ lvx v4, r7, r0
|
|
|
8ae002 |
+ GET16BYTES(v5, r4, v6)
|
|
|
8ae002 |
+ VCMPNEZB(v7, v5, v4)
|
|
|
8ae002 |
+ addi r7, r7, 16
|
|
|
8ae002 |
+ addi r4, r4, 16
|
|
|
8ae002 |
+ bne cr6, L(different)
|
|
|
8ae002 |
+
|
|
|
8ae002 |
+ lvx v4, r7, r0
|
|
|
8ae002 |
+ GET16BYTES(v5, r4, v6)
|
|
|
8ae002 |
+ VCMPNEZB(v7, v5, v4)
|
|
|
8ae002 |
+ addi r7, r7, 16
|
|
|
8ae002 |
+ addi r4, r4, 16
|
|
|
8ae002 |
+ beq cr6, L(s1_align)
|
|
|
8ae002 |
+ b L(different)
|
|
|
8ae002 |
+
|
|
|
8ae002 |
+ .align 4
|
|
|
8ae002 |
+L(aligned):
|
|
|
8ae002 |
+ lvx v4, 0, r7
|
|
|
8ae002 |
+ lvx v5, 0, r4
|
|
|
8ae002 |
+ VCMPNEZB(v7, v5, v4)
|
|
|
8ae002 |
+ addi r7, r7, 16
|
|
|
8ae002 |
+ addi r4, r4, 16
|
|
|
8ae002 |
+ bne cr6, L(different)
|
|
|
8ae002 |
+
|
|
|
8ae002 |
+ lvx v4, 0, r7
|
|
|
8ae002 |
+ lvx v5, 0, r4
|
|
|
8ae002 |
+ VCMPNEZB(v7, v5, v4)
|
|
|
8ae002 |
+ addi r7, r7, 16
|
|
|
8ae002 |
+ addi r4, r4, 16
|
|
|
8ae002 |
+ bne cr6, L(different)
|
|
|
8ae002 |
+
|
|
|
8ae002 |
+ lvx v4, 0, r7
|
|
|
8ae002 |
+ lvx v5, 0, r4
|
|
|
8ae002 |
+ VCMPNEZB(v7, v5, v4)
|
|
|
8ae002 |
+ addi r7, r7, 16
|
|
|
8ae002 |
+ addi r4, r4, 16
|
|
|
8ae002 |
+ bne cr6, L(different)
|
|
|
8ae002 |
+
|
|
|
8ae002 |
+ lvx v4, 0, r7
|
|
|
8ae002 |
+ lvx v5, 0, r4
|
|
|
8ae002 |
+ VCMPNEZB(v7, v5, v4)
|
|
|
8ae002 |
+ addi r7, r7, 16
|
|
|
8ae002 |
+ addi r4, r4, 16
|
|
|
8ae002 |
+ beq cr6, L(aligned)
|
|
|
8ae002 |
+
|
|
|
8ae002 |
+ /* Calculate and return the difference. */
|
|
|
8ae002 |
+L(different):
|
|
|
8ae002 |
+ VCTZLSBB(r6, v7)
|
|
|
8ae002 |
+ VEXTUBRX(r5, r6, v4)
|
|
|
8ae002 |
+ VEXTUBRX(r4, r6, v5)
|
|
|
8ae002 |
+ subf r3, r4, r5
|
|
|
8ae002 |
+ extsw r3, r3
|
|
|
8ae002 |
+ blr
|
|
|
8ae002 |
+
|
|
|
8ae002 |
+ .align 4
|
|
|
8ae002 |
+L(different_nocmpb):
|
|
|
8ae002 |
+ neg r3, r9
|
|
|
8ae002 |
+ and r9, r9, r3
|
|
|
8ae002 |
+ cntlzd r9, r9
|
|
|
8ae002 |
+ subfic r9, r9, 63
|
|
|
8ae002 |
+ srd r3, r8, r9
|
|
|
8ae002 |
+ srd r10, r10, r9
|
|
|
8ae002 |
+ rldicl r10, r10, 0, 56
|
|
|
8ae002 |
+ rldicl r3, r3, 0, 56
|
|
|
8ae002 |
+ subf r3, r10, r3
|
|
|
8ae002 |
+ extsw r3, r3
|
|
|
8ae002 |
+ blr
|
|
|
8ae002 |
+
|
|
|
8ae002 |
+ .align 4
|
|
|
8ae002 |
+L(pagecross_check):
|
|
|
8ae002 |
+ subfic r9, r9, 4096
|
|
|
8ae002 |
+ subfic r7, r7, 4096
|
|
|
8ae002 |
+ cmpld cr7, r7, r9
|
|
|
8ae002 |
+ bge cr7, L(pagecross)
|
|
|
8ae002 |
+ mr r7, r9
|
|
|
8ae002 |
+
|
|
|
8ae002 |
+ /* If unaligned 16 bytes reads across a 4K page boundary, it uses
|
|
|
8ae002 |
+ a simple byte a byte comparison until the page alignment for s1
|
|
|
8ae002 |
+ is reached. */
|
|
|
8ae002 |
+L(pagecross):
|
|
|
8ae002 |
+ add r7, r3, r7
|
|
|
8ae002 |
+ subf r9, r3, r7
|
|
|
8ae002 |
+ mtctr r9
|
|
|
8ae002 |
+
|
|
|
8ae002 |
+ .align 4
|
|
|
8ae002 |
+L(pagecross_loop):
|
|
|
8ae002 |
+ /* Loads a byte from s1 and s2, compare if *s1 is equal to *s2
|
|
|
8ae002 |
+ and if *s1 is '\0'. */
|
|
|
8ae002 |
+ lbz r9, 0(r3)
|
|
|
8ae002 |
+ lbz r10, 0(r4)
|
|
|
8ae002 |
+ addi r3, r3, 1
|
|
|
8ae002 |
+ addi r4, r4, 1
|
|
|
8ae002 |
+ cmplw cr7, r9, r10
|
|
|
8ae002 |
+ cmpdi cr5, r9, r0
|
|
|
8ae002 |
+ bne cr7, L(pagecross_ne)
|
|
|
8ae002 |
+ beq cr5, L(pagecross_nullfound)
|
|
|
8ae002 |
+ bdnz L(pagecross_loop)
|
|
|
8ae002 |
+ b L(align)
|
|
|
8ae002 |
+
|
|
|
8ae002 |
+ .align 4
|
|
|
8ae002 |
+L(pagecross_ne):
|
|
|
8ae002 |
+ extsw r3, r9
|
|
|
8ae002 |
+ mr r9, r10
|
|
|
8ae002 |
+L(pagecross_retdiff):
|
|
|
8ae002 |
+ subf r9, r9, r3
|
|
|
8ae002 |
+ extsw r3, r9
|
|
|
8ae002 |
+ blr
|
|
|
8ae002 |
+
|
|
|
8ae002 |
+ .align 4
|
|
|
8ae002 |
+L(pagecross_nullfound):
|
|
|
8ae002 |
+ li r3, 0
|
|
|
8ae002 |
+ b L(pagecross_retdiff)
|
|
|
8ae002 |
+END (strcmp)
|
|
|
8ae002 |
+libc_hidden_builtin_def (strcmp)
|
|
|
8ae002 |
+#else
|
|
|
8ae002 |
+#include <sysdeps/powerpc/powerpc64/power8/strcmp.S>
|
|
|
8ae002 |
+#endif
|
|
|
8ae002 |
--
|
|
|
8ae002 |
2.1.0
|
|
|
8ae002 |
|