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From 0058b10814afd8f1ea031b11f3c4ac226fa60d79 Mon Sep 17 00:00:00 2001
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From: Wangyang Guo <wangyang.guo@intel.com>
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Date: Mon, 24 Jan 2022 02:59:56 +0000
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Subject: [PATCH] Only avoid short distance REP MOVSB on ICX
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---
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sysdeps/x86/cacheinfo.h | 9 +++++++++
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sysdeps/x86/cpu-features.c | 5 +++++
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.../include/cpu-features-preferred_feature_index_1.def | 1 +
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sysdeps/x86/sysdep.h | 3 +++
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sysdeps/x86_64/multiarch/memmove-vec-unaligned-erms.S | 5 +++++
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5 files changed, 23 insertions(+)
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diff --git a/sysdeps/x86/cacheinfo.h b/sysdeps/x86/cacheinfo.h
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index 02556961..7af8575d 100644
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--- a/sysdeps/x86/cacheinfo.h
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+++ b/sysdeps/x86/cacheinfo.h
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@@ -45,6 +45,11 @@ long int __x86_rep_movsb_threshold attribute_hidden = 2048;
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/* Threshold to use Enhanced REP STOSB. */
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long int __x86_rep_stosb_threshold attribute_hidden = 2048;
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+/* Non-zero to avoid short distance REP MOVSB. */
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+//int __x86_avoid_short_distance_rep_movsb attribute_hidden;
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+/* String/memory function control. */
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+int __x86_string_control attribute_hidden;
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+
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static void
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get_common_cache_info (long int *shared_ptr, unsigned int *threads_ptr,
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long int core)
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@@ -421,6 +426,10 @@ init_cacheinfo (void)
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else
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__x86_rep_movsb_threshold = rep_movsb_threshold;
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+ if (CPU_FEATURES_ARCH_P (cpu_features, Avoid_Short_Distance_REP_MOVSB))
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+ __x86_string_control
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+ |= X86_STRING_CONTROL_AVOID_SHORT_DISTANCE_REP_MOVSB;
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+
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# if HAVE_TUNABLES
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__x86_rep_stosb_threshold = cpu_features->rep_stosb_threshold;
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# endif
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diff --git a/sysdeps/x86/cpu-features.c b/sysdeps/x86/cpu-features.c
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index 91042505..22b45c72 100644
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--- a/sysdeps/x86/cpu-features.c
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+++ b/sysdeps/x86/cpu-features.c
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@@ -526,6 +526,11 @@ init_cpu_features (struct cpu_features *cpu_features)
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else
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cpu_features->preferred[index_arch_Prefer_No_AVX512]
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|= bit_arch_Prefer_No_AVX512;
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+
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+ /* Avoid avoid short distance REP MOVSB on processor with FSRM. */
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+ if (CPU_FEATURES_CPU_P (cpu_features, FSRM))
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+ cpu_features->preferred[index_arch_Avoid_Short_Distance_REP_MOVSB]
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+ |= bit_arch_Avoid_Short_Distance_REP_MOVSB;
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}
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/* This spells out "AuthenticAMD". */
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else if (ebx == 0x68747541 && ecx == 0x444d4163 && edx == 0x69746e65)
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diff --git a/sysdeps/x86/include/cpu-features-preferred_feature_index_1.def b/sysdeps/x86/include/cpu-features-preferred_feature_index_1.def
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index 17a5cc42..e7277b33 100644
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--- a/sysdeps/x86/include/cpu-features-preferred_feature_index_1.def
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+++ b/sysdeps/x86/include/cpu-features-preferred_feature_index_1.def
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@@ -32,3 +32,4 @@ BIT (Prefer_ERMS)
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BIT (Prefer_FSRM)
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BIT (Prefer_No_AVX512)
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BIT (MathVec_Prefer_No_AVX512)
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+BIT (Avoid_Short_Distance_REP_MOVSB)
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diff --git a/sysdeps/x86/sysdep.h b/sysdeps/x86/sysdep.h
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index f41f4ebd..4ac93a95 100644
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--- a/sysdeps/x86/sysdep.h
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+++ b/sysdeps/x86/sysdep.h
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@@ -57,6 +57,9 @@ enum cf_protection_level
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#define STATE_SAVE_MASK \
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((1 << 1) | (1 << 2) | (1 << 3) | (1 << 5) | (1 << 6) | (1 << 7))
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+/* Avoid short distance REP MOVSB. */
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+#define X86_STRING_CONTROL_AVOID_SHORT_DISTANCE_REP_MOVSB (1 << 0)
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+
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#ifdef __ASSEMBLER__
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/* Syntactic details of assembler. */
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diff --git a/sysdeps/x86_64/multiarch/memmove-vec-unaligned-erms.S b/sysdeps/x86_64/multiarch/memmove-vec-unaligned-erms.S
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index 07299dc0..4aa65555 100644
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--- a/sysdeps/x86_64/multiarch/memmove-vec-unaligned-erms.S
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+++ b/sysdeps/x86_64/multiarch/memmove-vec-unaligned-erms.S
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@@ -244,12 +244,16 @@ L(movsb):
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/* Avoid slow backward REP MOVSB. */
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jb L(more_8x_vec_backward)
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# if AVOID_SHORT_DISTANCE_REP_MOVSB
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+ andl $X86_STRING_CONTROL_AVOID_SHORT_DISTANCE_REP_MOVSB, __x86_string_control(%rip)
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+ jz 3f
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movq %rdi, %rcx
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subq %rsi, %rcx
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jmp 2f
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# endif
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1:
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# if AVOID_SHORT_DISTANCE_REP_MOVSB
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+ andl $X86_STRING_CONTROL_AVOID_SHORT_DISTANCE_REP_MOVSB, __x86_string_control(%rip)
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+ jz 3f
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movq %rsi, %rcx
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subq %rdi, %rcx
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2:
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@@ -257,6 +261,7 @@ L(movsb):
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is N*4GB + [1..63] with N >= 0. */
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cmpl $63, %ecx
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jbe L(more_2x_vec) /* Avoid "rep movsb" if ECX <= 63. */
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+3:
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# endif
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movq %rdx, %rcx
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rep movsb
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--
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2.27.0
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