Blame SOURCES/gdb-test-ivy-bridge.patch

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From FEDORA_PATCHES Mon Sep 17 00:00:00 2001
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From: Fedora GDB patches <invalid@email.com>
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Date: Fri, 27 Oct 2017 21:07:50 +0200
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Subject: gdb-test-ivy-bridge.patch
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;; Test GDB opcodes/ disassembly of Intel Ivy Bridge instructions (BZ 696890).
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;;=fedoratest
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diff --git a/gdb/testsuite/gdb.arch/amd64-ivy-bridge.S b/gdb/testsuite/gdb.arch/amd64-ivy-bridge.S
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new file mode 100644
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--- /dev/null
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+++ b/gdb/testsuite/gdb.arch/amd64-ivy-bridge.S
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@@ -0,0 +1,98 @@
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+/* Copyright 2011 Free Software Foundation, Inc.
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+
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+   This program is free software; you can redistribute it and/or modify
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+   it under the terms of the GNU General Public License as published by
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+   the Free Software Foundation; either version 3 of the License, or
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+   (at your option) any later version.
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+
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+   This program is distributed in the hope that it will be useful,
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+   but WITHOUT ANY WARRANTY; without even the implied warranty of
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+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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+   GNU General Public License for more details.
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+
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+   You should have received a copy of the GNU General Public License
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+   along with this program.  If not, see <http://www.gnu.org/licenses/>.
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+
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+   This file is part of the gdb testsuite.  */
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+
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+	.globl _start
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+_start:	.text
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+
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+/* gas/i386/x86-64-rdrnd.s */
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+	.att_syntax prefix
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+	rdrand %bx
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+	rdrand %ebx
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+	rdrand %rbx
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+	rdrand %r8w
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+	rdrand %r8d
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+	rdrand %r8
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+
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+	.intel_syntax noprefix
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+	rdrand bx
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+	rdrand ebx
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+	rdrand rbx
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+	rdrand r8w
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+	rdrand r8d
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+	rdrand r8
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+
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+/* gas/i386/x86-64-f16c.s */
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+	.att_syntax prefix
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+	vcvtph2ps %xmm4,%ymm4
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+	vcvtph2ps (%r8),%ymm8
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+	vcvtph2ps %xmm4,%xmm6
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+	vcvtph2ps (%rcx),%xmm4
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+	vcvtps2ph $0x2,%ymm4,%xmm4
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+	vcvtps2ph $0x2,%ymm8,(%r8)
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+	vcvtps2ph $0x2,%xmm4,%xmm4
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+	vcvtps2ph $0x2,%xmm4,(%rcx)
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+
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+	.intel_syntax noprefix
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+	vcvtph2ps ymm4,xmm4
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+	vcvtph2ps ymm8,XMMWORD PTR [r8]
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+	vcvtph2ps ymm4,[rcx]
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+	vcvtph2ps xmm6,xmm4
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+	vcvtph2ps xmm4,QWORD PTR [rcx]
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+	vcvtph2ps xmm4,[rcx]
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+	vcvtps2ph xmm4,ymm4,0x2
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+	vcvtps2ph XMMWORD PTR [rcx],ymm4,0x2
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+	vcvtps2ph [rcx],ymm4,0x2
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+	vcvtps2ph xmm4,xmm4,0x2
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+	vcvtps2ph QWORD PTR [r8],xmm8,0x2
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+	vcvtps2ph [rcx],xmm4,0x2
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+
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+/* gas/i386/x86-64-fsgs.s */
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+	.att_syntax prefix
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+	rdfsbase %ebx
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+	rdfsbase %rbx
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+	rdfsbase %r8d
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+	rdfsbase %r8
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+	rdgsbase %ebx
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+	rdgsbase %rbx
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+	rdgsbase %r8d
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+	rdgsbase %r8
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+	wrfsbase %ebx
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+	wrfsbase %rbx
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+	wrfsbase %r8d
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+	wrfsbase %r8
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+	wrgsbase %ebx
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+	wrgsbase %rbx
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+	wrgsbase %r8d
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+	wrgsbase %r8
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+
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+	.intel_syntax noprefix
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+	rdfsbase ebx
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+	rdfsbase rbx
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+	rdfsbase r8d
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+	rdfsbase r8
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+	rdgsbase ebx
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+	rdgsbase rbx
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+	rdgsbase r8d
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+	rdgsbase r8
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+	wrfsbase ebx
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+	wrfsbase rbx
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+	wrfsbase r8d
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+	wrfsbase r8
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+	wrgsbase ebx
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+	wrgsbase rbx
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+	wrgsbase r8d
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+	wrgsbase r8
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diff --git a/gdb/testsuite/gdb.arch/amd64-ivy-bridge.exp b/gdb/testsuite/gdb.arch/amd64-ivy-bridge.exp
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new file mode 100644
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--- /dev/null
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+++ b/gdb/testsuite/gdb.arch/amd64-ivy-bridge.exp
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@@ -0,0 +1,170 @@
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+# Copyright 2011 Free Software Foundation, Inc.
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+
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+# This program is free software; you can redistribute it and/or modify
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+# it under the terms of the GNU General Public License as published by
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+# the Free Software Foundation; either version 3 of the License, or
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+# (at your option) any later version.
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+#
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+# This program is distributed in the hope that it will be useful,
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+# but WITHOUT ANY WARRANTY; without even the implied warranty of
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+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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+# GNU General Public License for more details.
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+#
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+# You should have received a copy of the GNU General Public License
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+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
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+
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+if {![istarget "x86_64-*-*"]} then {
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+    return
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+}
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+
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+set testfile amd64-ivy-bridge
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+set test compilation
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+if [prepare_for_testing ${testfile}.exp ${testfile}.x ${testfile}.S [list debug "additional_flags=-m64 -nostdlib"]] {
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+    unsupported $test
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+    return -1
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+}
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+pass $test
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+
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+gdb_test_no_output "set disassembly-flavor att"
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+# gas/i386/x86-64-rdrnd.d
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+# gas/i386/x86-64-f16c.d
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+# gas/i386/x86-64-fsgs.d
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+gdb_test "disassemble/r _start" "\r
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+Dump of assembler code for function _start:\r
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+\[^\r\n\]+:\t66 0f c7 f3\t\(             \)?rdrand %bx\r
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+\[^\r\n\]+:\t0f c7 f3\t\(                \)?rdrand %ebx\r
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+\[^\r\n\]+:\t48 0f c7 f3\t\(             \)?rdrand %rbx\r
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+\[^\r\n\]+:\t66 41 0f c7 f0\t\(          \)?rdrand %r8w\r
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+\[^\r\n\]+:\t41 0f c7 f0\t\(             \)?rdrand %r8d\r
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+\[^\r\n\]+:\t49 0f c7 f0\t\(             \)?rdrand %r8\r
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+\[^\r\n\]+:\t66 0f c7 f3\t\(             \)?rdrand %bx\r
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+\[^\r\n\]+:\t0f c7 f3\t\(                \)?rdrand %ebx\r
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+\[^\r\n\]+:\t48 0f c7 f3\t\(             \)?rdrand %rbx\r
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+\[^\r\n\]+:\t66 41 0f c7 f0\t\(          \)?rdrand %r8w\r
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+\[^\r\n\]+:\t41 0f c7 f0\t\(             \)?rdrand %r8d\r
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+\[^\r\n\]+:\t49 0f c7 f0\t\(             \)?rdrand %r8\r
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+\[^\r\n\]+:\tc4 e2 7d 13 e4\t\(          \)?vcvtph2ps %xmm4,%ymm4\r
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+\[^\r\n\]+:\tc4 42 7d 13 00\t\(          \)?vcvtph2ps \\(%r8\\),%ymm8\r
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+\[^\r\n\]+:\tc4 e2 79 13 f4\t\(          \)?vcvtph2ps %xmm4,%xmm6\r
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+\[^\r\n\]+:\tc4 e2 79 13 21\t\(          \)?vcvtph2ps \\(%rcx\\),%xmm4\r
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+\[^\r\n\]+:\tc4 e3 7d 1d e4 02\t\(       \)?vcvtps2ph \\\$0x2,%ymm4,%xmm4\r
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+\[^\r\n\]+:\tc4 43 7d 1d 00 02\t\(       \)?vcvtps2ph \\\$0x2,%ymm8,\\(%r8\\)\r
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+\[^\r\n\]+:\tc4 e3 79 1d e4 02\t\(       \)?vcvtps2ph \\\$0x2,%xmm4,%xmm4\r
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+\[^\r\n\]+:\tc4 e3 79 1d 21 02\t\(       \)?vcvtps2ph \\\$0x2,%xmm4,\\(%rcx\\)\r
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+\[^\r\n\]+:\tc4 e2 7d 13 e4\t\(          \)?vcvtph2ps %xmm4,%ymm4\r
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+\[^\r\n\]+:\tc4 42 7d 13 00\t\(          \)?vcvtph2ps \\(%r8\\),%ymm8\r
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+\[^\r\n\]+:\tc4 e2 7d 13 21\t\(          \)?vcvtph2ps \\(%rcx\\),%ymm4\r
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+\[^\r\n\]+:\tc4 e2 79 13 f4\t\(          \)?vcvtph2ps %xmm4,%xmm6\r
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+\[^\r\n\]+:\tc4 e2 79 13 21\t\(          \)?vcvtph2ps \\(%rcx\\),%xmm4\r
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+\[^\r\n\]+:\tc4 e2 79 13 21\t\(          \)?vcvtph2ps \\(%rcx\\),%xmm4\r
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+\[^\r\n\]+:\tc4 e3 7d 1d e4 02\t\(       \)?vcvtps2ph \\\$0x2,%ymm4,%xmm4\r
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+\[^\r\n\]+:\tc4 e3 7d 1d 21 02\t\(       \)?vcvtps2ph \\\$0x2,%ymm4,\\(%rcx\\)\r
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+\[^\r\n\]+:\tc4 e3 7d 1d 21 02\t\(       \)?vcvtps2ph \\\$0x2,%ymm4,\\(%rcx\\)\r
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+\[^\r\n\]+:\tc4 e3 79 1d e4 02\t\(       \)?vcvtps2ph \\\$0x2,%xmm4,%xmm4\r
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+\[^\r\n\]+:\tc4 43 79 1d 00 02\t\(       \)?vcvtps2ph \\\$0x2,%xmm8,\\(%r8\\)\r
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+\[^\r\n\]+:\tc4 e3 79 1d 21 02\t\(       \)?vcvtps2ph \\\$0x2,%xmm4,\\(%rcx\\)\r
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+\[^\r\n\]+:\tf3 0f ae c3\t\(             \)?rdfsbase %ebx\r
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+\[^\r\n\]+:\tf3 48 0f ae c3\t\(          \)?rdfsbase %rbx\r
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+\[^\r\n\]+:\tf3 41 0f ae c0\t\(          \)?rdfsbase %r8d\r
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+\[^\r\n\]+:\tf3 49 0f ae c0\t\(          \)?rdfsbase %r8\r
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+\[^\r\n\]+:\tf3 0f ae cb\t\(             \)?rdgsbase %ebx\r
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+\[^\r\n\]+:\tf3 48 0f ae cb\t\(          \)?rdgsbase %rbx\r
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+\[^\r\n\]+:\tf3 41 0f ae c8\t\(          \)?rdgsbase %r8d\r
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+\[^\r\n\]+:\tf3 49 0f ae c8\t\(          \)?rdgsbase %r8\r
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+\[^\r\n\]+:\tf3 0f ae d3\t\(             \)?wrfsbase %ebx\r
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+\[^\r\n\]+:\tf3 48 0f ae d3\t\(          \)?wrfsbase %rbx\r
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+\[^\r\n\]+:\tf3 41 0f ae d0\t\(          \)?wrfsbase %r8d\r
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+\[^\r\n\]+:\tf3 49 0f ae d0\t\(          \)?wrfsbase %r8\r
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+\[^\r\n\]+:\tf3 0f ae db\t\(             \)?wrgsbase %ebx\r
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+\[^\r\n\]+:\tf3 48 0f ae db\t\(          \)?wrgsbase %rbx\r
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+\[^\r\n\]+:\tf3 41 0f ae d8\t\(          \)?wrgsbase %r8d\r
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+\[^\r\n\]+:\tf3 49 0f ae d8\t\(          \)?wrgsbase %r8\r
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+\[^\r\n\]+:\tf3 0f ae c3\t\(             \)?rdfsbase %ebx\r
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+\[^\r\n\]+:\tf3 48 0f ae c3\t\(          \)?rdfsbase %rbx\r
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+\[^\r\n\]+:\tf3 41 0f ae c0\t\(          \)?rdfsbase %r8d\r
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+\[^\r\n\]+:\tf3 49 0f ae c0\t\(          \)?rdfsbase %r8\r
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+\[^\r\n\]+:\tf3 0f ae cb\t\(             \)?rdgsbase %ebx\r
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+\[^\r\n\]+:\tf3 48 0f ae cb\t\(          \)?rdgsbase %rbx\r
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+\[^\r\n\]+:\tf3 41 0f ae c8\t\(          \)?rdgsbase %r8d\r
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+\[^\r\n\]+:\tf3 49 0f ae c8\t\(          \)?rdgsbase %r8\r
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+\[^\r\n\]+:\tf3 0f ae d3\t\(             \)?wrfsbase %ebx\r
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+\[^\r\n\]+:\tf3 48 0f ae d3\t\(          \)?wrfsbase %rbx\r
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+\[^\r\n\]+:\tf3 41 0f ae d0\t\(          \)?wrfsbase %r8d\r
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+\[^\r\n\]+:\tf3 49 0f ae d0\t\(          \)?wrfsbase %r8\r
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+\[^\r\n\]+:\tf3 0f ae db\t\(             \)?wrgsbase %ebx\r
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+\[^\r\n\]+:\tf3 48 0f ae db\t\(          \)?wrgsbase %rbx\r
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+\[^\r\n\]+:\tf3 41 0f ae d8\t\(          \)?wrgsbase %r8d\r
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+\[^\r\n\]+:\tf3 49 0f ae d8\t\(          \)?wrgsbase %r8\r
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+End of assembler dump\\." "att"
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+
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+gdb_test_no_output "set disassembly-flavor intel"
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+# gas/i386/x86-64-rdrnd-intel.d
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+# gas/i386/x86-64-f16c-intel.d
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+# gas/i386/x86-64-fsgs-intel.d
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+gdb_test "disassemble/r _start" "\r
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+Dump of assembler code for function _start:\r
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+\[^\r\n\]+:\t66 0f c7 f3\t\(             \)?rdrand bx\r
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+\[^\r\n\]+:\t0f c7 f3\t\(                \)?rdrand ebx\r
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+\[^\r\n\]+:\t48 0f c7 f3\t\(             \)?rdrand rbx\r
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+\[^\r\n\]+:\t66 41 0f c7 f0\t\(          \)?rdrand r8w\r
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+\[^\r\n\]+:\t41 0f c7 f0\t\(             \)?rdrand r8d\r
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+\[^\r\n\]+:\t49 0f c7 f0\t\(             \)?rdrand r8\r
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+\[^\r\n\]+:\t66 0f c7 f3\t\(             \)?rdrand bx\r
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+\[^\r\n\]+:\t0f c7 f3\t\(                \)?rdrand ebx\r
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+\[^\r\n\]+:\t48 0f c7 f3\t\(             \)?rdrand rbx\r
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+\[^\r\n\]+:\t66 41 0f c7 f0\t\(          \)?rdrand r8w\r
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+\[^\r\n\]+:\t41 0f c7 f0\t\(             \)?rdrand r8d\r
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+\[^\r\n\]+:\t49 0f c7 f0\t\(             \)?rdrand r8\r
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+\[^\r\n\]+:\tc4 e2 7d 13 e4\t\(          \)?vcvtph2ps ymm4,xmm4\r
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+\[^\r\n\]+:\tc4 42 7d 13 00\t\(          \)?vcvtph2ps ymm8,XMMWORD PTR \\\[r8\\\]\r
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+\[^\r\n\]+:\tc4 e2 79 13 f4\t\(          \)?vcvtph2ps xmm6,xmm4\r
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+\[^\r\n\]+:\tc4 e2 79 13 21\t\(          \)?vcvtph2ps xmm4,QWORD PTR \\\[rcx\\\]\r
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+\[^\r\n\]+:\tc4 e3 7d 1d e4 02\t\(       \)?vcvtps2ph xmm4,ymm4,0x2\r
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+\[^\r\n\]+:\tc4 43 7d 1d 00 02\t\(       \)?vcvtps2ph XMMWORD PTR \\\[r8\\\],ymm8,0x2\r
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+\[^\r\n\]+:\tc4 e3 79 1d e4 02\t\(       \)?vcvtps2ph xmm4,xmm4,0x2\r
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+\[^\r\n\]+:\tc4 e3 79 1d 21 02\t\(       \)?vcvtps2ph QWORD PTR \\\[rcx\\\],xmm4,0x2\r
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+\[^\r\n\]+:\tc4 e2 7d 13 e4\t\(          \)?vcvtph2ps ymm4,xmm4\r
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+\[^\r\n\]+:\tc4 42 7d 13 00\t\(          \)?vcvtph2ps ymm8,XMMWORD PTR \\\[r8\\\]\r
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+\[^\r\n\]+:\tc4 e2 7d 13 21\t\(          \)?vcvtph2ps ymm4,XMMWORD PTR \\\[rcx\\\]\r
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+\[^\r\n\]+:\tc4 e2 79 13 f4\t\(          \)?vcvtph2ps xmm6,xmm4\r
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+\[^\r\n\]+:\tc4 e2 79 13 21\t\(          \)?vcvtph2ps xmm4,QWORD PTR \\\[rcx\\\]\r
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+\[^\r\n\]+:\tc4 e2 79 13 21\t\(          \)?vcvtph2ps xmm4,QWORD PTR \\\[rcx\\\]\r
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+\[^\r\n\]+:\tc4 e3 7d 1d e4 02\t\(       \)?vcvtps2ph xmm4,ymm4,0x2\r
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+\[^\r\n\]+:\tc4 e3 7d 1d 21 02\t\(       \)?vcvtps2ph XMMWORD PTR \\\[rcx\\\],ymm4,0x2\r
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+\[^\r\n\]+:\tc4 e3 7d 1d 21 02\t\(       \)?vcvtps2ph XMMWORD PTR \\\[rcx\\\],ymm4,0x2\r
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+\[^\r\n\]+:\tc4 e3 79 1d e4 02\t\(       \)?vcvtps2ph xmm4,xmm4,0x2\r
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+\[^\r\n\]+:\tc4 43 79 1d 00 02\t\(       \)?vcvtps2ph QWORD PTR \\\[r8\\\],xmm8,0x2\r
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+\[^\r\n\]+:\tc4 e3 79 1d 21 02\t\(       \)?vcvtps2ph QWORD PTR \\\[rcx\\\],xmm4,0x2\r
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+\[^\r\n\]+:\tf3 0f ae c3\t\(             \)?rdfsbase ebx\r
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+\[^\r\n\]+:\tf3 48 0f ae c3\t\(          \)?rdfsbase rbx\r
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+\[^\r\n\]+:\tf3 41 0f ae c0\t\(          \)?rdfsbase r8d\r
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+\[^\r\n\]+:\tf3 49 0f ae c0\t\(          \)?rdfsbase r8\r
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+\[^\r\n\]+:\tf3 0f ae cb\t\(             \)?rdgsbase ebx\r
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+\[^\r\n\]+:\tf3 48 0f ae cb\t\(          \)?rdgsbase rbx\r
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+\[^\r\n\]+:\tf3 41 0f ae c8\t\(          \)?rdgsbase r8d\r
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+\[^\r\n\]+:\tf3 49 0f ae c8\t\(          \)?rdgsbase r8\r
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+\[^\r\n\]+:\tf3 0f ae d3\t\(             \)?wrfsbase ebx\r
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+\[^\r\n\]+:\tf3 48 0f ae d3\t\(          \)?wrfsbase rbx\r
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+\[^\r\n\]+:\tf3 41 0f ae d0\t\(          \)?wrfsbase r8d\r
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+\[^\r\n\]+:\tf3 49 0f ae d0\t\(          \)?wrfsbase r8\r
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+\[^\r\n\]+:\tf3 0f ae db\t\(             \)?wrgsbase ebx\r
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+\[^\r\n\]+:\tf3 48 0f ae db\t\(          \)?wrgsbase rbx\r
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+\[^\r\n\]+:\tf3 41 0f ae d8\t\(          \)?wrgsbase r8d\r
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+\[^\r\n\]+:\tf3 49 0f ae d8\t\(          \)?wrgsbase r8\r
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+\[^\r\n\]+:\tf3 0f ae c3\t\(             \)?rdfsbase ebx\r
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+\[^\r\n\]+:\tf3 48 0f ae c3\t\(          \)?rdfsbase rbx\r
4a80f0
+\[^\r\n\]+:\tf3 41 0f ae c0\t\(          \)?rdfsbase r8d\r
4a80f0
+\[^\r\n\]+:\tf3 49 0f ae c0\t\(          \)?rdfsbase r8\r
4a80f0
+\[^\r\n\]+:\tf3 0f ae cb\t\(             \)?rdgsbase ebx\r
4a80f0
+\[^\r\n\]+:\tf3 48 0f ae cb\t\(          \)?rdgsbase rbx\r
4a80f0
+\[^\r\n\]+:\tf3 41 0f ae c8\t\(          \)?rdgsbase r8d\r
4a80f0
+\[^\r\n\]+:\tf3 49 0f ae c8\t\(          \)?rdgsbase r8\r
4a80f0
+\[^\r\n\]+:\tf3 0f ae d3\t\(             \)?wrfsbase ebx\r
4a80f0
+\[^\r\n\]+:\tf3 48 0f ae d3\t\(          \)?wrfsbase rbx\r
4a80f0
+\[^\r\n\]+:\tf3 41 0f ae d0\t\(          \)?wrfsbase r8d\r
4a80f0
+\[^\r\n\]+:\tf3 49 0f ae d0\t\(          \)?wrfsbase r8\r
4a80f0
+\[^\r\n\]+:\tf3 0f ae db\t\(             \)?wrgsbase ebx\r
4a80f0
+\[^\r\n\]+:\tf3 48 0f ae db\t\(          \)?wrgsbase rbx\r
4a80f0
+\[^\r\n\]+:\tf3 41 0f ae d8\t\(          \)?wrgsbase r8d\r
4a80f0
+\[^\r\n\]+:\tf3 49 0f ae d8\t\(          \)?wrgsbase r8\r
4a80f0
+End of assembler dump\\." "intel"
4a80f0
diff --git a/gdb/testsuite/gdb.arch/i386-ivy-bridge.S b/gdb/testsuite/gdb.arch/i386-ivy-bridge.S
4a80f0
new file mode 100644
4a80f0
--- /dev/null
4a80f0
+++ b/gdb/testsuite/gdb.arch/i386-ivy-bridge.S
4a80f0
@@ -0,0 +1,66 @@
4a80f0
+/* Copyright 2011 Free Software Foundation, Inc.
4a80f0
+
4a80f0
+   This program is free software; you can redistribute it and/or modify
4a80f0
+   it under the terms of the GNU General Public License as published by
4a80f0
+   the Free Software Foundation; either version 3 of the License, or
4a80f0
+   (at your option) any later version.
4a80f0
+
4a80f0
+   This program is distributed in the hope that it will be useful,
4a80f0
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
4a80f0
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
4a80f0
+   GNU General Public License for more details.
4a80f0
+
4a80f0
+   You should have received a copy of the GNU General Public License
4a80f0
+   along with this program.  If not, see <http://www.gnu.org/licenses/>.
4a80f0
+
4a80f0
+   This file is part of the gdb testsuite.  */
4a80f0
+
4a80f0
+	.globl _start
4a80f0
+_start:	.text
4a80f0
+
4a80f0
+/* gas/i386/rdrnd.s */
4a80f0
+	.att_syntax prefix
4a80f0
+	rdrand %bx
4a80f0
+	rdrand %ebx
4a80f0
+
4a80f0
+	.intel_syntax noprefix
4a80f0
+	rdrand bx
4a80f0
+	rdrand ebx
4a80f0
+
4a80f0
+/* gas/i386/f16c.s */
4a80f0
+	.att_syntax prefix
4a80f0
+	vcvtph2ps %xmm4,%ymm4
4a80f0
+	vcvtph2ps (%ecx),%ymm4
4a80f0
+	vcvtph2ps %xmm4,%xmm6
4a80f0
+	vcvtph2ps (%ecx),%xmm4
4a80f0
+	vcvtps2ph $0x2,%ymm4,%xmm4
4a80f0
+	vcvtps2ph $0x2,%ymm4,(%ecx)
4a80f0
+	vcvtps2ph $0x2,%xmm4,%xmm4
4a80f0
+	vcvtps2ph $0x2,%xmm4,(%ecx)
4a80f0
+
4a80f0
+	.intel_syntax noprefix
4a80f0
+	vcvtph2ps ymm4,xmm4
4a80f0
+	vcvtph2ps ymm4,XMMWORD PTR [ecx]
4a80f0
+	vcvtph2ps ymm4,[ecx]
4a80f0
+	vcvtph2ps xmm6,xmm4
4a80f0
+	vcvtph2ps xmm4,QWORD PTR [ecx]
4a80f0
+	vcvtph2ps xmm4,[ecx]
4a80f0
+	vcvtps2ph xmm4,ymm4,0x2
4a80f0
+	vcvtps2ph XMMWORD PTR [ecx],ymm4,0x2
4a80f0
+	vcvtps2ph [ecx],ymm4,0x2
4a80f0
+	vcvtps2ph xmm4,xmm4,0x2
4a80f0
+	vcvtps2ph QWORD PTR [ecx],xmm4,0x2
4a80f0
+	vcvtps2ph [ecx],xmm4,0x2
4a80f0
+
4a80f0
+/* gas/i386/fsgs.s */
4a80f0
+	.att_syntax prefix
4a80f0
+	rdfsbase %ebx
4a80f0
+	rdgsbase %ebx
4a80f0
+	wrfsbase %ebx
4a80f0
+	wrgsbase %ebx
4a80f0
+
4a80f0
+	.intel_syntax noprefix
4a80f0
+	rdfsbase ebx
4a80f0
+	rdgsbase ebx
4a80f0
+	wrfsbase ebx
4a80f0
+	wrgsbase ebx
4a80f0
diff --git a/gdb/testsuite/gdb.arch/i386-ivy-bridge.exp b/gdb/testsuite/gdb.arch/i386-ivy-bridge.exp
4a80f0
new file mode 100644
4a80f0
--- /dev/null
4a80f0
+++ b/gdb/testsuite/gdb.arch/i386-ivy-bridge.exp
4a80f0
@@ -0,0 +1,106 @@
4a80f0
+# Copyright 2011 Free Software Foundation, Inc.
4a80f0
+
4a80f0
+# This program is free software; you can redistribute it and/or modify
4a80f0
+# it under the terms of the GNU General Public License as published by
4a80f0
+# the Free Software Foundation; either version 3 of the License, or
4a80f0
+# (at your option) any later version.
4a80f0
+#
4a80f0
+# This program is distributed in the hope that it will be useful,
4a80f0
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
4a80f0
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
4a80f0
+# GNU General Public License for more details.
4a80f0
+#
4a80f0
+# You should have received a copy of the GNU General Public License
4a80f0
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
4a80f0
+
4a80f0
+if {![istarget "x86_64-*-*"] && ![istarget "i?86-*-*"]} then {
4a80f0
+    return
4a80f0
+}
4a80f0
+
4a80f0
+set testfile i386-ivy-bridge
4a80f0
+set test compilation
4a80f0
+if [prepare_for_testing ${testfile}.exp ${testfile}.x ${testfile}.S [list debug "additional_flags=-m32 -nostdlib"]] {
4a80f0
+    fail $test
4a80f0
+    return -1
4a80f0
+}
4a80f0
+pass $test
4a80f0
+
4a80f0
+gdb_test_no_output "set disassembly-flavor att"
4a80f0
+# gas/i386/rdrnd.d
4a80f0
+# gas/i386/f16c.d
4a80f0
+# gas/i386/fsgs.d
4a80f0
+gdb_test "disassemble/r _start" "\r
4a80f0
+Dump of assembler code for function _start:\r
4a80f0
+\[^\r\n\]+:\t66 0f c7 f3\t\(             \)?rdrand %bx\r
4a80f0
+\[^\r\n\]+:\t0f c7 f3\t\(                \)?rdrand %ebx\r
4a80f0
+\[^\r\n\]+:\t66 0f c7 f3\t\(             \)?rdrand %bx\r
4a80f0
+\[^\r\n\]+:\t0f c7 f3\t\(                \)?rdrand %ebx\r
4a80f0
+\[^\r\n\]+:\tc4 e2 7d 13 e4\t\(          \)?vcvtph2ps %xmm4,%ymm4\r
4a80f0
+\[^\r\n\]+:\tc4 e2 7d 13 21\t\(          \)?vcvtph2ps \\(%ecx\\),%ymm4\r
4a80f0
+\[^\r\n\]+:\tc4 e2 79 13 f4\t\(          \)?vcvtph2ps %xmm4,%xmm6\r
4a80f0
+\[^\r\n\]+:\tc4 e2 79 13 21\t\(          \)?vcvtph2ps \\(%ecx\\),%xmm4\r
4a80f0
+\[^\r\n\]+:\tc4 e3 7d 1d e4 02\t\(       \)?vcvtps2ph \\\$0x2,%ymm4,%xmm4\r
4a80f0
+\[^\r\n\]+:\tc4 e3 7d 1d 21 02\t\(       \)?vcvtps2ph \\\$0x2,%ymm4,\\(%ecx\\)\r
4a80f0
+\[^\r\n\]+:\tc4 e3 79 1d e4 02\t\(       \)?vcvtps2ph \\\$0x2,%xmm4,%xmm4\r
4a80f0
+\[^\r\n\]+:\tc4 e3 79 1d 21 02\t\(       \)?vcvtps2ph \\\$0x2,%xmm4,\\(%ecx\\)\r
4a80f0
+\[^\r\n\]+:\tc4 e2 7d 13 e4\t\(          \)?vcvtph2ps %xmm4,%ymm4\r
4a80f0
+\[^\r\n\]+:\tc4 e2 7d 13 21\t\(          \)?vcvtph2ps \\(%ecx\\),%ymm4\r
4a80f0
+\[^\r\n\]+:\tc4 e2 7d 13 21\t\(          \)?vcvtph2ps \\(%ecx\\),%ymm4\r
4a80f0
+\[^\r\n\]+:\tc4 e2 79 13 f4\t\(          \)?vcvtph2ps %xmm4,%xmm6\r
4a80f0
+\[^\r\n\]+:\tc4 e2 79 13 21\t\(          \)?vcvtph2ps \\(%ecx\\),%xmm4\r
4a80f0
+\[^\r\n\]+:\tc4 e2 79 13 21\t\(          \)?vcvtph2ps \\(%ecx\\),%xmm4\r
4a80f0
+\[^\r\n\]+:\tc4 e3 7d 1d e4 02\t\(       \)?vcvtps2ph \\\$0x2,%ymm4,%xmm4\r
4a80f0
+\[^\r\n\]+:\tc4 e3 7d 1d 21 02\t\(       \)?vcvtps2ph \\\$0x2,%ymm4,\\(%ecx\\)\r
4a80f0
+\[^\r\n\]+:\tc4 e3 7d 1d 21 02\t\(       \)?vcvtps2ph \\\$0x2,%ymm4,\\(%ecx\\)\r
4a80f0
+\[^\r\n\]+:\tc4 e3 79 1d e4 02\t\(       \)?vcvtps2ph \\\$0x2,%xmm4,%xmm4\r
4a80f0
+\[^\r\n\]+:\tc4 e3 79 1d 21 02\t\(       \)?vcvtps2ph \\\$0x2,%xmm4,\\(%ecx\\)\r
4a80f0
+\[^\r\n\]+:\tc4 e3 79 1d 21 02\t\(       \)?vcvtps2ph \\\$0x2,%xmm4,\\(%ecx\\)\r
4a80f0
+\[^\r\n\]+:\tf3 0f ae c3\t\(             \)?rdfsbase %ebx\r
4a80f0
+\[^\r\n\]+:\tf3 0f ae cb\t\(             \)?rdgsbase %ebx\r
4a80f0
+\[^\r\n\]+:\tf3 0f ae d3\t\(             \)?wrfsbase %ebx\r
4a80f0
+\[^\r\n\]+:\tf3 0f ae db\t\(             \)?wrgsbase %ebx\r
4a80f0
+\[^\r\n\]+:\tf3 0f ae c3\t\(             \)?rdfsbase %ebx\r
4a80f0
+\[^\r\n\]+:\tf3 0f ae cb\t\(             \)?rdgsbase %ebx\r
4a80f0
+\[^\r\n\]+:\tf3 0f ae d3\t\(             \)?wrfsbase %ebx\r
4a80f0
+\[^\r\n\]+:\tf3 0f ae db\t\(             \)?wrgsbase %ebx\r
4a80f0
+End of assembler dump\\." "att"
4a80f0
+
4a80f0
+gdb_test_no_output "set disassembly-flavor intel"
4a80f0
+# gas/i386/rdrnd-intel.d
4a80f0
+# gas/i386/f16c-intel.d
4a80f0
+# gas/i386/fsgs-intel.d
4a80f0
+gdb_test "disassemble/r _start" "\r
4a80f0
+Dump of assembler code for function _start:\r
4a80f0
+\[^\r\n\]+:\t66 0f c7 f3\t\(             \)?rdrand bx\r
4a80f0
+\[^\r\n\]+:\t0f c7 f3\t\(                \)?rdrand ebx\r
4a80f0
+\[^\r\n\]+:\t66 0f c7 f3\t\(             \)?rdrand bx\r
4a80f0
+\[^\r\n\]+:\t0f c7 f3\t\(                \)?rdrand ebx\r
4a80f0
+\[^\r\n\]+:\tc4 e2 7d 13 e4\t\(          \)?vcvtph2ps ymm4,xmm4\r
4a80f0
+\[^\r\n\]+:\tc4 e2 7d 13 21\t\(          \)?vcvtph2ps ymm4,XMMWORD PTR \\\[ecx\\\]\r
4a80f0
+\[^\r\n\]+:\tc4 e2 79 13 f4\t\(          \)?vcvtph2ps xmm6,xmm4\r
4a80f0
+\[^\r\n\]+:\tc4 e2 79 13 21\t\(          \)?vcvtph2ps xmm4,QWORD PTR \\\[ecx\\\]\r
4a80f0
+\[^\r\n\]+:\tc4 e3 7d 1d e4 02\t\(       \)?vcvtps2ph xmm4,ymm4,0x2\r
4a80f0
+\[^\r\n\]+:\tc4 e3 7d 1d 21 02\t\(       \)?vcvtps2ph XMMWORD PTR \\\[ecx\\\],ymm4,0x2\r
4a80f0
+\[^\r\n\]+:\tc4 e3 79 1d e4 02\t\(       \)?vcvtps2ph xmm4,xmm4,0x2\r
4a80f0
+\[^\r\n\]+:\tc4 e3 79 1d 21 02\t\(       \)?vcvtps2ph QWORD PTR \\\[ecx\\\],xmm4,0x2\r
4a80f0
+\[^\r\n\]+:\tc4 e2 7d 13 e4\t\(          \)?vcvtph2ps ymm4,xmm4\r
4a80f0
+\[^\r\n\]+:\tc4 e2 7d 13 21\t\(          \)?vcvtph2ps ymm4,XMMWORD PTR \\\[ecx\\\]\r
4a80f0
+\[^\r\n\]+:\tc4 e2 7d 13 21\t\(          \)?vcvtph2ps ymm4,XMMWORD PTR \\\[ecx\\\]\r
4a80f0
+\[^\r\n\]+:\tc4 e2 79 13 f4\t\(          \)?vcvtph2ps xmm6,xmm4\r
4a80f0
+\[^\r\n\]+:\tc4 e2 79 13 21\t\(          \)?vcvtph2ps xmm4,QWORD PTR \\\[ecx\\\]\r
4a80f0
+\[^\r\n\]+:\tc4 e2 79 13 21\t\(          \)?vcvtph2ps xmm4,QWORD PTR \\\[ecx\\\]\r
4a80f0
+\[^\r\n\]+:\tc4 e3 7d 1d e4 02\t\(       \)?vcvtps2ph xmm4,ymm4,0x2\r
4a80f0
+\[^\r\n\]+:\tc4 e3 7d 1d 21 02\t\(       \)?vcvtps2ph XMMWORD PTR \\\[ecx\\\],ymm4,0x2\r
4a80f0
+\[^\r\n\]+:\tc4 e3 7d 1d 21 02\t\(       \)?vcvtps2ph XMMWORD PTR \\\[ecx\\\],ymm4,0x2\r
4a80f0
+\[^\r\n\]+:\tc4 e3 79 1d e4 02\t\(       \)?vcvtps2ph xmm4,xmm4,0x2\r
4a80f0
+\[^\r\n\]+:\tc4 e3 79 1d 21 02\t\(       \)?vcvtps2ph QWORD PTR \\\[ecx\\\],xmm4,0x2\r
4a80f0
+\[^\r\n\]+:\tc4 e3 79 1d 21 02\t\(       \)?vcvtps2ph QWORD PTR \\\[ecx\\\],xmm4,0x2\r
4a80f0
+\[^\r\n\]+:\tf3 0f ae c3\t\(             \)?rdfsbase ebx\r
4a80f0
+\[^\r\n\]+:\tf3 0f ae cb\t\(             \)?rdgsbase ebx\r
4a80f0
+\[^\r\n\]+:\tf3 0f ae d3\t\(             \)?wrfsbase ebx\r
4a80f0
+\[^\r\n\]+:\tf3 0f ae db\t\(             \)?wrgsbase ebx\r
4a80f0
+\[^\r\n\]+:\tf3 0f ae c3\t\(             \)?rdfsbase ebx\r
4a80f0
+\[^\r\n\]+:\tf3 0f ae cb\t\(             \)?rdgsbase ebx\r
4a80f0
+\[^\r\n\]+:\tf3 0f ae d3\t\(             \)?wrfsbase ebx\r
4a80f0
+\[^\r\n\]+:\tf3 0f ae db\t\(             \)?wrgsbase ebx\r
4a80f0
+End of assembler dump\\." "intel"