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From FEDORA_PATCHES Mon Sep 17 00:00:00 2001
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From: Andreas Arnez <arnez@linux.ibm.com>
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Date: Thu, 19 Nov 2020 19:10:58 +0100
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Subject: gdb-rhbz1903374-s390x-store-on-condition.patch
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;; Backport of "Correct recording of 'store on condition' insns"
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;; Andreas Arnaz (RH BZ 1903374)
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gdb/s390: Correct recording of "store on condition" insns
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The "store on condition" instructions STOC, STOCG, and STOCFH are recorded
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as if their instruction formats resembled that of STG. This is wrong,
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usually resulting in "failed to record execution log" errors when trying
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to record code with any of these instructions.
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This patch fixes the recording of these instructions.
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gdb/ChangeLog:
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PR tdep/26916
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* s390-tdep.c (s390_process_record): Fix recording of STOC, STOCG,
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and STOCFH.
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diff --git a/gdb/s390-tdep.c b/gdb/s390-tdep.c
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--- a/gdb/s390-tdep.c
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+++ b/gdb/s390-tdep.c
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@@ -5332,7 +5332,6 @@ ex:
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case 0xe325: /* NTSTG - nontransactional store */
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case 0xe326: /* CVDY - convert to decimal */
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case 0xe32f: /* STRVG - store reversed */
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- case 0xebe3: /* STOCG - store on condition */
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case 0xed67: /* STDY - store */
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oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], ibyte[4]);
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if (record_full_arch_list_add_mem (oaddr, 8))
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@@ -5361,8 +5360,6 @@ ex:
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case 0xe33e: /* STRV - store reversed */
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case 0xe350: /* STY - store */
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case 0xe3cb: /* STFH - store high */
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- case 0xebe1: /* STOCFH - store high on condition */
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- case 0xebf3: /* STOC - store on condition */
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case 0xed66: /* STEY - store */
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oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], ibyte[4]);
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if (record_full_arch_list_add_mem (oaddr, 4))
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@@ -6075,6 +6072,20 @@ ex:
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/* 0xeb9c-0xebbf undefined */
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/* 0xebc1-0xebdb undefined */
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+
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+ case 0xebe1: /* STOCFH - store high on condition */
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+ case 0xebf3: /* STOC - store on condition */
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+ oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
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+ if (record_full_arch_list_add_mem (oaddr, 4))
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+ return -1;
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+ break;
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+
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+ case 0xebe3: /* STOCG - store on condition */
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+ oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
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+ if (record_full_arch_list_add_mem (oaddr, 8))
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+ return -1;
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+ break;
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+
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/* 0xebe5 undefined */
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/* 0xebe9 undefined */
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/* 0xebeb-0xebf1 undefined */
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