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commit 19dfcc89e8d94526f011242041b700ede8834996
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Author: Peter Bergner <bergner@vnet.ibm.com>
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Date: Thu May 26 19:06:51 2016 -0500
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Add support for new POWER ISA 3.0 instructions.
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opcodes/
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* ppc-opc.c (CY): New define. Document it.
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(powerpc_opcodes) <addex[.], lwzmx, vmsumudm>: New mnemonics.
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gas/
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* testsuite/gas/ppc/altivec3.d <vmsumudm>: Add test.
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* testsuite/gas/ppc/altivec3.s: Likewise.
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* testsuite/gas/ppc/power9.d <addex[.], lwzmx, vmsumudm>: Add tests.
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* testsuite/gas/ppc/power9.s: Likewise.
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### a/opcodes/ChangeLog
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### b/opcodes/ChangeLog
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## -1,3 +1,8 @@
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+2016-05-26 Peter Bergner <bergner@vnet.ibm.com>
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+
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+ * ppc-opc.c (CY): New define. Document it.
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+ (powerpc_opcodes) <addex[.], lwzmx, vmsumudm>: New mnemonics.
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+
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2016-05-25 H.J. Lu <hongjiu.lu@intel.com>
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* i386-gen.c (cpu_flag_init): Add CpuVREX to CPU_AVX512DQ_FLAGS,
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--- a/opcodes/ppc-opc.c
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+++ b/opcodes/ppc-opc.c
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@@ -815,7 +815,9 @@ const struct powerpc_operand powerpc_operands[] =
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#define X_R A_L
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{ 0x1, 16, NULL, NULL, PPC_OPERAND_OPTIONAL },
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+ /* The RMC or CY field in a Z23 form instruction. */
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#define RMC A_L + 1
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+#define CY RMC
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{ 0x3, 9, NULL, NULL, 0 },
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#define R RMC + 1
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@@ -3145,6 +3147,7 @@ const struct powerpc_opcode powerpc_opcodes[] = {
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{"vmhaddshs", VXA(4, 32), VXA_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB, VC}},
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{"vmhraddshs", VXA(4, 33), VXA_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB, VC}},
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{"vmladduhm", VXA(4, 34), VXA_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB, VC}},
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+{"vmsumudm", VXA(4, 35), VXA_MASK, PPCVEC3, PPCNONE, {VD, VA, VB, VC}},
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{"ps_div", A (4, 18,0), AFRC_MASK, PPCPS, PPCNONE, {FRT, FRA, FRB}},
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{"vmsumubm", VXA(4, 36), VXA_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB, VC}},
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{"ps_div.", A (4, 18,1), AFRC_MASK, PPCPS, PPCNONE, {FRT, FRA, FRB}},
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@@ -4977,6 +4980,9 @@ const struct powerpc_opcode powerpc_opcodes[] = {
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{"stvehx", X(31,167), X_MASK, PPCVEC, PPCNONE, {VS, RA0, RB}},
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{"sthfcmx", APU(31,167,0), APU_MASK, PPC405, PPCNONE, {FCRT, RA, RB}},
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+{"addex", ZRC(31,170,0), Z2_MASK, POWER9, PPCNONE, {RT, RA, RB, CY}},
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+{"addex.", ZRC(31,170,1), Z2_MASK, POWER9, PPCNONE, {RT, RA, RB, CY}},
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+
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{"msgclrp", XRTRA(31,174,0,0), XRTRA_MASK, POWER8, PPCNONE, {RB}},
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{"dcbtlse", X(31,174), X_MASK, PPCCHLK, E500MC, {CT, RA0, RB}},
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@@ -5504,6 +5510,8 @@ const struct powerpc_opcode powerpc_opcodes[] = {
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{"mtvsrdd", X(31,435), XX1_MASK, PPCVSX3, PPCNONE, {XT6, RA0, RB}},
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+{"lwzmx", X(31,437), X_MASK, POWER9, PPCNONE, {RT, RA0, RB}},
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+
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{"ecowx", X(31,438), X_MASK, PPC, E500|TITAN, {RT, RA0, RB}},
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{"sthux", X(31,439), X_MASK, COM|PPCVLE, PPCNONE, {RS, RAS, RB}},
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