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commit b817670b52b7414d592cbfd96fd77cf725a33413
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Author: Alan Modra <amodra@gmail.com>
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Date: Sat Dec 12 17:26:33 2015 +1030
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Enable 2 operand form of powerpc mfcr with -many
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This is a workaround for a gcc bug.
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PR 19359
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* ppc-opc.c (insert_fxm): Remove "ignored" from error message.
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(powerpc_opcodes): Remove single-operand mfcr.
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### a/opcodes/ChangeLog
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### b/opcodes/ChangeLog
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## -1,3 +1,9 @@
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+2015-12-12 Alan Modra <amodra@gmail.com>
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+
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+ PR 19359
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+ * ppc-opc.c (insert_fxm): Remove "ignored" from error message.
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+ (powerpc_opcodes): Remove single-operand mfcr.
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+
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2015-12-11 Matthew Wahab <matthew.wahab@arm.com>
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* aarch64-asm.c (aarch64_ins_hint): New.
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--- a/opcodes/ppc-opc.c
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+++ b/opcodes/ppc-opc.c
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@@ -1434,7 +1434,7 @@ insert_fxm (unsigned long insn,
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/* A value of -1 means we used the one operand form of
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mfcr which is valid. */
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if (value != -1)
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- *errmsg = _("ignoring invalid mfcr mask");
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+ *errmsg = _("invalid mfcr mask");
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value = 0;
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}
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@@ -4742,8 +4742,7 @@ const struct powerpc_opcode powerpc_opcodes[] = {
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{"tlbilxva", XTO(31,18,3), XTO_MASK, E500MC|PPCA2, PPCNONE, {RA0, RB}},
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{"tlbilx", X(31,18), X_MASK, E500MC|PPCA2, PPCNONE, {T, RA0, RB}},
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-{"mfcr", XFXM(31,19,0,0), XFXFXM_MASK, POWER4, PPCNONE, {RT, FXM4}},
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-{"mfcr", XFXM(31,19,0,0), XRARB_MASK, COM|PPCVLE, POWER4, {RT}},
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+{"mfcr", XFXM(31,19,0,0), XFXFXM_MASK, COM|PPCVLE, PPCNONE, {RT, FXM4}},
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{"mfocrf", XFXM(31,19,0,1), XFXFXM_MASK, COM|PPCVLE, PPCNONE, {RT, FXM}},
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{"lwarx", X(31,20), XEH_MASK, PPC|PPCVLE, PPCNONE, {RT, RA0, RB, EH}},
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