|
 |
190f2a |
From FEDORA_PATCHES Mon Sep 17 00:00:00 2001
|
|
|
190f2a |
From: Keith Seitz <keiths@redhat.com>
|
|
|
190f2a |
Date: Fri, 11 Jan 2019 17:02:19 -0500
|
|
|
190f2a |
Subject: gdb-rhbz1187581-power8-regs-not-in-8.2-15of15.patch
|
|
|
190f2a |
|
|
|
190f2a |
;; [PowerPC] Document requirements for VSX feature
|
|
|
190f2a |
;; Pedro Franco de Carvalho, RH BZ 1187581
|
|
|
190f2a |
|
|
|
190f2a |
[PowerPC] Document requirements for VSX feature
|
|
|
190f2a |
|
|
|
190f2a |
As suggested in
|
|
|
190f2a |
https://sourceware.org/ml/gdb-patches/2018-10/msg00510.html, this
|
|
|
190f2a |
patch changes the documentation for the VSX tdesc feature to make it
|
|
|
190f2a |
clear that the altivec and FPU features are requirements.
|
|
|
190f2a |
|
|
|
190f2a |
gdb/doc/ChangeLog:
|
|
|
190f2a |
2018-11-09 Pedro Franco de Carvalho <pedromfc@linux.ibm.com>
|
|
|
190f2a |
|
|
|
190f2a |
* gdb.texinfo (PowerPC Features): Document the altivec and fpu
|
|
|
190f2a |
requirements for the org.gnu.gdb.power.vsx feature.
|
|
|
190f2a |
|
|
|
190f2a |
diff --git a/gdb/doc/gdb.texinfo b/gdb/doc/gdb.texinfo
|
|
|
190f2a |
--- a/gdb/doc/gdb.texinfo
|
|
|
190f2a |
+++ b/gdb/doc/gdb.texinfo
|
|
|
190f2a |
@@ -42541,11 +42541,13 @@ contain registers @samp{vr0} through @samp{vr31}, @samp{vscr},
|
|
|
190f2a |
and @samp{vrsave}.
|
|
|
190f2a |
|
|
|
190f2a |
The @samp{org.gnu.gdb.power.vsx} feature is optional. It should
|
|
|
190f2a |
-contain registers @samp{vs0h} through @samp{vs31h}. @value{GDBN}
|
|
|
190f2a |
-will combine these registers with the floating point registers
|
|
|
190f2a |
-(@samp{f0} through @samp{f31}) and the altivec registers (@samp{vr0}
|
|
|
190f2a |
-through @samp{vr31}) to present the 128-bit wide registers @samp{vs0}
|
|
|
190f2a |
-through @samp{vs63}, the set of vector registers for POWER7.
|
|
|
190f2a |
+contain registers @samp{vs0h} through @samp{vs31h}. @value{GDBN} will
|
|
|
190f2a |
+combine these registers with the floating point registers (@samp{f0}
|
|
|
190f2a |
+through @samp{f31}) and the altivec registers (@samp{vr0} through
|
|
|
190f2a |
+@samp{vr31}) to present the 128-bit wide registers @samp{vs0} through
|
|
|
190f2a |
+@samp{vs63}, the set of vector-scalar registers for POWER7.
|
|
|
190f2a |
+Therefore, this feature requires both @samp{org.gnu.gdb.power.fpu} and
|
|
|
190f2a |
+@samp{org.gnu.gdb.power.altivec}.
|
|
|
190f2a |
|
|
|
190f2a |
The @samp{org.gnu.gdb.power.spe} feature is optional. It should
|
|
|
190f2a |
contain registers @samp{ev0h} through @samp{ev31h}, @samp{acc}, and
|