Blame SOURCES/gdb-rhbz1182151-ibm-z13-03of22.patch

0b42f8
commit 6cf1d90c239bf3da9ac8b3cea667cca9c9e7e924
0b42f8
Author: Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
0b42f8
Date:   Thu May 23 15:48:47 2013 +0000
0b42f8
0b42f8
    2013-05-23  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>
0b42f8
    
0b42f8
    	* s390-opc.c: Fix length operand in RSL_LRDFU and RSL_LRDFEU
0b42f8
    	instruction format.
0b42f8
    
0b42f8
    2013-05-23  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>
0b42f8
    
0b42f8
    	* gas/s390/zarch-zEC12.d: Adjust length operands for cdzt, cxzt,
0b42f8
    	czdt, and czxt.
0b42f8
    	* gas/s390/zarch-zEC12.d: Likewise.
0b42f8
0b42f8
### a/opcodes/ChangeLog
0b42f8
### b/opcodes/ChangeLog
0b42f8
## -1,3 +1,8 @@
0b42f8
+2013-05-23  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>
0b42f8
+
0b42f8
+	* s390-opc.c: Fix length operand in RSL_LRDFU and RSL_LRDFEU
0b42f8
+	instruction format.
0b42f8
+
0b42f8
 2013-05-22  Jürgen Urban  <JuergenUrban@gmx.de>
0b42f8
 
0b42f8
 	* mips-opc.c (mips_builtin_opcodes): Add R5900 VU0 instructions.
0b42f8
--- a/opcodes/s390-opc.c
0b42f8
+++ b/opcodes/s390-opc.c
0b42f8
@@ -388,8 +388,8 @@ const struct s390_operand s390_operands[] =
0b42f8
 #define INSTR_RSE_CCRD   6, { C_8,C_12,D_20,B_16,0,0 }         /* e.g. lmh   */
0b42f8
 #define INSTR_RSE_RURD   6, { R_8,U4_12,D_20,B_16,0,0 }        /* e.g. icmh  */
0b42f8
 #define INSTR_RSL_R0RD   6, { D_20,L4_8,B_16,0,0,0 }           /* e.g. tp    */
0b42f8
-#define INSTR_RSL_LRDFU  6, { F_32,D_20,L4_8,B_16,U4_36,0 }    /* e.g. cdzt  */
0b42f8
-#define INSTR_RSL_LRDFEU 6, { FE_32,D_20,L4_8,B_16,U4_36,0 }   /* e.g. cxzt  */
0b42f8
+#define INSTR_RSL_LRDFU  6, { F_32,D_20,L8_8,B_16,U4_36,0 }    /* e.g. cdzt  */
0b42f8
+#define INSTR_RSL_LRDFEU 6, { FE_32,D_20,L8_8,B_16,U4_36,0 }   /* e.g. cxzt  */
0b42f8
 #define INSTR_RSI_RRP    4, { R_8,R_12,J16_16,0,0,0 }          /* e.g. brxh  */
0b42f8
 #define INSTR_RSY_RRRD   6, { R_8,R_12,D20_20,B_16,0,0 }       /* e.g. stmy  */
0b42f8
 #define INSTR_RSY_RERERD 6, { RE_8,RE_12,D20_20,B_16,0,0 }     /* e.g. cdsy  */