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01917d |
commit ef1bc9e72fd2f0310ac3113acc41e1c115e3ac79
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Author: Alan Modra <amodra@gmail.com>
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Date: Mon Nov 11 14:14:40 2013 +1030
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PowerPC64 ELFv2 trampoline match
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ELFv2 needs different plt call stubs to ELFv1, register usage differs
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too. When I added these to ld I changed register usage in the ELFv1
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stubs as well, simplifying the linker code and (perhaps) future
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maintenance. All well and good, but this means gdb needs to cope with
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more stub variants. This patch also handles skipping over addis/addi
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setting up r2 in ELFv2 global entry code. We want breakpoints to be
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set past this point to catch calls via the local entry point.
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* ppc64-tdep.c (ppc64_plt_entry_point): Renamed from..
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(ppc64_desc_entry_point): ..this. Update comments here and at
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call points.
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(ppc64_standard_linkage1, ppc64_standard_linkage2,
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ppc64_standard_linkage3): Update comments.
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(ppc64_standard_linkage4, ppc64_standard_linkage5,
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(ppc64_standard_linkage6, ppc64_standard_linkage7): New insn
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patterns.
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(ppc64_standard_linkage4_target): New function.
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(ppc64_skip_trampoline_code): Skip ELFv2 patterns too.
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* rs6000-tdep.c (skip_prologue): Skip ELFv2 r2 setup. Correct
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nop match. Fix comment wrap.
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Index: gdb-7.6.1/gdb/ppc64-tdep.c
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===================================================================
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--- gdb-7.6.1.orig/gdb/ppc64-tdep.c
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+++ gdb-7.6.1/gdb/ppc64-tdep.c
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@@ -48,21 +48,21 @@
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| (((spr) & 0x3e0) << 6) \
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| (((xo) & 0x3ff) << 1))
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-/* If DESC is the address of a 64-bit PowerPC FreeBSD function
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- descriptor, return the descriptor's entry point. */
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+/* If PLT is the address of a 64-bit PowerPC PLT entry,
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+ return the function's entry point. */
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static CORE_ADDR
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-ppc64_desc_entry_point (struct gdbarch *gdbarch, CORE_ADDR desc)
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+ppc64_plt_entry_point (struct gdbarch *gdbarch, CORE_ADDR plt)
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{
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enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
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- /* The first word of the descriptor is the entry point. */
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- return (CORE_ADDR) read_memory_unsigned_integer (desc, 8, byte_order);
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+ /* The first word of the PLT entry is the function entry point. */
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+ return (CORE_ADDR) read_memory_unsigned_integer (plt, 8, byte_order);
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}
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/* Patterns for the standard linkage functions. These are built by
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build_plt_stub in bfd/elf64-ppc.c. */
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-/* Old PLT call stub. */
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+/* Old ELFv1 PLT call stub. */
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static struct ppc_insn_pattern ppc64_standard_linkage1[] =
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{
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@@ -96,7 +96,7 @@ static struct ppc_insn_pattern ppc64_sta
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{ 0, 0, 0 }
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};
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-/* Current PLT call stub to access PLT entries more than +/- 32k from r2.
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+/* ELFv1 PLT call stub to access PLT entries more than +/- 32k from r2.
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Also supports older stub with different placement of std 2,40(1),
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a stub that omits the std 2,40(1), and both versions of power7
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thread safety read barriers. Note that there are actually two more
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@@ -144,7 +144,7 @@ static struct ppc_insn_pattern ppc64_sta
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{ 0, 0, 0 }
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};
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-/* Current PLT call stub to access PLT entries within +/- 32k of r2. */
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+/* ELFv1 PLT call stub to access PLT entries within +/- 32k of r2. */
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static struct ppc_insn_pattern ppc64_standard_linkage3[] =
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{
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@@ -181,6 +181,128 @@ static struct ppc_insn_pattern ppc64_sta
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{ 0, 0, 0 }
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};
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+/* ELFv1 PLT call stub to access PLT entries more than +/- 32k from r2.
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+ A more modern variant of ppc64_standard_linkage2 differing in
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+ register usage. */
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+
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+static struct ppc_insn_pattern ppc64_standard_linkage4[] =
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+ {
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+ /* std r2, 40(r1) <optional> */
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+ { -1, insn_ds (62, 2, 1, 40, 0), 1 },
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+
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+ /* addis r11, r2, <any> */
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+ { insn_d (-1, -1, -1, 0), insn_d (15, 11, 2, 0), 0 },
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+
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+ /* ld r12, <any>(r11) */
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+ { insn_ds (-1, -1, -1, 0, -1), insn_ds (58, 12, 11, 0, 0), 0 },
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+
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+ /* addi r11, r11, <any> <optional> */
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+ { insn_d (-1, -1, -1, 0), insn_d (14, 11, 11, 0), 1 },
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+
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+ /* mtctr r12 */
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+ { insn_xfx (-1, -1, -1, -1), insn_xfx (31, 12, 9, 467), 0 },
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+
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+ /* xor r2, r12, r12 <optional> */
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+ { -1, 0x7d826278, 1 },
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+
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+ /* add r11, r11, r2 <optional> */
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+ { -1, 0x7d6b1214, 1 },
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+
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+ /* ld r2, <any>(r11) */
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+ { insn_ds (-1, -1, -1, 0, -1), insn_ds (58, 2, 11, 0, 0), 0 },
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+
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+ /* ld r11, <any>(r11) <optional> */
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+ { insn_ds (-1, -1, -1, 0, -1), insn_ds (58, 11, 11, 0, 0), 1 },
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+
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+ /* bctr <optional> */
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+ { -1, 0x4e800420, 1 },
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+
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+ /* cmpldi r2, 0 <optional> */
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+ { -1, 0x28220000, 1 },
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+
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+ { 0, 0, 0 }
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+ };
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+
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+/* ELFv1 PLT call stub to access PLT entries within +/- 32k of r2.
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+ A more modern variant of ppc64_standard_linkage3 differing in
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+ register usage. */
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+
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+static struct ppc_insn_pattern ppc64_standard_linkage5[] =
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+ {
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+ /* std r2, 40(r1) <optional> */
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+ { -1, insn_ds (62, 2, 1, 40, 0), 1 },
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+
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+ /* ld r12, <any>(r2) */
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+ { insn_ds (-1, -1, -1, 0, -1), insn_ds (58, 12, 2, 0, 0), 0 },
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+
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+ /* addi r2, r2, <any> <optional> */
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+ { insn_d (-1, -1, -1, 0), insn_d (14, 2, 2, 0), 1 },
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+
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+ /* mtctr r12 */
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+ { insn_xfx (-1, -1, -1, -1), insn_xfx (31, 12, 9, 467), 0 },
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+
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+ /* xor r11, r12, r12 <optional> */
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+ { -1, 0x7d8b6278, 1 },
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+
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+ /* add r2, r2, r11 <optional> */
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+ { -1, 0x7c425a14, 1 },
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+
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+ /* ld r11, <any>(r2) <optional> */
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+ { insn_ds (-1, -1, -1, 0, -1), insn_ds (58, 11, 2, 0, 0), 1 },
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+
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+ /* ld r2, <any>(r2) */
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+ { insn_ds (-1, -1, -1, 0, -1), insn_ds (58, 2, 2, 0, 0), 0 },
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+
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+ /* bctr <optional> */
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+ { -1, 0x4e800420, 1 },
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+
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+ /* cmpldi r2, 0 <optional> */
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+ { -1, 0x28220000, 1 },
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+
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+ { 0, 0, 0 }
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+ };
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+
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+/* ELFv2 PLT call stub to access PLT entries more than +/- 32k from r2. */
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+
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+static struct ppc_insn_pattern ppc64_standard_linkage6[] =
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+ {
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+ /* std r2, 24(r1) <optional> */
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+ { -1, insn_ds (62, 2, 1, 24, 0), 1 },
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+
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+ /* addis r11, r2, <any> */
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+ { insn_d (-1, -1, -1, 0), insn_d (15, 11, 2, 0), 0 },
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+
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+ /* ld r12, <any>(r11) */
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+ { insn_ds (-1, -1, -1, 0, -1), insn_ds (58, 12, 11, 0, 0), 0 },
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+
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+ /* mtctr r12 */
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+ { insn_xfx (-1, -1, -1, -1), insn_xfx (31, 12, 9, 467), 0 },
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+
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+ /* bctr */
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+ { -1, 0x4e800420, 0 },
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+
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+ { 0, 0, 0 }
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+ };
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+
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+/* ELFv2 PLT call stub to access PLT entries within +/- 32k of r2. */
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+
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+static struct ppc_insn_pattern ppc64_standard_linkage7[] =
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+ {
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+ /* std r2, 24(r1) <optional> */
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+ { -1, insn_ds (62, 2, 1, 40, 0), 1 },
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+
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+ /* ld r12, <any>(r2) */
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+ { insn_ds (-1, -1, -1, 0, -1), insn_ds (58, 12, 2, 0, 0), 0 },
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+
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+ /* mtctr r12 */
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+ { insn_xfx (-1, -1, -1, -1), insn_xfx (31, 12, 9, 467), 0 },
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+
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+ /* bctr */
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+ { -1, 0x4e800420, 0 },
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+
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+ { 0, 0, 0 }
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+ };
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+
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/* When the dynamic linker is doing lazy symbol resolution, the first
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call to a function in another object will go like this:
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@@ -243,16 +365,14 @@ ppc64_standard_linkage1_target (struct f
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struct gdbarch *gdbarch = get_frame_arch (frame);
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struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
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- /* The address of the function descriptor this linkage function
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- references. */
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- CORE_ADDR desc
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+ /* The address of the PLT entry this linkage function references. */
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+ CORE_ADDR plt
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= ((CORE_ADDR) get_frame_register_unsigned (frame,
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tdep->ppc_gp0_regnum + 2)
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+ (ppc_insn_d_field (insn[0]) << 16)
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+ ppc_insn_ds_field (insn[2]));
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- /* The first word of the descriptor is the entry point. Return that. */
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- return ppc64_desc_entry_point (gdbarch, desc);
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+ return ppc64_plt_entry_point (gdbarch, plt);
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}
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static CORE_ADDR
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@@ -262,16 +382,14 @@ ppc64_standard_linkage2_target (struct f
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struct gdbarch *gdbarch = get_frame_arch (frame);
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struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
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- /* The address of the function descriptor this linkage function
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- references. */
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- CORE_ADDR desc
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+ /* The address of the PLT entry this linkage function references. */
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+ CORE_ADDR plt
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= ((CORE_ADDR) get_frame_register_unsigned (frame,
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tdep->ppc_gp0_regnum + 2)
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+ (ppc_insn_d_field (insn[1]) << 16)
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+ ppc_insn_ds_field (insn[3]));
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- /* The first word of the descriptor is the entry point. Return that. */
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- return ppc64_desc_entry_point (gdbarch, desc);
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+ return ppc64_plt_entry_point (gdbarch, plt);
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}
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static CORE_ADDR
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@@ -281,15 +399,28 @@ ppc64_standard_linkage3_target (struct f
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struct gdbarch *gdbarch = get_frame_arch (frame);
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struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
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- /* The address of the function descriptor this linkage function
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- references. */
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- CORE_ADDR desc
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+ /* The address of the PLT entry this linkage function references. */
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+ CORE_ADDR plt
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= ((CORE_ADDR) get_frame_register_unsigned (frame,
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tdep->ppc_gp0_regnum + 2)
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+ ppc_insn_ds_field (insn[1]));
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- /* The first word of the descriptor is the entry point. Return that. */
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- return ppc64_desc_entry_point (gdbarch, desc);
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+ return ppc64_plt_entry_point (gdbarch, plt);
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+}
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+
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+static CORE_ADDR
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+ppc64_standard_linkage4_target (struct frame_info *frame,
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+ CORE_ADDR pc, unsigned int *insn)
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+{
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+ struct gdbarch *gdbarch = get_frame_arch (frame);
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+ struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
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+
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+ CORE_ADDR plt
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+ = ((CORE_ADDR) get_frame_register_unsigned (frame, tdep->ppc_gp0_regnum + 2)
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+ + (ppc_insn_d_field (insn[1]) << 16)
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+ + ppc_insn_ds_field (insn[2]));
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+
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+ return ppc64_plt_entry_point (gdbarch, plt);
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}
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@@ -300,13 +431,27 @@ CORE_ADDR
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ppc64_skip_trampoline_code (struct frame_info *frame, CORE_ADDR pc)
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|
01917d |
{
|
|
|
01917d |
#define MAX(a,b) ((a) > (b) ? (a) : (b))
|
|
|
01917d |
- unsigned int insns[MAX (MAX (ARRAY_SIZE (ppc64_standard_linkage1),
|
|
|
01917d |
- ARRAY_SIZE (ppc64_standard_linkage2)),
|
|
|
01917d |
- ARRAY_SIZE (ppc64_standard_linkage3)) - 1];
|
|
|
01917d |
+ unsigned int insns[MAX (MAX (MAX (ARRAY_SIZE (ppc64_standard_linkage1),
|
|
|
01917d |
+ ARRAY_SIZE (ppc64_standard_linkage2)),
|
|
|
01917d |
+ MAX (ARRAY_SIZE (ppc64_standard_linkage3),
|
|
|
01917d |
+ ARRAY_SIZE (ppc64_standard_linkage4))),
|
|
|
01917d |
+ MAX (MAX (ARRAY_SIZE (ppc64_standard_linkage5),
|
|
|
01917d |
+ ARRAY_SIZE (ppc64_standard_linkage6)),
|
|
|
01917d |
+ ARRAY_SIZE (ppc64_standard_linkage7))) - 1];
|
|
|
01917d |
CORE_ADDR target;
|
|
|
01917d |
|
|
|
01917d |
- if (ppc_insns_match_pattern (frame, pc, ppc64_standard_linkage3, insns)
|
|
|
01917d |
- && (insns[8] != 0 || insns[9] != 0))
|
|
|
01917d |
+ if (ppc_insns_match_pattern (frame, pc, ppc64_standard_linkage7, insns))
|
|
|
01917d |
+ pc = ppc64_standard_linkage3_target (frame, pc, insns);
|
|
|
01917d |
+ else if (ppc_insns_match_pattern (frame, pc, ppc64_standard_linkage6, insns))
|
|
|
01917d |
+ pc = ppc64_standard_linkage4_target (frame, pc, insns);
|
|
|
01917d |
+ else if (ppc_insns_match_pattern (frame, pc, ppc64_standard_linkage5, insns)
|
|
|
01917d |
+ && (insns[8] != 0 || insns[9] != 0))
|
|
|
01917d |
+ pc = ppc64_standard_linkage3_target (frame, pc, insns);
|
|
|
01917d |
+ else if (ppc_insns_match_pattern (frame, pc, ppc64_standard_linkage4, insns)
|
|
|
01917d |
+ && (insns[9] != 0 || insns[10] != 0))
|
|
|
01917d |
+ pc = ppc64_standard_linkage4_target (frame, pc, insns);
|
|
|
01917d |
+ else if (ppc_insns_match_pattern (frame, pc, ppc64_standard_linkage3, insns)
|
|
|
01917d |
+ && (insns[8] != 0 || insns[9] != 0))
|
|
|
01917d |
pc = ppc64_standard_linkage3_target (frame, pc, insns);
|
|
|
01917d |
else if (ppc_insns_match_pattern (frame, pc, ppc64_standard_linkage2, insns)
|
|
|
01917d |
&& (insns[10] != 0 || insns[11] != 0))
|
|
|
01917d |
Index: gdb-7.6.1/gdb/rs6000-tdep.c
|
|
|
01917d |
===================================================================
|
|
|
01917d |
--- gdb-7.6.1.orig/gdb/rs6000-tdep.c
|
|
|
01917d |
+++ gdb-7.6.1/gdb/rs6000-tdep.c
|
|
|
01917d |
@@ -1667,7 +1667,19 @@ skip_prologue (struct gdbarch *gdbarch,
|
|
|
01917d |
continue;
|
|
|
01917d |
|
|
|
01917d |
}
|
|
|
01917d |
- else if ((op & 0xffff0000) == 0x60000000)
|
|
|
01917d |
+ else if ((op & 0xffff0000) == 0x3c4c0000
|
|
|
01917d |
+ || (op & 0xffff0000) == 0x3c400000
|
|
|
01917d |
+ || (op & 0xffff0000) == 0x38420000)
|
|
|
01917d |
+ {
|
|
|
01917d |
+ /* . 0: addis 2,12,.TOC.-0b@ha
|
|
|
01917d |
+ . addi 2,2,.TOC.-0b@l
|
|
|
01917d |
+ or
|
|
|
01917d |
+ . lis 2,.TOC.@ha
|
|
|
01917d |
+ . addi 2,2,.TOC.@l
|
|
|
01917d |
+ used by ELFv2 global entry points to set up r2. */
|
|
|
01917d |
+ continue;
|
|
|
01917d |
+ }
|
|
|
01917d |
+ else if (op == 0x60000000)
|
|
|
01917d |
{
|
|
|
01917d |
/* nop */
|
|
|
01917d |
/* Allow nops in the prologue, but do not consider them to
|
|
|
01917d |
@@ -1678,8 +1690,7 @@ skip_prologue (struct gdbarch *gdbarch,
|
|
|
01917d |
|
|
|
01917d |
}
|
|
|
01917d |
else if ((op & 0xffff0000) == 0x3c000000)
|
|
|
01917d |
- { /* addis 0,0,NUM, used
|
|
|
01917d |
- for >= 32k frames */
|
|
|
01917d |
+ { /* addis 0,0,NUM, used for >= 32k frames */
|
|
|
01917d |
fdata->offset = (op & 0x0000ffff) << 16;
|
|
|
01917d |
fdata->frameless = 0;
|
|
|
01917d |
r0_contains_arg = 0;
|
|
|
01917d |
@@ -1687,8 +1698,7 @@ skip_prologue (struct gdbarch *gdbarch,
|
|
|
01917d |
|
|
|
01917d |
}
|
|
|
01917d |
else if ((op & 0xffff0000) == 0x60000000)
|
|
|
01917d |
- { /* ori 0,0,NUM, 2nd ha
|
|
|
01917d |
- lf of >= 32k frames */
|
|
|
01917d |
+ { /* ori 0,0,NUM, 2nd half of >= 32k frames */
|
|
|
01917d |
fdata->offset |= (op & 0x0000ffff);
|
|
|
01917d |
fdata->frameless = 0;
|
|
|
01917d |
r0_contains_arg = 0;
|