diff --git a/SOURCES/gcc8-rh2028609.patch b/SOURCES/gcc8-rh2028609.patch
new file mode 100644
index 0000000..379153b
--- /dev/null
+++ b/SOURCES/gcc8-rh2028609.patch
@@ -0,0 +1,101 @@
+The cprop_hardreg pass is built around the assumption that accessing a
+register in a narrower mode is the same as accessing the lowpart of
+the register.  This unfortunately is not true for vector registers on
+IBM Z. This caused a miscompile of LLVM with GCC 8.5. The problem
+could not be reproduced with upstream GCC unfortunately but we have to
+assume that it is latent there. The right fix would require
+substantial changes to the cprop pass and is certainly something we
+would want for our platform. But since this would not be acceptable
+for older GCCs I'll go with what Vladimir proposed in the RedHat BZ
+and introduce a hopefully temporary and undocumented target hook to
+disable that specific transformation in regcprop.c.
+
+--- a/gcc/config/s390/s390.c
++++ b/gcc/config/s390/s390.c
+@@ -10488,6 +10488,18 @@ s390_hard_regno_mode_ok (unsigned int regno, machine_mode mode)
+   return false;
+ }
+ 
++/* Implement TARGET_NARROW_MODE_REFERS_LOW_PART_P.  */
++
++static bool
++s390_narrow_mode_refers_low_part_p (unsigned int regno)
++{
++  if (reg_classes_intersect_p (VEC_REGS, REGNO_REG_CLASS (regno)))
++    return false;
++
++  return true;
++}
++
++
+ /* Implement TARGET_MODES_TIEABLE_P.  */
+ 
+ static bool
+@@ -16956,6 +16968,9 @@ s390_case_values_threshold (void)
+ #undef TARGET_CASE_VALUES_THRESHOLD
+ #define TARGET_CASE_VALUES_THRESHOLD s390_case_values_threshold
+ 
++#undef TARGET_NARROW_MODE_REFERS_LOW_PART_P
++#define TARGET_NARROW_MODE_REFERS_LOW_PART_P s390_narrow_mode_refers_low_part_p
++
+ struct gcc_target targetm = TARGET_INITIALIZER;
+ 
+ #include "gt-s390.h"
+--- a/gcc/regcprop.c
++++ b/gcc/regcprop.c
+@@ -426,7 +426,8 @@ maybe_mode_change (machine_mode orig_mode, machine_mode copy_mode,
+ 
+   if (orig_mode == new_mode)
+     return gen_raw_REG (new_mode, regno);
+-  else if (mode_change_ok (orig_mode, new_mode, regno))
++  else if (mode_change_ok (orig_mode, new_mode, regno)
++	   && targetm.narrow_mode_refers_low_part_p (copy_regno))
+     {
+       int copy_nregs = hard_regno_nregs (copy_regno, copy_mode);
+       int use_nregs = hard_regno_nregs (copy_regno, new_mode);
+--- a/gcc/target.def
++++ b/gcc/target.def
+@@ -5446,6 +5446,16 @@ value that the middle-end intended.",
+  bool, (machine_mode from, machine_mode to, reg_class_t rclass),
+  hook_bool_mode_mode_reg_class_t_true)
+ 
++/* This hook is used to work around a problem in regcprop. Hardcoded
++assumptions currently prevent it from working correctly for targets
++where the low part of a multi-word register doesn't align to accessing
++the register with a narrower mode.  */
++DEFHOOK_UNDOC
++(narrow_mode_refers_low_part_p,
++"",
++bool, (unsigned int regno),
++hook_bool_uint_true)
++
+ /* Change pseudo allocno class calculated by IRA.  */
+ DEFHOOK
+ (ira_change_pseudo_allocno_class,
+--- a/gcc/hooks.h
++++ b/gcc/hooks.h
+@@ -86,6 +86,7 @@ extern void hook_void_tree (tree);
+ extern void hook_void_tree_treeptr (tree, tree *);
+ extern void hook_void_int_int (int, int);
+ extern void hook_void_gcc_optionsp (struct gcc_options *);
++extern bool hook_bool_uint_true (unsigned int);
+ extern bool hook_bool_uint_uintp_false (unsigned int, unsigned int *);
+ 
+ extern int hook_int_uint_mode_1 (unsigned int, machine_mode);
+--- a/gcc/hooks.c
++++ b/gcc/hooks.c
+@@ -498,6 +498,14 @@ hook_void_gcc_optionsp (struct gcc_optio
+ {
+ }
+ 
++/* Generic hook that takes an unsigned int and returns true.  */
++
++bool
++hook_bool_uint_true (unsigned int)
++{
++  return true;
++}
++
+ /* Generic hook that takes an unsigned int, an unsigned int pointer and
+    returns false.  */
+ 
diff --git a/SPECS/gcc.spec b/SPECS/gcc.spec
index 891f941..e029f89 100644
--- a/SPECS/gcc.spec
+++ b/SPECS/gcc.spec
@@ -4,7 +4,7 @@
 %global gcc_major 8
 # Note, gcc_release must be integer, if you want to add suffixes to
 # %%{release}, append them after %%{gcc_release} on Release: line.
-%global gcc_release 8
+%global gcc_release 10
 %global nvptx_tools_gitrev c28050f60193b3b95a18866a96f03334e874e78f
 %global nvptx_newlib_gitrev aadc8eb0ec43b7cd0dd2dfb484bae63c8b05ef24
 %global _unpackaged_files_terminate_build 0
@@ -283,6 +283,7 @@ Patch22: gcc8-Wbidi-chars.patch
 Patch23: gcc8-pr96796.patch
 Patch24: gcc8-pch-tweaks.patch
 Patch25: gcc8-aarch64-mtune-neoverse-512tvb.patch
+Patch26: gcc8-rh2028609.patch
 
 Patch30: gcc8-rh1668903-1.patch
 Patch31: gcc8-rh1668903-2.patch
@@ -867,6 +868,7 @@ to NVidia PTX capable devices if available.
 %patch23 -p1 -b .pr96796~
 %patch24 -p1 -b .pch-tweaks~
 %patch25 -p1 -b .neoverse~
+%patch26 -p1 -b .rh2028609~
 
 %patch30 -p0 -b .rh1668903-1~
 %patch31 -p0 -b .rh1668903-2~
@@ -3183,6 +3185,12 @@ fi
 %endif
 
 %changelog
+* Thu Jan 27 2022 Marek Polacek <polacek@redhat.com> 8.5.0-10
+- fix typo in the cprop_hardreg patch (#2028609)
+
+* Mon Jan 24 2022 Marek Polacek <polacek@redhat.com> 8.5.0-9
+- apply cprop_hardreg fix for narrow mode != lowpart targets (#2028609)
+
 * Mon Jan 24 2022 Marek Polacek <polacek@redhat.com> 8.5.0-8
 - aarch64: Add -mtune=neoverse-512tvb (#1845932)