diff --git a/SOURCES/gcc48-libtool-no-rpath.patch b/SOURCES/gcc48-libtool-no-rpath.patch
new file mode 100644
index 0000000..466c661
--- /dev/null
+++ b/SOURCES/gcc48-libtool-no-rpath.patch
@@ -0,0 +1,27 @@
+libtool sucks.
+--- ltmain.sh.jj 2007-12-07 14:53:21.000000000 +0100
++++ ltmain.sh 2008-09-05 21:51:48.000000000 +0200
+@@ -5394,6 +5394,7 @@ EOF
+ rpath="$finalize_rpath"
+ test "$mode" != relink && rpath="$compile_rpath$rpath"
+ for libdir in $rpath; do
++ case "$libdir" in /usr/lib|/usr/lib64|/usr/lib/../lib|/usr/lib/../lib64) continue;; esac
+ if test -n "$hardcode_libdir_flag_spec"; then
+ if test -n "$hardcode_libdir_separator"; then
+ if test -z "$hardcode_libdirs"; then
+@@ -6071,6 +6072,7 @@ EOF
+ rpath=
+ hardcode_libdirs=
+ for libdir in $compile_rpath $finalize_rpath; do
++ case "$libdir" in /usr/lib|/usr/lib64|/usr/lib/../lib|/usr/lib/../lib64) continue;; esac
+ if test -n "$hardcode_libdir_flag_spec"; then
+ if test -n "$hardcode_libdir_separator"; then
+ if test -z "$hardcode_libdirs"; then
+@@ -6120,6 +6122,7 @@ EOF
+ rpath=
+ hardcode_libdirs=
+ for libdir in $finalize_rpath; do
++ case "$libdir" in /usr/lib|/usr/lib64|/usr/lib/../lib|/usr/lib/../lib64) continue;; esac
+ if test -n "$hardcode_libdir_flag_spec"; then
+ if test -n "$hardcode_libdir_separator"; then
+ if test -z "$hardcode_libdirs"; then
diff --git a/SOURCES/gcc48-no-add-needed.patch b/SOURCES/gcc48-no-add-needed.patch
new file mode 100644
index 0000000..b6ca777
--- /dev/null
+++ b/SOURCES/gcc48-no-add-needed.patch
@@ -0,0 +1,50 @@
+2010-02-08 Roland McGrath
+
+ * config/rs6000/sysv4.h (LINK_EH_SPEC): Pass --no-add-needed to the
+ linker.
+ * config/gnu-user.h (LINK_EH_SPEC): Likewise.
+ * config/alpha/elf.h (LINK_EH_SPEC): Likewise.
+ * config/ia64/linux.h (LINK_EH_SPEC): Likewise.
+
+--- gcc/config/alpha/elf.h.jj 2011-01-03 12:52:31.118056764 +0100
++++ gcc/config/alpha/elf.h 2011-01-04 18:14:10.931874160 +0100
+@@ -165,5 +165,5 @@ extern int alpha_this_gpdisp_sequence_nu
+ I imagine that other systems will catch up. In the meantime, it
+ doesn't harm to make sure that the data exists to be used later. */
+ #if defined(HAVE_LD_EH_FRAME_HDR)
+-#define LINK_EH_SPEC "%{!static:--eh-frame-hdr} "
++#define LINK_EH_SPEC "--no-add-needed %{!static:--eh-frame-hdr} "
+ #endif
+--- gcc/config/ia64/linux.h.jj 2011-01-03 13:02:11.462994522 +0100
++++ gcc/config/ia64/linux.h 2011-01-04 18:14:10.931874160 +0100
+@@ -77,7 +77,7 @@ do { \
+ Signalize that because we have fde-glibc, we don't need all C shared libs
+ linked against -lgcc_s. */
+ #undef LINK_EH_SPEC
+-#define LINK_EH_SPEC ""
++#define LINK_EH_SPEC "--no-add-needed "
+
+ /* Put all *tf routines in libgcc. */
+ #undef LIBGCC2_HAS_TF_MODE
+--- gcc/config/gnu-user.h.jj 2011-01-03 12:53:03.739057299 +0100
++++ gcc/config/gnu-user.h 2011-01-04 18:14:10.932814884 +0100
+@@ -82,7 +82,7 @@ see the files COPYING3 and COPYING.RUNTI
+ #define LIB_SPEC GNU_USER_TARGET_LIB_SPEC
+
+ #if defined(HAVE_LD_EH_FRAME_HDR)
+-#define LINK_EH_SPEC "%{!static:--eh-frame-hdr} "
++#define LINK_EH_SPEC "--no-add-needed %{!static:--eh-frame-hdr} "
+ #endif
+
+ #undef LINK_GCC_C_SEQUENCE_SPEC
+--- gcc/config/rs6000/sysv4.h.jj 2011-01-03 13:02:18.255994215 +0100
++++ gcc/config/rs6000/sysv4.h 2011-01-04 18:14:10.933888871 +0100
+@@ -820,7 +820,7 @@ extern int fixuplabelno;
+ -dynamic-linker " GNU_USER_DYNAMIC_LINKER "}}"
+
+ #if defined(HAVE_LD_EH_FRAME_HDR)
+-# define LINK_EH_SPEC "%{!static:--eh-frame-hdr} "
++# define LINK_EH_SPEC "--no-add-needed %{!static:--eh-frame-hdr} "
+ #endif
+
+ #define CPP_OS_LINUX_SPEC "-D__unix__ -D__gnu_linux__ -D__linux__ \
diff --git a/SOURCES/gcc48-ppc32-retaddr.patch b/SOURCES/gcc48-ppc32-retaddr.patch
new file mode 100644
index 0000000..e906dad
--- /dev/null
+++ b/SOURCES/gcc48-ppc32-retaddr.patch
@@ -0,0 +1,87 @@
+2005-11-28 Jakub Jelinek
+
+ * config/rs6000/rs6000.c (rs6000_return_addr): If COUNT == 0,
+ read word RETURN_ADDRESS_OFFSET bytes above arg_pointer_rtx
+ instead of doing an extran indirection from frame_pointer_rtx.
+
+ * gcc.dg/20051128-1.c: New test.
+
+--- gcc/config/rs6000/rs6000.c.jj 2005-11-26 14:38:01.000000000 +0100
++++ gcc/config/rs6000/rs6000.c 2005-11-28 20:32:18.000000000 +0100
+@@ -21423,18 +21423,22 @@ rs6000_return_addr (int count, rtx frame
+ if (count != 0
+ || ((DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_DARWIN) && flag_pic))
+ {
++ rtx x;
+ cfun->machine->ra_needs_full_frame = 1;
+
+- return
+- gen_rtx_MEM
+- (Pmode,
+- memory_address
+- (Pmode,
+- plus_constant (Pmode,
+- copy_to_reg
+- (gen_rtx_MEM (Pmode,
+- memory_address (Pmode, frame))),
+- RETURN_ADDRESS_OFFSET)));
++ if (count == 0)
++ {
++ gcc_assert (frame == frame_pointer_rtx);
++ x = arg_pointer_rtx;
++ }
++ else
++ {
++ x = memory_address (Pmode, frame);
++ x = copy_to_reg (gen_rtx_MEM (Pmode, x));
++ }
++
++ x = plus_constant (Pmode, x, RETURN_ADDRESS_OFFSET);
++ return gen_rtx_MEM (Pmode, memory_address (Pmode, x));
+ }
+
+ cfun->machine->ra_need_lr = 1;
+--- gcc/testsuite/gcc.dg/20051128-1.c.jj 2005-10-10 11:21:41.096999000 +0200
++++ gcc/testsuite/gcc.dg/20051128-1.c 2005-11-28 12:30:57.000000000 +0100
+@@ -0,0 +1,41 @@
++/* { dg-do run } */
++/* { dg-options "-O2 -fpic" } */
++
++extern void exit (int);
++extern void abort (void);
++
++int b;
++
++struct A
++{
++ void *pad[147];
++ void *ra, *h;
++ long o;
++};
++
++void
++__attribute__((noinline))
++foo (struct A *a, void *x)
++{
++ __builtin_memset (a, 0, sizeof (a));
++ if (!b)
++ exit (0);
++}
++
++void
++__attribute__((noinline))
++bar (void)
++{
++ struct A a;
++
++ __builtin_unwind_init ();
++ foo (&a, __builtin_return_address (0));
++}
++
++int
++main (void)
++{
++ bar ();
++ abort ();
++ return 0;
++}
diff --git a/SOURCES/gcc48-pr28865.patch b/SOURCES/gcc48-pr28865.patch
new file mode 100644
index 0000000..8e07e94
--- /dev/null
+++ b/SOURCES/gcc48-pr28865.patch
@@ -0,0 +1,190 @@
+2014-01-16 Nick Clifton
+
+ PR middle-end/28865
+ * varasm.c (output_constant): Return the number of bytes actually
+ emitted.
+ (output_constructor_array_range): Update the field size with the
+ number of bytes emitted by output_constant.
+ (output_constructor_regular_field): Likewise. Also do not
+ complain if the total number of bytes emitted is now greater
+ than the expected fieldpos.
+ * output.h (output_constant): Update prototype and descriptive
+ comment.
+
+ * gcc.c-torture/compile/pr28865.c: New.
+ * gcc.c-torture/execute/pr28865.c: New.
+
+--- gcc/varasm.c (revision 206660)
++++ gcc/varasm.c (revision 206661)
+@@ -4474,8 +4474,10 @@ static unsigned HOST_WIDE_INT
+ This includes the pseudo-op such as ".int" or ".byte", and a newline.
+ Assumes output_addressed_constants has been done on EXP already.
+
+- Generate exactly SIZE bytes of assembler data, padding at the end
+- with zeros if necessary. SIZE must always be specified.
++ Generate at least SIZE bytes of assembler data, padding at the end
++ with zeros if necessary. SIZE must always be specified. The returned
++ value is the actual number of bytes of assembler data generated, which
++ may be bigger than SIZE if the object contains a variable length field.
+
+ SIZE is important for structure constructors,
+ since trailing members may have been omitted from the constructor.
+@@ -4490,14 +4492,14 @@ static unsigned HOST_WIDE_INT
+
+ ALIGN is the alignment of the data in bits. */
+
+-void
++unsigned HOST_WIDE_INT
+ output_constant (tree exp, unsigned HOST_WIDE_INT size, unsigned int align)
+ {
+ enum tree_code code;
+ unsigned HOST_WIDE_INT thissize;
+
+ if (size == 0 || flag_syntax_only)
+- return;
++ return size;
+
+ /* See if we're trying to initialize a pointer in a non-default mode
+ to the address of some declaration somewhere. If the target says
+@@ -4562,7 +4564,7 @@ output_constant (tree exp, unsigned HOST
+ && vec_safe_is_empty (CONSTRUCTOR_ELTS (exp)))
+ {
+ assemble_zeros (size);
+- return;
++ return size;
+ }
+
+ if (TREE_CODE (exp) == FDESC_EXPR)
+@@ -4574,7 +4576,7 @@ output_constant (tree exp, unsigned HOST
+ #else
+ gcc_unreachable ();
+ #endif
+- return;
++ return size;
+ }
+
+ /* Now output the underlying data. If we've handling the padding, return.
+@@ -4612,8 +4614,7 @@ output_constant (tree exp, unsigned HOST
+ switch (TREE_CODE (exp))
+ {
+ case CONSTRUCTOR:
+- output_constructor (exp, size, align, NULL);
+- return;
++ return output_constructor (exp, size, align, NULL);
+ case STRING_CST:
+ thissize = MIN ((unsigned HOST_WIDE_INT)TREE_STRING_LENGTH (exp),
+ size);
+@@ -4648,11 +4649,10 @@ output_constant (tree exp, unsigned HOST
+ case RECORD_TYPE:
+ case UNION_TYPE:
+ gcc_assert (TREE_CODE (exp) == CONSTRUCTOR);
+- output_constructor (exp, size, align, NULL);
+- return;
++ return output_constructor (exp, size, align, NULL);
+
+ case ERROR_MARK:
+- return;
++ return 0;
+
+ default:
+ gcc_unreachable ();
+@@ -4660,6 +4660,8 @@ output_constant (tree exp, unsigned HOST
+
+ if (size > thissize)
+ assemble_zeros (size - thissize);
++
++ return size;
+ }
+
+
+@@ -4759,7 +4761,7 @@ output_constructor_array_range (oc_local
+ if (local->val == NULL_TREE)
+ assemble_zeros (fieldsize);
+ else
+- output_constant (local->val, fieldsize, align2);
++ fieldsize = output_constant (local->val, fieldsize, align2);
+
+ /* Count its size. */
+ local->total_bytes += fieldsize;
+@@ -4808,9 +4810,8 @@ output_constructor_regular_field (oc_loc
+ Note no alignment needed in an array, since that is guaranteed
+ if each element has the proper size. */
+ if ((local->field != NULL_TREE || local->index != NULL_TREE)
+- && fieldpos != local->total_bytes)
++ && fieldpos > local->total_bytes)
+ {
+- gcc_assert (fieldpos >= local->total_bytes);
+ assemble_zeros (fieldpos - local->total_bytes);
+ local->total_bytes = fieldpos;
+ }
+@@ -4847,7 +4848,7 @@ output_constructor_regular_field (oc_loc
+ if (local->val == NULL_TREE)
+ assemble_zeros (fieldsize);
+ else
+- output_constant (local->val, fieldsize, align2);
++ fieldsize = output_constant (local->val, fieldsize, align2);
+
+ /* Count its size. */
+ local->total_bytes += fieldsize;
+--- gcc/output.h (revision 206660)
++++ gcc/output.h (revision 206661)
+@@ -294,11 +294,13 @@ extern void output_quoted_string (FILE *
+ This includes the pseudo-op such as ".int" or ".byte", and a newline.
+ Assumes output_addressed_constants has been done on EXP already.
+
+- Generate exactly SIZE bytes of assembler data, padding at the end
+- with zeros if necessary. SIZE must always be specified.
++ Generate at least SIZE bytes of assembler data, padding at the end
++ with zeros if necessary. SIZE must always be specified. The returned
++ value is the actual number of bytes of assembler data generated, which
++ may be bigger than SIZE if the object contains a variable length field.
+
+ ALIGN is the alignment in bits that may be assumed for the data. */
+-extern void output_constant (tree, unsigned HOST_WIDE_INT, unsigned int);
++extern unsigned HOST_WIDE_INT output_constant (tree, unsigned HOST_WIDE_INT, unsigned int);
+
+ /* When outputting delayed branch sequences, this rtx holds the
+ sequence being output. It is null when no delayed branch
+--- gcc/testsuite/gcc.c-torture/execute/pr28865.c (revision 0)
++++ gcc/testsuite/gcc.c-torture/execute/pr28865.c (revision 206661)
+@@ -0,0 +1,21 @@
++struct A { int a; char b[]; };
++union B { struct A a; char b[sizeof (struct A) + 31]; };
++union B b = { { 1, "123456789012345678901234567890" } };
++union B c = { { 2, "123456789012345678901234567890" } };
++
++__attribute__((noinline, noclone)) void
++foo (int *x[2])
++{
++ x[0] = &b.a.a;
++ x[1] = &c.a.a;
++}
++
++int
++main ()
++{
++ int *x[2];
++ foo (x);
++ if (*x[0] != 1 || *x[1] != 2)
++ __builtin_abort ();
++ return 0;
++}
+--- gcc/testsuite/gcc.c-torture/compile/pr28865.c (revision 0)
++++ gcc/testsuite/gcc.c-torture/compile/pr28865.c (revision 206661)
+@@ -0,0 +1,16 @@
++struct var_len
++{
++ int field1;
++ const char field2[];
++};
++
++/* Note - strictly speaking this array declaration is illegal
++ since each element has a variable length. GCC allows it
++ (for the moment) because it is used in existing code, such
++ as glibc. */
++static const struct var_len var_array[] =
++{
++ { 1, "Long exposure noise reduction" },
++ { 2, "Shutter/AE lock buttons" },
++ { 3, "Mirror lockup" }
++};
diff --git a/SOURCES/gcc48-pr38757.patch b/SOURCES/gcc48-pr38757.patch
new file mode 100644
index 0000000..4206584
--- /dev/null
+++ b/SOURCES/gcc48-pr38757.patch
@@ -0,0 +1,106 @@
+2009-03-18 Jakub Jelinek
+
+ PR debug/38757
+ * langhooks.h (struct lang_hooks): Add source_language langhook.
+ * langhooks-def.h (LANG_HOOKS_SOURCE_LANGUAGE): Define to NULL.
+ (LANG_HOOKS_INITIALIZER): Add LANG_HOOKS_SOURCE_LANGUAGE.
+ * dwarf2out.c (add_prototyped_attribute): Add DW_AT_prototype
+ also for DW_LANG_{C,C99,ObjC}.
+ (gen_compile_unit_die): Use lang_hooks.source_language () to
+ determine if DW_LANG_C99 or DW_LANG_C89 should be returned.
+c/
+ * c-lang.c (c_source_language): New function.
+ (LANG_HOOKS_SOURCE_LANGUAGE): Define.
+
+--- gcc/langhooks.h.jj 2011-01-03 12:53:05.125745450 +0100
++++ gcc/langhooks.h 2011-01-04 17:59:43.166744926 +0100
+@@ -467,6 +467,10 @@ struct lang_hooks
+ gimplification. */
+ bool deep_unsharing;
+
++ /* Return year of the source language standard version if the FE supports
++ multiple versions of the standard. */
++ int (*source_language) (void);
++
+ /* Whenever you add entries here, make sure you adjust langhooks-def.h
+ and langhooks.c accordingly. */
+ };
+--- gcc/langhooks-def.h.jj 2011-01-03 12:53:05.000000000 +0100
++++ gcc/langhooks-def.h 2011-01-04 18:00:44.858851030 +0100
+@@ -118,6 +118,7 @@ extern void lhd_omp_firstprivatize_type_
+ #define LANG_HOOKS_BLOCK_MAY_FALLTHRU hook_bool_const_tree_true
+ #define LANG_HOOKS_EH_USE_CXA_END_CLEANUP false
+ #define LANG_HOOKS_DEEP_UNSHARING false
++#define LANG_HOOKS_SOURCE_LANGUAGE NULL
+
+ /* Attribute hooks. */
+ #define LANG_HOOKS_ATTRIBUTE_TABLE NULL
+@@ -303,7 +304,8 @@ extern void lhd_end_section (void);
+ LANG_HOOKS_EH_PROTECT_CLEANUP_ACTIONS, \
+ LANG_HOOKS_BLOCK_MAY_FALLTHRU, \
+ LANG_HOOKS_EH_USE_CXA_END_CLEANUP, \
+- LANG_HOOKS_DEEP_UNSHARING \
++ LANG_HOOKS_DEEP_UNSHARING, \
++ LANG_HOOKS_SOURCE_LANGUAGE \
+ }
+
+ #endif /* GCC_LANG_HOOKS_DEF_H */
+--- gcc/c/c-lang.c.jj 2011-01-03 12:53:05.376056936 +0100
++++ gcc/c/c-lang.c 2011-01-04 17:59:43.167743798 +0100
+@@ -36,6 +36,12 @@ along with GCC; see the file COPYING3.
+
+ enum c_language_kind c_language = clk_c;
+
++static int
++c_source_language (void)
++{
++ return flag_isoc99 ? 1999 : 1989;
++}
++
+ /* Lang hooks common to C and ObjC are declared in c-objc-common.h;
+ consequently, there should be very few hooks below. */
+
+@@ -45,6 +51,8 @@ enum c_language_kind c_language = clk_c;
+ #define LANG_HOOKS_INIT c_objc_common_init
+ #undef LANG_HOOKS_INIT_TS
+ #define LANG_HOOKS_INIT_TS c_common_init_ts
++#undef LANG_HOOKS_SOURCE_LANGUAGE
++#define LANG_HOOKS_SOURCE_LANGUAGE c_source_language
+
+ /* Each front end provides its own lang hook initializer. */
+ struct lang_hooks lang_hooks = LANG_HOOKS_INITIALIZER;
+--- gcc/dwarf2out.c.jj 2011-01-03 12:53:05.102056475 +0100
++++ gcc/dwarf2out.c 2011-01-04 18:03:14.534151763 +0100
+@@ -16109,9 +16109,18 @@ add_bit_size_attribute (dw_die_ref die,
+ static inline void
+ add_prototyped_attribute (dw_die_ref die, tree func_type)
+ {
+- if (get_AT_unsigned (comp_unit_die (), DW_AT_language) == DW_LANG_C89
+- && prototype_p (func_type))
+- add_AT_flag (die, DW_AT_prototyped, 1);
++ switch (get_AT_unsigned (comp_unit_die (), DW_AT_language))
++ {
++ case DW_LANG_C:
++ case DW_LANG_C89:
++ case DW_LANG_C99:
++ case DW_LANG_ObjC:
++ if (prototype_p (func_type))
++ add_AT_flag (die, DW_AT_prototyped, 1);
++ break;
++ default:
++ break;
++ }
+ }
+
+ /* Add an 'abstract_origin' attribute below a given DIE. The DIE is found
+@@ -18915,6 +18924,10 @@ gen_compile_unit_die (const char *filena
+ if (strcmp (language_string, "GNU Go") == 0)
+ language = DW_LANG_Go;
+ }
++ else if (strcmp (language_string, "GNU C") == 0
++ && lang_hooks.source_language
++ && lang_hooks.source_language () >= 1999)
++ language = DW_LANG_C99;
+ }
+ /* Use a degraded Fortran setting in strict DWARF2 so is_fortran works. */
+ else if (strcmp (language_string, "GNU Fortran") == 0)
diff --git a/SOURCES/gcc48-pr52714.patch b/SOURCES/gcc48-pr52714.patch
new file mode 100644
index 0000000..2ea553d
--- /dev/null
+++ b/SOURCES/gcc48-pr52714.patch
@@ -0,0 +1,76 @@
+2014-02-27 Jeff Law
+
+ PR rtl-optimization/52714
+ * combine.c (try_combine): When splitting an unrecognized PARALLEL
+ into two independent simple sets, if I3 is a jump, ensure the
+ pattern we place into I3 is a (set (pc) ...)
+
+ * gcc.c-torture/compile/pr52714.c: New test.
+
+2016-06-15 Jakub Jelinek
+
+ * gcc.c-torture/compile/20160615-1.c: New test.
+
+--- gcc/combine.c (revision 208203)
++++ gcc/combine.c (revision 208204)
+@@ -3706,6 +3706,9 @@ try_combine (rtx i3, rtx i2, rtx i1, rtx
+ #ifdef HAVE_cc0
+ && !reg_referenced_p (cc0_rtx, XVECEXP (newpat, 0, 0))
+ #endif
++ /* If I3 is a jump, ensure that set0 is a jump so that
++ we do not create invalid RTL. */
++ && (!JUMP_P (i3) || SET_DEST (XVECEXP (newpat, 0, 0)) == pc_rtx)
+ )
+ {
+ newi2pat = XVECEXP (newpat, 0, 1);
+@@ -3716,6 +3719,9 @@ try_combine (rtx i3, rtx i2, rtx i1, rtx
+ #ifdef HAVE_cc0
+ && !reg_referenced_p (cc0_rtx, XVECEXP (newpat, 0, 1))
+ #endif
++ /* If I3 is a jump, ensure that set1 is a jump so that
++ we do not create invalid RTL. */
++ && (!JUMP_P (i3) || SET_DEST (XVECEXP (newpat, 0, 1)) == pc_rtx)
+ )
+ {
+ newi2pat = XVECEXP (newpat, 0, 0);
+--- gcc/testsuite/gcc.c-torture/compile/pr52714.c (revision 0)
++++ gcc/testsuite/gcc.c-torture/compile/pr52714.c (revision 208204)
+@@ -0,0 +1,25 @@
++
++int __re_compile_fastmap(unsigned char *p)
++{
++ unsigned char **stack;
++ unsigned size;
++ unsigned avail;
++
++ stack = __builtin_alloca(5 * sizeof(unsigned char*));
++ if (stack == 0)
++ return -2;
++ size = 5;
++ avail = 0;
++
++ for (;;) {
++ switch (*p++) {
++ case 0:
++ if (avail == size)
++ return -2;
++ stack[avail++] = p;
++ }
++ }
++
++ return 0;
++}
++
+--- gcc/testsuite/gcc.c-torture/compile/20160615-1.c.jj 2016-06-15 11:17:54.690689056 +0200
++++ gcc/testsuite/gcc.c-torture/compile/20160615-1.c 2016-06-15 11:17:48.811765657 +0200
+@@ -0,0 +1,10 @@
++int a;
++void bar (int, unsigned, unsigned);
++
++void
++foo (unsigned x)
++{
++ unsigned b = a ? x : 0;
++ if (x || b)
++ bar (0, x, b);
++}
diff --git a/SOURCES/gcc48-pr53477.patch b/SOURCES/gcc48-pr53477.patch
new file mode 100644
index 0000000..70d5d56
--- /dev/null
+++ b/SOURCES/gcc48-pr53477.patch
@@ -0,0 +1,131 @@
+2013-08-20 Phil Muldoon
+
+ PR libstdc++/53477
+ http://sourceware.org/bugzilla/show_bug.cgi?id=15195
+
+ * python/libstdcxx/v6/printers.py (Printer.__call__): If a value
+ is a reference, fetch referenced value.
+ (RxPrinter.invoke): Ditto.
+ * testsuite/libstdc++-prettyprinters/cxx11.cc (main): Add -O0
+ flag. Add referenced value tests.
+
+--- libstdc++-v3/python/libstdcxx/v6/printers.py (revision 201887)
++++ libstdc++-v3/python/libstdcxx/v6/printers.py (revision 201888)
+@@ -786,6 +786,11 @@ class RxPrinter(object):
+ def invoke(self, value):
+ if not self.enabled:
+ return None
++
++ if value.type.code == gdb.TYPE_CODE_REF:
++ if hasattr(gdb.Value,"referenced_value"):
++ value = value.referenced_value()
++
+ return self.function(self.name, value)
+
+ # A pretty-printer that conforms to the "PrettyPrinter" protocol from
+@@ -841,6 +846,11 @@ class Printer(object):
+ return None
+
+ basename = match.group(1)
++
++ if val.type.code == gdb.TYPE_CODE_REF:
++ if hasattr(gdb.Value,"referenced_value"):
++ val = val.referenced_value()
++
+ if basename in self.lookup:
+ return self.lookup[basename].invoke(val)
+
+--- libstdc++-v3/testsuite/libstdc++-prettyprinters/cxx11.cc (revision 201887)
++++ libstdc++-v3/testsuite/libstdc++-prettyprinters/cxx11.cc (revision 201888)
+@@ -1,5 +1,5 @@
+ // { dg-do run }
+-// { dg-options "-std=gnu++11 -g" }
++// { dg-options "-std=gnu++11 -g -O0" }
+
+ // Copyright (C) 2011-2013 Free Software Foundation, Inc.
+ //
+@@ -24,6 +24,8 @@
+ #include
+ #include
+
++typedef std::tuple ExTuple;
++
+ template
+ void
+ placeholder(const T &s)
+@@ -62,43 +64,75 @@ main()
+ std::forward_list efl;
+ // { dg-final { note-test efl "empty std::forward_list" } }
+
++ std::forward_list &refl = efl;
++// { dg-final { note-test refl "empty std::forward_list" } }
++
+ std::forward_list fl;
+ fl.push_front(2);
+ fl.push_front(1);
+ // { dg-final { note-test fl {std::forward_list = {[0] = 1, [1] = 2}} } }
+
++ std::forward_list &rfl = fl;
++// { dg-final { note-test rfl {std::forward_list = {[0] = 1, [1] = 2}} } }
++
+ std::unordered_map eum;
+ // { dg-final { note-test eum "std::unordered_map with 0 elements" } }
++ std::unordered_map &reum = eum;
++// { dg-final { note-test reum "std::unordered_map with 0 elements" } }
++
+ std::unordered_multimap eumm;
+ // { dg-final { note-test eumm "std::unordered_multimap with 0 elements" } }
++ std::unordered_multimap &reumm = eumm;
++// { dg-final { note-test reumm "std::unordered_multimap with 0 elements" } }
++
+ std::unordered_set eus;
+ // { dg-final { note-test eus "std::unordered_set with 0 elements" } }
++ std::unordered_set &reus = eus;
++// { dg-final { note-test reus "std::unordered_set with 0 elements" } }
++
+ std::unordered_multiset eums;
+ // { dg-final { note-test eums "std::unordered_multiset with 0 elements" } }
++ std::unordered_multiset &reums = eums;
++// { dg-final { note-test reums "std::unordered_multiset with 0 elements" } }
+
+ std::unordered_map uom;
+ uom[5] = "three";
+ uom[3] = "seven";
+ // { dg-final { note-test uom {std::unordered_map with 2 elements = {[3] = "seven", [5] = "three"}} } }
+
++ std::unordered_map &ruom = uom;
++// { dg-final { note-test ruom {std::unordered_map with 2 elements = {[3] = "seven", [5] = "three"}} } }
++
+ std::unordered_multimap uomm;
+ uomm.insert(std::pair (5, "three"));
+ uomm.insert(std::pair (5, "seven"));
+ // { dg-final { note-test uomm {std::unordered_multimap with 2 elements = {[5] = "seven", [5] = "three"}} } }
++ std::unordered_multimap &ruomm = uomm;
++// { dg-final { note-test ruomm {std::unordered_multimap with 2 elements = {[5] = "seven", [5] = "three"}} } }
+
+ std::unordered_set uos;
+ uos.insert(5);
+ // { dg-final { note-test uos {std::unordered_set with 1 elements = {[0] = 5}} } }
++ std::unordered_set &ruos = uos;
++// { dg-final { note-test ruos {std::unordered_set with 1 elements = {[0] = 5}} } }
+
+ std::unordered_multiset uoms;
+ uoms.insert(5);
+ // { dg-final { note-test uoms {std::unordered_multiset with 1 elements = {[0] = 5}} } }
++ std::unordered_multiset &ruoms = uoms;
++// { dg-final { note-test ruoms {std::unordered_multiset with 1 elements = {[0] = 5}} } }
+
+ std::unique_ptr uptr (new datum);
+ uptr->s = "hi bob";
+ uptr->i = 23;
+ // { dg-final { regexp-test uptr {std::unique_ptr.datum. containing 0x.*} } }
++ std::unique_ptr &ruptr = uptr;
++// { dg-final { regexp-test ruptr {std::unique_ptr.datum. containing 0x.*} } }
+
++ ExTuple tpl(6,7);
++// { dg-final { note-test tpl {std::tuple containing = {[1] = 6, [2] = 7}} } }
++ ExTuple &rtpl = tpl;
++// { dg-final { note-test rtpl {std::tuple containing = {[1] = 6, [2] = 7}} } }
+ placeholder(""); // Mark SPOT
+ use(efl);
+ use(fl);
diff --git a/SOURCES/gcc48-pr56564.patch b/SOURCES/gcc48-pr56564.patch
new file mode 100644
index 0000000..d81e02d
--- /dev/null
+++ b/SOURCES/gcc48-pr56564.patch
@@ -0,0 +1,654 @@
+2013-06-19 Igor Zamyatin
+
+ * gcc.dg/tree-ssa/loop-19.c: Add -fno-common.
+
+2013-06-12 Jakub Jelinek
+
+ PR target/56564
+ * varasm.c (decl_binds_to_current_def_p): Call binds_local_p
+ target hook even for !TREE_PUBLIC decls. If no resolution info
+ is available, return false for common and external decls.
+
+ * gcc.target/i386/pr56564-1.c: Skip on darwin, mingw and cygwin.
+ * gcc.target/i386/pr56564-3.c: Likewise.
+
+2013-06-11 Jakub Jelinek
+
+ PR target/56564
+ * varasm.c (get_variable_align): Move #endif to the right place.
+
+2013-06-10 Jakub Jelinek
+
+ PR target/56564
+ * varasm.c (align_variable): Don't use DATA_ALIGNMENT or
+ CONSTANT_ALIGNMENT if !decl_binds_to_current_def_p (decl).
+ Use DATA_ABI_ALIGNMENT for that case instead if defined.
+ (get_variable_align): New function.
+ (get_variable_section, emit_bss, emit_common,
+ assemble_variable_contents, place_block_symbol): Use
+ get_variable_align instead of DECL_ALIGN.
+ (assemble_noswitch_variable): Add align argument, use it
+ instead of DECL_ALIGN.
+ (assemble_variable): Adjust caller. Use get_variable_align
+ instead of DECL_ALIGN.
+ * config/i386/i386.h (DATA_ALIGNMENT): Adjust x86_data_alignment
+ caller.
+ (DATA_ABI_ALIGNMENT): Define.
+ * config/i386/i386-protos.h (x86_data_alignment): Adjust prototype.
+ * config/i386/i386.c (x86_data_alignment): Add opt argument. If
+ opt is false, only return the psABI mandated alignment increase.
+ * config/c6x/c6x.h (DATA_ALIGNMENT): Renamed to...
+ (DATA_ABI_ALIGNMENT): ... this.
+ * config/mmix/mmix.h (DATA_ALIGNMENT): Renamed to...
+ (DATA_ABI_ALIGNMENT): ... this.
+ * config/mmix/mmix.c (mmix_data_alignment): Adjust function comment.
+ * config/s390/s390.h (DATA_ALIGNMENT): Renamed to...
+ (DATA_ABI_ALIGNMENT): ... this.
+ * doc/tm.texi.in (DATA_ABI_ALIGNMENT): Document.
+ * doc/tm.texi: Regenerated.
+
+ * gcc.target/i386/pr56564-1.c: New test.
+ * gcc.target/i386/pr56564-2.c: New test.
+ * gcc.target/i386/pr56564-3.c: New test.
+ * gcc.target/i386/pr56564-4.c: New test.
+ * gcc.target/i386/avx256-unaligned-load-4.c: Add -fno-common.
+ * gcc.target/i386/avx256-unaligned-store-1.c: Likewise.
+ * gcc.target/i386/avx256-unaligned-store-3.c: Likewise.
+ * gcc.target/i386/avx256-unaligned-store-4.c: Likewise.
+ * gcc.target/i386/vect-sizes-1.c: Likewise.
+ * gcc.target/i386/memcpy-1.c: Likewise.
+ * gcc.dg/vect/costmodel/i386/costmodel-vect-31.c (tmp): Initialize.
+ * gcc.dg/vect/costmodel/x86_64/costmodel-vect-31.c (tmp): Likewise.
+
+--- gcc/doc/tm.texi.in (revision 199897)
++++ gcc/doc/tm.texi.in (revision 199898)
+@@ -1062,6 +1062,15 @@ arrays to be word-aligned so that @code{
+ constants to character arrays can be done inline.
+ @end defmac
+
++@defmac DATA_ABI_ALIGNMENT (@var{type}, @var{basic-align})
++Similar to @code{DATA_ALIGNMENT}, but for the cases where the ABI mandates
++some alignment increase, instead of optimization only purposes. E.g.@
++AMD x86-64 psABI says that variables with array type larger than 15 bytes
++must be aligned to 16 byte boundaries.
++
++If this macro is not defined, then @var{basic-align} is used.
++@end defmac
++
+ @defmac CONSTANT_ALIGNMENT (@var{constant}, @var{basic-align})
+ If defined, a C expression to compute the alignment given to a constant
+ that is being placed in memory. @var{constant} is the constant and
+--- gcc/doc/tm.texi (revision 199897)
++++ gcc/doc/tm.texi (revision 199898)
+@@ -1078,6 +1078,15 @@ arrays to be word-aligned so that @code{
+ constants to character arrays can be done inline.
+ @end defmac
+
++@defmac DATA_ABI_ALIGNMENT (@var{type}, @var{basic-align})
++Similar to @code{DATA_ALIGNMENT}, but for the cases where the ABI mandates
++some alignment increase, instead of optimization only purposes. E.g.@
++AMD x86-64 psABI says that variables with array type larger than 15 bytes
++must be aligned to 16 byte boundaries.
++
++If this macro is not defined, then @var{basic-align} is used.
++@end defmac
++
+ @defmac CONSTANT_ALIGNMENT (@var{constant}, @var{basic-align})
+ If defined, a C expression to compute the alignment given to a constant
+ that is being placed in memory. @var{constant} is the constant and
+--- gcc/varasm.c (revision 199897)
++++ gcc/varasm.c (revision 199984)
+@@ -966,13 +966,80 @@ align_variable (tree decl, bool dont_out
+ align = MAX_OFILE_ALIGNMENT;
+ }
+
+- /* On some machines, it is good to increase alignment sometimes. */
+ if (! DECL_USER_ALIGN (decl))
+ {
++#ifdef DATA_ABI_ALIGNMENT
++ unsigned int data_abi_align
++ = DATA_ABI_ALIGNMENT (TREE_TYPE (decl), align);
++ /* For backwards compatibility, don't assume the ABI alignment for
++ TLS variables. */
++ if (! DECL_THREAD_LOCAL_P (decl) || data_abi_align <= BITS_PER_WORD)
++ align = data_abi_align;
++#endif
++
++ /* On some machines, it is good to increase alignment sometimes.
++ But as DECL_ALIGN is used both for actually emitting the variable
++ and for code accessing the variable as guaranteed alignment, we
++ can only increase the alignment if it is a performance optimization
++ if the references to it must bind to the current definition. */
++ if (decl_binds_to_current_def_p (decl))
++ {
++#ifdef DATA_ALIGNMENT
++ unsigned int data_align = DATA_ALIGNMENT (TREE_TYPE (decl), align);
++ /* Don't increase alignment too much for TLS variables - TLS space
++ is too precious. */
++ if (! DECL_THREAD_LOCAL_P (decl) || data_align <= BITS_PER_WORD)
++ align = data_align;
++#endif
++#ifdef CONSTANT_ALIGNMENT
++ if (DECL_INITIAL (decl) != 0
++ && DECL_INITIAL (decl) != error_mark_node)
++ {
++ unsigned int const_align
++ = CONSTANT_ALIGNMENT (DECL_INITIAL (decl), align);
++ /* Don't increase alignment too much for TLS variables - TLS
++ space is too precious. */
++ if (! DECL_THREAD_LOCAL_P (decl) || const_align <= BITS_PER_WORD)
++ align = const_align;
++ }
++#endif
++ }
++ }
++
++ /* Reset the alignment in case we have made it tighter, so we can benefit
++ from it in get_pointer_alignment. */
++ DECL_ALIGN (decl) = align;
++}
++
++/* Return DECL_ALIGN (decl), possibly increased for optimization purposes
++ beyond what align_variable returned. */
++
++static unsigned int
++get_variable_align (tree decl)
++{
++ unsigned int align = DECL_ALIGN (decl);
++
++ /* For user aligned vars or static vars align_variable already did
++ everything. */
++ if (DECL_USER_ALIGN (decl) || !TREE_PUBLIC (decl))
++ return align;
++
++#ifdef DATA_ABI_ALIGNMENT
++ if (DECL_THREAD_LOCAL_P (decl))
++ align = DATA_ABI_ALIGNMENT (TREE_TYPE (decl), align);
++#endif
++
++ /* For decls that bind to the current definition, align_variable
++ did also everything, except for not assuming ABI required alignment
++ of TLS variables. For other vars, increase the alignment here
++ as an optimization. */
++ if (!decl_binds_to_current_def_p (decl))
++ {
++ /* On some machines, it is good to increase alignment sometimes. */
+ #ifdef DATA_ALIGNMENT
+ unsigned int data_align = DATA_ALIGNMENT (TREE_TYPE (decl), align);
+ /* Don't increase alignment too much for TLS variables - TLS space
+- is too precious. */
++ is too precious. */
+ if (! DECL_THREAD_LOCAL_P (decl) || data_align <= BITS_PER_WORD)
+ align = data_align;
+ #endif
+@@ -989,9 +1056,7 @@ align_variable (tree decl, bool dont_out
+ #endif
+ }
+
+- /* Reset the alignment in case we have made it tighter, so we can benefit
+- from it in get_pointer_alignment. */
+- DECL_ALIGN (decl) = align;
++ return align;
+ }
+
+ /* Return the section into which the given VAR_DECL or CONST_DECL
+@@ -1043,7 +1108,8 @@ get_variable_section (tree decl, bool pr
+ return bss_noswitch_section;
+ }
+
+- return targetm.asm_out.select_section (decl, reloc, DECL_ALIGN (decl));
++ return targetm.asm_out.select_section (decl, reloc,
++ get_variable_align (decl));
+ }
+
+ /* Return the block into which object_block DECL should be placed. */
+@@ -1780,7 +1846,8 @@ emit_bss (tree decl ATTRIBUTE_UNUSED,
+ unsigned HOST_WIDE_INT rounded ATTRIBUTE_UNUSED)
+ {
+ #if defined ASM_OUTPUT_ALIGNED_BSS
+- ASM_OUTPUT_ALIGNED_BSS (asm_out_file, decl, name, size, DECL_ALIGN (decl));
++ ASM_OUTPUT_ALIGNED_BSS (asm_out_file, decl, name, size,
++ get_variable_align (decl));
+ return true;
+ #endif
+ }
+@@ -1796,10 +1863,11 @@ emit_common (tree decl ATTRIBUTE_UNUSED,
+ {
+ #if defined ASM_OUTPUT_ALIGNED_DECL_COMMON
+ ASM_OUTPUT_ALIGNED_DECL_COMMON (asm_out_file, decl, name,
+- size, DECL_ALIGN (decl));
++ size, get_variable_align (decl));
+ return true;
+ #elif defined ASM_OUTPUT_ALIGNED_COMMON
+- ASM_OUTPUT_ALIGNED_COMMON (asm_out_file, name, size, DECL_ALIGN (decl));
++ ASM_OUTPUT_ALIGNED_COMMON (asm_out_file, name, size,
++ get_variable_align (decl));
+ return true;
+ #else
+ ASM_OUTPUT_COMMON (asm_out_file, name, size, rounded);
+@@ -1828,7 +1896,8 @@ emit_tls_common (tree decl ATTRIBUTE_UNU
+ NAME is the name of DECL's SYMBOL_REF. */
+
+ static void
+-assemble_noswitch_variable (tree decl, const char *name, section *sect)
++assemble_noswitch_variable (tree decl, const char *name, section *sect,
++ unsigned int align)
+ {
+ unsigned HOST_WIDE_INT size, rounded;
+
+@@ -1850,7 +1919,7 @@ assemble_noswitch_variable (tree decl, c
+ * (BIGGEST_ALIGNMENT / BITS_PER_UNIT));
+
+ if (!sect->noswitch.callback (decl, name, size, rounded)
+- && (unsigned HOST_WIDE_INT) DECL_ALIGN_UNIT (decl) > rounded)
++ && (unsigned HOST_WIDE_INT) (align / BITS_PER_UNIT) > rounded)
+ warning (0, "requested alignment for %q+D is greater than "
+ "implemented alignment of %wu", decl, rounded);
+ }
+@@ -1880,7 +1949,7 @@ assemble_variable_contents (tree decl, c
+ /* Output the actual data. */
+ output_constant (DECL_INITIAL (decl),
+ tree_low_cst (DECL_SIZE_UNIT (decl), 1),
+- DECL_ALIGN (decl));
++ get_variable_align (decl));
+ else
+ /* Leave space for it. */
+ assemble_zeros (tree_low_cst (DECL_SIZE_UNIT (decl), 1));
+@@ -1904,6 +1973,7 @@ assemble_variable (tree decl, int top_le
+ const char *name;
+ rtx decl_rtl, symbol;
+ section *sect;
++ unsigned int align;
+ bool asan_protected = false;
+
+ /* This function is supposed to handle VARIABLES. Ensure we have one. */
+@@ -2003,6 +2073,8 @@ assemble_variable (tree decl, int top_le
+
+ set_mem_align (decl_rtl, DECL_ALIGN (decl));
+
++ align = get_variable_align (decl);
++
+ if (TREE_PUBLIC (decl))
+ maybe_assemble_visibility (decl);
+
+@@ -2032,12 +2104,12 @@ assemble_variable (tree decl, int top_le
+ place_block_symbol (symbol);
+ }
+ else if (SECTION_STYLE (sect) == SECTION_NOSWITCH)
+- assemble_noswitch_variable (decl, name, sect);
++ assemble_noswitch_variable (decl, name, sect, align);
+ else
+ {
+ switch_to_section (sect);
+- if (DECL_ALIGN (decl) > BITS_PER_UNIT)
+- ASM_OUTPUT_ALIGN (asm_out_file, floor_log2 (DECL_ALIGN_UNIT (decl)));
++ if (align > BITS_PER_UNIT)
++ ASM_OUTPUT_ALIGN (asm_out_file, floor_log2 (align / BITS_PER_UNIT));
+ assemble_variable_contents (decl, name, dont_output_data);
+ if (asan_protected)
+ {
+@@ -6709,10 +6781,10 @@ bool
+ decl_binds_to_current_def_p (tree decl)
+ {
+ gcc_assert (DECL_P (decl));
+- if (!TREE_PUBLIC (decl))
+- return true;
+ if (!targetm.binds_local_p (decl))
+ return false;
++ if (!TREE_PUBLIC (decl))
++ return true;
+ /* When resolution is available, just use it. */
+ if (TREE_CODE (decl) == VAR_DECL
+ && (TREE_STATIC (decl) || DECL_EXTERNAL (decl)))
+@@ -6730,10 +6802,20 @@ decl_binds_to_current_def_p (tree decl)
+ return resolution_to_local_definition_p (node->symbol.resolution);
+ }
+ /* Otherwise we have to assume the worst for DECL_WEAK (hidden weaks
+- binds locally but still can be overwritten).
++ binds locally but still can be overwritten), DECL_COMMON (can be merged
++ with a non-common definition somewhere in the same module) or
++ DECL_EXTERNAL.
+ This rely on fact that binds_local_p behave as decl_replaceable_p
+ for all other declaration types. */
+- return !DECL_WEAK (decl);
++ if (DECL_WEAK (decl))
++ return false;
++ if (DECL_COMMON (decl)
++ && (DECL_INITIAL (decl) == NULL
++ || DECL_INITIAL (decl) == error_mark_node))
++ return false;
++ if (DECL_EXTERNAL (decl))
++ return false;
++ return true;
+ }
+
+ /* A replaceable function or variable is one which may be replaced
+@@ -6959,7 +7041,7 @@ place_block_symbol (rtx symbol)
+ else
+ {
+ decl = SYMBOL_REF_DECL (symbol);
+- alignment = DECL_ALIGN (decl);
++ alignment = get_variable_align (decl);
+ size = tree_low_cst (DECL_SIZE_UNIT (decl), 1);
+ if (flag_asan && asan_protect_global (decl))
+ {
+--- gcc/config/s390/s390.h (revision 199897)
++++ gcc/config/s390/s390.h (revision 199898)
+@@ -221,7 +221,7 @@ enum processor_flags
+
+ /* Alignment on even addresses for LARL instruction. */
+ #define CONSTANT_ALIGNMENT(EXP, ALIGN) (ALIGN) < 16 ? 16 : (ALIGN)
+-#define DATA_ALIGNMENT(TYPE, ALIGN) (ALIGN) < 16 ? 16 : (ALIGN)
++#define DATA_ABI_ALIGNMENT(TYPE, ALIGN) (ALIGN) < 16 ? 16 : (ALIGN)
+
+ /* Alignment is not required by the hardware. */
+ #define STRICT_ALIGNMENT 0
+--- gcc/config/i386/i386.h (revision 199897)
++++ gcc/config/i386/i386.h (revision 199898)
+@@ -859,7 +859,18 @@ enum target_cpu_default
+ cause character arrays to be word-aligned so that `strcpy' calls
+ that copy constants to character arrays can be done inline. */
+
+-#define DATA_ALIGNMENT(TYPE, ALIGN) ix86_data_alignment ((TYPE), (ALIGN))
++#define DATA_ALIGNMENT(TYPE, ALIGN) \
++ ix86_data_alignment ((TYPE), (ALIGN), true)
++
++/* Similar to DATA_ALIGNMENT, but for the cases where the ABI mandates
++ some alignment increase, instead of optimization only purposes. E.g.
++ AMD x86-64 psABI says that variables with array type larger than 15 bytes
++ must be aligned to 16 byte boundaries.
++
++ If this macro is not defined, then ALIGN is used. */
++
++#define DATA_ABI_ALIGNMENT(TYPE, ALIGN) \
++ ix86_data_alignment ((TYPE), (ALIGN), false)
+
+ /* If defined, a C expression to compute the alignment for a local
+ variable. TYPE is the data type, and ALIGN is the alignment that
+--- gcc/config/i386/i386-protos.h (revision 199897)
++++ gcc/config/i386/i386-protos.h (revision 199898)
+@@ -207,7 +207,7 @@ extern void init_cumulative_args (CUMULA
+ #endif /* RTX_CODE */
+
+ #ifdef TREE_CODE
+-extern int ix86_data_alignment (tree, int);
++extern int ix86_data_alignment (tree, int, bool);
+ extern unsigned int ix86_local_alignment (tree, enum machine_mode,
+ unsigned int);
+ extern unsigned int ix86_minimum_alignment (tree, enum machine_mode,
+--- gcc/config/i386/i386.c (revision 199897)
++++ gcc/config/i386/i386.c (revision 199898)
+@@ -25292,12 +25292,13 @@ ix86_constant_alignment (tree exp, int a
+ instead of that alignment to align the object. */
+
+ int
+-ix86_data_alignment (tree type, int align)
++ix86_data_alignment (tree type, int align, bool opt)
+ {
+ int max_align
+ = optimize_size ? BITS_PER_WORD : MIN (256, MAX_OFILE_ALIGNMENT);
+
+- if (AGGREGATE_TYPE_P (type)
++ if (opt
++ && AGGREGATE_TYPE_P (type)
+ && TYPE_SIZE (type)
+ && TREE_CODE (TYPE_SIZE (type)) == INTEGER_CST
+ && (TREE_INT_CST_LOW (TYPE_SIZE (type)) >= (unsigned) max_align
+@@ -25309,14 +25310,17 @@ ix86_data_alignment (tree type, int alig
+ to 16byte boundary. */
+ if (TARGET_64BIT)
+ {
+- if (AGGREGATE_TYPE_P (type)
+- && TYPE_SIZE (type)
+- && TREE_CODE (TYPE_SIZE (type)) == INTEGER_CST
+- && (TREE_INT_CST_LOW (TYPE_SIZE (type)) >= 128
+- || TREE_INT_CST_HIGH (TYPE_SIZE (type))) && align < 128)
++ if ((opt ? AGGREGATE_TYPE_P (type) : TREE_CODE (type) == ARRAY_TYPE)
++ && TYPE_SIZE (type)
++ && TREE_CODE (TYPE_SIZE (type)) == INTEGER_CST
++ && (TREE_INT_CST_LOW (TYPE_SIZE (type)) >= 128
++ || TREE_INT_CST_HIGH (TYPE_SIZE (type))) && align < 128)
+ return 128;
+ }
+
++ if (!opt)
++ return align;
++
+ if (TREE_CODE (type) == ARRAY_TYPE)
+ {
+ if (TYPE_MODE (TREE_TYPE (type)) == DFmode && align < 64)
+--- gcc/config/c6x/c6x.h (revision 199897)
++++ gcc/config/c6x/c6x.h (revision 199898)
+@@ -134,7 +134,7 @@ extern c6x_cpu_t c6x_arch;
+ Really only externally visible arrays must be aligned this way, as
+ only those are directly visible from another compilation unit. But
+ we don't have that information available here. */
+-#define DATA_ALIGNMENT(TYPE, ALIGN) \
++#define DATA_ABI_ALIGNMENT(TYPE, ALIGN) \
+ (((ALIGN) < BITS_PER_UNIT * 8 && TREE_CODE (TYPE) == ARRAY_TYPE) \
+ ? BITS_PER_UNIT * 8 : (ALIGN))
+
+--- gcc/config/mmix/mmix.h (revision 199897)
++++ gcc/config/mmix/mmix.h (revision 199898)
+@@ -164,7 +164,7 @@ struct GTY(()) machine_function
+ /* Copied from elfos.h. */
+ #define MAX_OFILE_ALIGNMENT (32768 * 8)
+
+-#define DATA_ALIGNMENT(TYPE, BASIC_ALIGN) \
++#define DATA_ABI_ALIGNMENT(TYPE, BASIC_ALIGN) \
+ mmix_data_alignment (TYPE, BASIC_ALIGN)
+
+ #define CONSTANT_ALIGNMENT(CONSTANT, BASIC_ALIGN) \
+--- gcc/config/mmix/mmix.c (revision 199897)
++++ gcc/config/mmix/mmix.c (revision 199898)
+@@ -313,7 +313,7 @@ mmix_init_machine_status (void)
+ return ggc_alloc_cleared_machine_function ();
+ }
+
+-/* DATA_ALIGNMENT.
++/* DATA_ABI_ALIGNMENT.
+ We have trouble getting the address of stuff that is located at other
+ than 32-bit alignments (GETA requirements), so try to give everything
+ at least 32-bit alignment. */
+--- gcc/testsuite/gcc.target/i386/memcpy-1.c (revision 199897)
++++ gcc/testsuite/gcc.target/i386/memcpy-1.c (revision 199898)
+@@ -1,6 +1,6 @@
+ /* { dg-do compile } */
+ /* { dg-require-effective-target ia32 } */
+-/* { dg-options "-O2 -march=pentiumpro -minline-all-stringops" } */
++/* { dg-options "-O2 -march=pentiumpro -minline-all-stringops -fno-common" } */
+ /* { dg-final { scan-assembler "rep" } } */
+ /* { dg-final { scan-assembler "movs" } } */
+ /* { dg-final { scan-assembler-not "test" } } */
+--- gcc/testsuite/gcc.target/i386/vect-sizes-1.c (revision 199897)
++++ gcc/testsuite/gcc.target/i386/vect-sizes-1.c (revision 199898)
+@@ -1,5 +1,5 @@
+ /* { dg-do compile } */
+-/* { dg-options "-O3 -ffast-math -mavx -mtune=generic" } */
++/* { dg-options "-O3 -ffast-math -mavx -mtune=generic -fno-common" } */
+
+ double a[1024];
+
+--- gcc/testsuite/gcc.target/i386/avx256-unaligned-load-4.c (revision 199897)
++++ gcc/testsuite/gcc.target/i386/avx256-unaligned-load-4.c (revision 199898)
+@@ -1,5 +1,5 @@
+ /* { dg-do compile } */
+-/* { dg-options "-O3 -dp -mavx -mno-avx256-split-unaligned-load -mno-avx256-split-unaligned-store" } */
++/* { dg-options "-O3 -dp -mavx -mno-avx256-split-unaligned-load -mno-avx256-split-unaligned-store -fno-common" } */
+
+ #define N 1024
+
+--- gcc/testsuite/gcc.target/i386/avx256-unaligned-store-1.c (revision 199897)
++++ gcc/testsuite/gcc.target/i386/avx256-unaligned-store-1.c (revision 199898)
+@@ -1,5 +1,5 @@
+ /* { dg-do compile } */
+-/* { dg-options "-O3 -dp -mavx -mavx256-split-unaligned-store" } */
++/* { dg-options "-O3 -dp -mavx -mavx256-split-unaligned-store -fno-common" } */
+
+ #define N 1024
+
+--- gcc/testsuite/gcc.target/i386/avx256-unaligned-store-3.c (revision 199897)
++++ gcc/testsuite/gcc.target/i386/avx256-unaligned-store-3.c (revision 199898)
+@@ -1,5 +1,5 @@
+ /* { dg-do compile } */
+-/* { dg-options "-O3 -dp -mavx -mavx256-split-unaligned-store -mtune=generic" } */
++/* { dg-options "-O3 -dp -mavx -mavx256-split-unaligned-store -mtune=generic -fno-common" } */
+
+ #define N 1024
+
+--- gcc/testsuite/gcc.target/i386/avx256-unaligned-store-4.c (revision 199897)
++++ gcc/testsuite/gcc.target/i386/avx256-unaligned-store-4.c (revision 199898)
+@@ -1,5 +1,5 @@
+ /* { dg-do compile } */
+-/* { dg-options "-O3 -dp -mavx -mno-avx256-split-unaligned-load -mno-avx256-split-unaligned-store" } */
++/* { dg-options "-O3 -dp -mavx -mno-avx256-split-unaligned-load -mno-avx256-split-unaligned-store -fno-common" } */
+
+ #define N 1024
+
+--- gcc/testsuite/gcc.target/i386/pr56564-1.c (revision 0)
++++ gcc/testsuite/gcc.target/i386/pr56564-1.c (revision 199985)
+@@ -0,0 +1,26 @@
++/* PR target/56564 */
++/* { dg-do compile { target { fpic && lp64 } } } */
++/* { dg-skip-if "No symbol interposition for PIC" { *-*-mingw* *-*-cygwin* *-*-darwin* } } */
++/* { dg-options "-O3 -fpic -fdump-tree-optimized" } */
++
++struct S { long a, b; } s = { 5, 6 };
++char t[16] = { 7 };
++
++int
++foo (void)
++{
++ return ((__UINTPTR_TYPE__) &s) & 15;
++}
++
++int
++bar (void)
++{
++ return ((__UINTPTR_TYPE__) &t[0]) & 15;
++}
++
++/* { dg-final { scan-tree-dump-times "&s" 1 "optimized" } } */
++/* { dg-final { scan-tree-dump-times "&t" 0 "optimized" } } */
++/* { dg-final { scan-tree-dump-times "return 0" 1 "optimized" } } */
++/* { dg-final { scan-assembler ".align\[ \t]*16\[^:]*\[\n\r]s:" { target { *-*-linux* } } } } */
++/* { dg-final { scan-assembler ".align\[ \t]*16\[^:]*\[\n\r]t:" { target { *-*-linux* } } } } */
++/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- gcc/testsuite/gcc.target/i386/pr56564-2.c (revision 0)
++++ gcc/testsuite/gcc.target/i386/pr56564-2.c (revision 199898)
+@@ -0,0 +1,25 @@
++/* PR target/56564 */
++/* { dg-do compile { target { *-*-linux* && lp64 } } } */
++/* { dg-options "-O3 -fno-pic -fdump-tree-optimized" } */
++
++struct S { long a, b; } s = { 5, 6 };
++char t[16] = { 7 };
++
++int
++foo (void)
++{
++ return ((__UINTPTR_TYPE__) &s) & 15;
++}
++
++int
++bar (void)
++{
++ return ((__UINTPTR_TYPE__) &t[0]) & 15;
++}
++
++/* { dg-final { scan-tree-dump-times "&s" 0 "optimized" } } */
++/* { dg-final { scan-tree-dump-times "&t" 0 "optimized" } } */
++/* { dg-final { scan-tree-dump-times "return 0" 2 "optimized" } } */
++/* { dg-final { scan-assembler ".align\[ \t]*16\[^:]*\[\n\r]s:" { target { *-*-linux* } } } } */
++/* { dg-final { scan-assembler ".align\[ \t]*16\[^:]*\[\n\r]t:" { target { *-*-linux* } } } } */
++/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- gcc/testsuite/gcc.target/i386/pr56564-3.c (revision 0)
++++ gcc/testsuite/gcc.target/i386/pr56564-3.c (revision 199985)
+@@ -0,0 +1,29 @@
++/* PR target/56564 */
++/* { dg-do compile { target { fpic && lp64 } } } */
++/* { dg-skip-if "No symbol interposition for PIC" { *-*-mingw* *-*-cygwin* *-*-darwin* } } */
++/* { dg-options "-O3 -fpic -fdump-tree-optimized" } */
++
++__thread struct S { long a, b; } s = { 5, 6 };
++__thread char t[16] = { 7 };
++
++int
++foo (void)
++{
++ return ((__UINTPTR_TYPE__) &s) & 15;
++}
++
++/* For backwards compatibility we don't assume that t must
++ be aligned to 16 bytes, but align it anyway. */
++
++int
++bar (void)
++{
++ return ((__UINTPTR_TYPE__) &t[0]) & 15;
++}
++
++/* { dg-final { scan-tree-dump-times "&s" 1 "optimized" } } */
++/* { dg-final { scan-tree-dump-times "&t" 1 "optimized" } } */
++/* { dg-final { scan-tree-dump-times "return 0" 0 "optimized" } } */
++/* { dg-final { scan-assembler-not ".align\[ \t]*16\[^:]*\[\n\r]s:" { target { *-*-linux* } } } } */
++/* { dg-final { scan-assembler ".align\[ \t]*16\[^:]*\[\n\r]t:" { target { *-*-linux* } } } } */
++/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- gcc/testsuite/gcc.target/i386/pr56564-4.c (revision 0)
++++ gcc/testsuite/gcc.target/i386/pr56564-4.c (revision 199898)
+@@ -0,0 +1,22 @@
++/* PR target/56564 */
++/* { dg-do compile { target { *-*-linux* && lp64 } } } */
++/* { dg-options "-O3 -fno-pic -fdump-tree-optimized" } */
++
++__thread struct S { long a, b; } s = { 5, 6 };
++__thread char t[16] = { 7 };
++
++int
++foo (void)
++{
++ return ((__UINTPTR_TYPE__) &s) & 15;
++}
++
++int
++bar (void)
++{
++ return ((__UINTPTR_TYPE__) &t[0]) & 15;
++}
++
++/* { dg-final { scan-assembler-not ".align\[ \t]*16\[^:]*\[\n\r]s:" { target { *-*-linux* } } } } */
++/* { dg-final { scan-assembler ".align\[ \t]*16\[^:]*\[\n\r]t:" { target { *-*-linux* } } } } */
++/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- gcc/testsuite/gcc.dg/vect/costmodel/i386/costmodel-vect-31.c (revision 199897)
++++ gcc/testsuite/gcc.dg/vect/costmodel/i386/costmodel-vect-31.c (revision 199898)
+@@ -18,7 +18,7 @@ struct s{
+ struct t e; /* unaligned (offset 2N+4N+4 B) */
+ };
+
+-struct s tmp;
++struct s tmp = { 1 };
+
+ int main1 ()
+ {
+--- gcc/testsuite/gcc.dg/vect/costmodel/x86_64/costmodel-vect-31.c (revision 199897)
++++ gcc/testsuite/gcc.dg/vect/costmodel/x86_64/costmodel-vect-31.c (revision 199898)
+@@ -18,7 +18,7 @@ struct s{
+ struct t e; /* unaligned (offset 2N+4N+4 B) */
+ };
+
+-struct s tmp;
++struct s tmp = { 1 };
+
+ int main1 ()
+ {
+--- gcc/testsuite/gcc.dg/tree-ssa/loop-19.c (revision 200212)
++++ gcc/testsuite/gcc.dg/tree-ssa/loop-19.c (revision 200213)
+@@ -6,7 +6,7 @@
+
+ /* { dg-do compile { target { i?86-*-* || { x86_64-*-* || powerpc_hard_double } } } } */
+ /* { dg-require-effective-target nonpic } */
+-/* { dg-options "-O3 -fno-tree-loop-distribute-patterns -fno-prefetch-loop-arrays -fdump-tree-optimized" } */
++/* { dg-options "-O3 -fno-tree-loop-distribute-patterns -fno-prefetch-loop-arrays -fdump-tree-optimized -fno-common" } */
+
+ # define N 2000000
+ double a[N],c[N];
diff --git a/SOURCES/gcc48-pr60010.patch b/SOURCES/gcc48-pr60010.patch
new file mode 100644
index 0000000..0baa553
--- /dev/null
+++ b/SOURCES/gcc48-pr60010.patch
@@ -0,0 +1,16 @@
+2014-02-14 Kyle McMartin
+
+ PR pch/60010
+ * config/host-linux.c (TRY_EMPTY_VM_SPACE): Define for AArch64.
+
+--- gcc/config/host-linux.c (revision 207784)
++++ gcc/config/host-linux.c (revision 207785)
+@@ -86,6 +86,8 @@
+ # define TRY_EMPTY_VM_SPACE 0x60000000
+ #elif defined(__mc68000__)
+ # define TRY_EMPTY_VM_SPACE 0x40000000
++#elif defined(__aarch64__)
++# define TRY_EMPTY_VM_SPACE 0x1000000000
+ #elif defined(__ARM_EABI__)
+ # define TRY_EMPTY_VM_SPACE 0x60000000
+ #elif defined(__mips__) && defined(__LP64__)
diff --git a/SOURCES/gcc48-pr62258.patch b/SOURCES/gcc48-pr62258.patch
new file mode 100644
index 0000000..4589214
--- /dev/null
+++ b/SOURCES/gcc48-pr62258.patch
@@ -0,0 +1,87 @@
+2015-09-03 Jonathan Wakely
+
+ Backport from mainline
+ 2015-04-27 Dmitry Prokoptsev
+ Michael Hanselmann
+
+ PR libstdc++/62258
+ * libsupc++/eh_ptr.cc (rethrow_exception): Increment count of
+ uncaught exceptions.
+ * testsuite/18_support/exception_ptr/62258.cc: New.
+
+--- libstdc++-v3/libsupc++/eh_ptr.cc (revision 227455)
++++ libstdc++-v3/libsupc++/eh_ptr.cc (revision 227456)
+@@ -245,6 +245,9 @@ std::rethrow_exception(std::exception_pt
+ __GXX_INIT_DEPENDENT_EXCEPTION_CLASS(dep->unwindHeader.exception_class);
+ dep->unwindHeader.exception_cleanup = __gxx_dependent_exception_cleanup;
+
++ __cxa_eh_globals *globals = __cxa_get_globals ();
++ globals->uncaughtExceptions += 1;
++
+ #ifdef _GLIBCXX_SJLJ_EXCEPTIONS
+ _Unwind_SjLj_RaiseException (&dep->unwindHeader);
+ #else
+--- libstdc++-v3/testsuite/18_support/exception_ptr/62258.cc (revision 0)
++++ libstdc++-v3/testsuite/18_support/exception_ptr/62258.cc (revision 227456)
+@@ -0,0 +1,61 @@
++// { dg-options "-std=gnu++11" }
++// { dg-require-atomic-builtins "" }
++
++// Copyright (C) 2015 Free Software Foundation, Inc.
++//
++// This file is part of the GNU ISO C++ Library. This library is free
++// software; you can redistribute it and/or modify it under the
++// terms of the GNU General Public License as published by the
++// Free Software Foundation; either version 3, or (at your option)
++// any later version.
++
++// This library is distributed in the hope that it will be useful,
++// but WITHOUT ANY WARRANTY; without even the implied warranty of
++// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++// GNU General Public License for more details.
++
++// You should have received a copy of the GNU General Public License along
++// with this library; see the file COPYING3. If not see
++// .
++
++// PR libstdc++/62258
++
++#include
++#include
++
++struct check_on_destruct
++{
++ ~check_on_destruct();
++};
++
++check_on_destruct::~check_on_destruct()
++{
++ VERIFY(std::uncaught_exception());
++}
++
++int main ()
++{
++ VERIFY(!std::uncaught_exception());
++
++ try
++ {
++ check_on_destruct check;
++
++ try
++ {
++ throw 1;
++ }
++ catch (...)
++ {
++ VERIFY(!std::uncaught_exception());
++
++ std::rethrow_exception(std::current_exception());
++ }
++ }
++ catch (...)
++ {
++ VERIFY(!std::uncaught_exception());
++ }
++
++ VERIFY(!std::uncaught_exception());
++}
diff --git a/SOURCES/gcc48-pr63293.patch b/SOURCES/gcc48-pr63293.patch
new file mode 100644
index 0000000..4b11a8c
--- /dev/null
+++ b/SOURCES/gcc48-pr63293.patch
@@ -0,0 +1,60 @@
+2014-11-04 Jiong Wang
+ Wilco Dijkstra
+
+ PR target/63293
+ * config/aarch64/aarch64.c (aarch64_expand_epiloue): Add barriers before
+ stack adjustment.
+
+--- gcc/config/aarch64/aarch64.c (revision 217090)
++++ gcc/config/aarch64/aarch64.c (revision 217091)
+@@ -1989,6 +1989,9 @@ aarch64_expand_epilogue (bool for_sibcal
+ rtx insn;
+ rtx cfa_reg;
+ rtx cfi_ops = NULL;
++ /* We need to add memory barrier to prevent read from deallocated stack. */
++ bool need_barrier_p = (get_frame_size () != 0
++ || cfun->machine->saved_varargs_size);
+
+ aarch64_layout_frame ();
+ original_frame_size = get_frame_size () + cfun->machine->saved_varargs_size;
+@@ -2030,6 +2033,9 @@ aarch64_expand_epilogue (bool for_sibcal
+ if (frame_pointer_needed
+ && (crtl->outgoing_args_size || cfun->calls_alloca))
+ {
++ if (cfun->calls_alloca)
++ emit_insn (gen_stack_tie (stack_pointer_rtx, stack_pointer_rtx));
++
+ insn = emit_insn (gen_add3_insn (stack_pointer_rtx,
+ hard_frame_pointer_rtx,
+ GEN_INT (- fp_offset)));
+@@ -2048,6 +2054,9 @@ aarch64_expand_epilogue (bool for_sibcal
+ /* Restore the frame pointer and lr if the frame pointer is needed. */
+ if (offset > 0)
+ {
++ if (need_barrier_p && (!frame_pointer_needed || !fp_offset))
++ emit_insn (gen_stack_tie (stack_pointer_rtx, stack_pointer_rtx));
++
+ if (frame_pointer_needed)
+ {
+ rtx mem_fp, mem_lr;
+@@ -2067,6 +2076,10 @@ aarch64_expand_epilogue (bool for_sibcal
+ + UNITS_PER_WORD));
+ emit_insn (gen_load_pairdi (reg_fp, mem_fp, reg_lr, mem_lr));
+
++ if (need_barrier_p)
++ emit_insn (gen_stack_tie (stack_pointer_rtx,
++ stack_pointer_rtx));
++
+ insn = emit_insn (gen_add2_insn (stack_pointer_rtx,
+ GEN_INT (offset)));
+ }
+@@ -2128,6 +2141,9 @@ aarch64_expand_epilogue (bool for_sibcal
+
+ if (frame_size > -1)
+ {
++ if (need_barrier_p)
++ emit_insn (gen_stack_tie (stack_pointer_rtx, stack_pointer_rtx));
++
+ if (frame_size >= 0x1000000)
+ {
+ rtx op0 = gen_rtx_REG (Pmode, IP0_REGNUM);
diff --git a/SOURCES/gcc48-pr65142.patch b/SOURCES/gcc48-pr65142.patch
new file mode 100644
index 0000000..367ec16
--- /dev/null
+++ b/SOURCES/gcc48-pr65142.patch
@@ -0,0 +1,23 @@
+2016-06-01 Jakub Jelinek
+
+ Backported from mainline
+ 2015-10-02 Jonathan Wakely
+
+ PR libstdc++/65142
+ * src/c++11/random.cc (random_device::_M_getval()): Check read result.
+
+--- libstdc++-v3/src/c++11/random.cc (revision 228423)
++++ libstdc++-v3/src/c++11/random.cc (revision 228424)
+@@ -126,8 +126,10 @@ namespace std _GLIBCXX_VISIBILITY(defaul
+ #endif
+
+ result_type __ret;
+- std::fread(reinterpret_cast(&__ret), sizeof(result_type),
+- 1, _M_file);
++ const size_t e = std::fread(reinterpret_cast(&__ret),
++ sizeof(result_type), 1, _M_file);
++ if (e != 1)
++ std::__throw_runtime_error(__N("random_device could not be read"));
+ return __ret;
+ }
+
diff --git a/SOURCES/gcc48-pr66731.patch b/SOURCES/gcc48-pr66731.patch
new file mode 100644
index 0000000..daf20b3
--- /dev/null
+++ b/SOURCES/gcc48-pr66731.patch
@@ -0,0 +1,111 @@
+2015-08-04 Szabolcs Nagy
+
+ Backport from mainline:
+ 2015-07-06 Szabolcs Nagy
+
+ PR target/66731
+ * config/aarch64/aarch64.md (fnmul3): Handle -frounding-math.
+
+ * gcc.target/aarch64/fnmul-1.c: New.
+ * gcc.target/aarch64/fnmul-2.c: New.
+ * gcc.target/aarch64/fnmul-3.c: New.
+ * gcc.target/aarch64/fnmul-4.c: New.
+
+--- gcc/config/aarch64/aarch64.md (revision 226591)
++++ gcc/config/aarch64/aarch64.md (revision 226592)
+@@ -3101,6 +3101,17 @@
+ (mult:GPF
+ (neg:GPF (match_operand:GPF 1 "register_operand" "w"))
+ (match_operand:GPF 2 "register_operand" "w")))]
++ "TARGET_FLOAT && !flag_rounding_math"
++ "fnmul\\t%0, %1, %2"
++ [(set_attr "v8type" "fmul")
++ (set_attr "mode" "")]
++)
++
++(define_insn "*fnmul3"
++ [(set (match_operand:GPF 0 "register_operand" "=w")
++ (neg:GPF (mult:GPF
++ (match_operand:GPF 1 "register_operand" "w")
++ (match_operand:GPF 2 "register_operand" "w"))))]
+ "TARGET_FLOAT"
+ "fnmul\\t%0, %1, %2"
+ [(set_attr "v8type" "fmul")
+--- gcc/testsuite/gcc.target/aarch64/fnmul-1.c (nonexistent)
++++ gcc/testsuite/gcc.target/aarch64/fnmul-1.c (revision 226592)
+@@ -0,0 +1,16 @@
++/* { dg-do compile } */
++/* { dg-options "-O2" } */
++
++double
++foo_d (double a, double b)
++{
++ /* { dg-final { scan-assembler "fnmul\\td\[0-9\]+, d\[0-9\]+, d\[0-9\]+" } } */
++ return -a * b;
++}
++
++float
++foo_s (float a, float b)
++{
++ /* { dg-final { scan-assembler "fnmul\\ts\[0-9\]+, s\[0-9\]+, s\[0-9\]+" } } */
++ return -a * b;
++}
+--- gcc/testsuite/gcc.target/aarch64/fnmul-2.c (nonexistent)
++++ gcc/testsuite/gcc.target/aarch64/fnmul-2.c (revision 226592)
+@@ -0,0 +1,18 @@
++/* { dg-do compile } */
++/* { dg-options "-O2 -frounding-math" } */
++
++double
++foo_d (double a, double b)
++{
++ /* { dg-final { scan-assembler "fneg\\td\[0-9\]+, d\[0-9\]+" } } */
++ /* { dg-final { scan-assembler "fmul\\td\[0-9\]+, d\[0-9\]+, d\[0-9\]+" } } */
++ return -a * b;
++}
++
++float
++foo_s (float a, float b)
++{
++ /* { dg-final { scan-assembler "fneg\\ts\[0-9\]+, s\[0-9\]+" } } */
++ /* { dg-final { scan-assembler "fmul\\ts\[0-9\]+, s\[0-9\]+, s\[0-9\]+" } } */
++ return -a * b;
++}
+--- gcc/testsuite/gcc.target/aarch64/fnmul-3.c (nonexistent)
++++ gcc/testsuite/gcc.target/aarch64/fnmul-3.c (revision 226592)
+@@ -0,0 +1,16 @@
++/* { dg-do compile } */
++/* { dg-options "-O2" } */
++
++double
++foo_d (double a, double b)
++{
++ /* { dg-final { scan-assembler "fnmul\\td\[0-9\]+, d\[0-9\]+, d\[0-9\]+" } } */
++ return -(a * b);
++}
++
++float
++foo_s (float a, float b)
++{
++ /* { dg-final { scan-assembler "fnmul\\ts\[0-9\]+, s\[0-9\]+, s\[0-9\]+" } } */
++ return -(a * b);
++}
+--- gcc/testsuite/gcc.target/aarch64/fnmul-4.c (nonexistent)
++++ gcc/testsuite/gcc.target/aarch64/fnmul-4.c (revision 226592)
+@@ -0,0 +1,16 @@
++/* { dg-do compile } */
++/* { dg-options "-O2 -frounding-math" } */
++
++double
++foo_d (double a, double b)
++{
++ /* { dg-final { scan-assembler "fnmul\\td\[0-9\]+, d\[0-9\]+, d\[0-9\]+" } } */
++ return -(a * b);
++}
++
++float
++foo_s (float a, float b)
++{
++ /* { dg-final { scan-assembler "fnmul\\ts\[0-9\]+, s\[0-9\]+, s\[0-9\]+" } } */
++ return -(a * b);
++}
diff --git a/SOURCES/gcc48-pr67281.patch b/SOURCES/gcc48-pr67281.patch
new file mode 100644
index 0000000..9637e08
--- /dev/null
+++ b/SOURCES/gcc48-pr67281.patch
@@ -0,0 +1,348 @@
+2015-10-14 Peter Bergner
+ Torvald Riegel
+
+ PR target/67281
+ * config/rs6000/htm.md (UNSPEC_HTM_FENCE): New.
+ (tabort, tabortc, tabortci, tbegin, tcheck, tend,
+ trechkpt, treclaim, tsr, ttest): Rename define_insns from this...
+ (*tabort, *tabortc, *tabortci, *tbegin, *tcheck, *tend,
+ *trechkpt, *treclaim, *tsr, *ttest): ...to this. Add memory barrier.
+ (tabort, tabortc, tabortci, tbegin, tcheck, tend,
+ trechkpt, treclaim, tsr, ttest): New define_expands.
+ * config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Define
+ __TM_FENCE__ for htm.
+ * doc/extend.texi: Update documentation for htm builtins.
+
+2015-08-03 Peter Bergner
+
+ * config/rs6000/htm.md (tabort.): Restrict the source operand to
+ using a base register.
+
+ * gcc.target/powerpc/htm-tabort-no-r0.c: New test.
+
+--- gcc/doc/extend.texi (revision 228826)
++++ gcc/doc/extend.texi (revision 228827)
+@@ -16092,6 +16092,28 @@ unsigned int __builtin_tresume (void)
+ unsigned int __builtin_tsuspend (void)
+ @end smallexample
+
++Note that the semantics of the above HTM builtins are required to mimic
++the locking semantics used for critical sections. Builtins that are used
++to create a new transaction or restart a suspended transaction must have
++lock acquisition like semantics while those builtins that end or suspend a
++transaction must have lock release like semantics. Specifically, this must
++mimic lock semantics as specified by C++11, for example: Lock acquisition is
++as-if an execution of __atomic_exchange_n(&globallock,1,__ATOMIC_ACQUIRE)
++that returns 0, and lock release is as-if an execution of
++__atomic_store(&globallock,0,__ATOMIC_RELEASE), with globallock being an
++implicit implementation-defined lock used for all transactions. The HTM
++instructions associated with with the builtins inherently provide the
++correct acquisition and release hardware barriers required. However,
++the compiler must also be prohibited from moving loads and stores across
++the builtins in a way that would violate their semantics. This has been
++accomplished by adding memory barriers to the associated HTM instructions
++(which is a conservative approach to provide acquire and release semantics).
++Earlier versions of the compiler did not treat the HTM instructions as
++memory barriers. A @code{__TM_FENCE__} macro has been added, which can
++be used to determine whether the current compiler treats HTM instructions
++as memory barriers or not. This allows the user to explicitly add memory
++barriers to their code when using an older version of the compiler.
++
+ The following set of built-in functions are available to gain access
+ to the HTM specific special purpose registers.
+
+--- gcc/config/rs6000/htm.md (revision 226531)
++++ gcc/config/rs6000/htm.md (revision 228827)
+@@ -27,6 +27,14 @@ (define_constants
+ ])
+
+ ;;
++;; UNSPEC usage
++;;
++
++(define_c_enum "unspec"
++ [UNSPEC_HTM_FENCE
++ ])
++
++;;
+ ;; UNSPEC_VOLATILE usage
+ ;;
+
+@@ -45,96 +53,223 @@ (define_c_enum "unspecv"
+ UNSPECV_HTM_MTSPR
+ ])
+
++(define_expand "tabort"
++ [(parallel
++ [(set (match_operand:CC 1 "cc_reg_operand" "=x")
++ (unspec_volatile:CC [(match_operand:SI 0 "base_reg_operand" "b")]
++ UNSPECV_HTM_TABORT))
++ (set (match_dup 2) (unspec:BLK [(match_dup 2)] UNSPEC_HTM_FENCE))])]
++ "TARGET_HTM"
++{
++ operands[2] = gen_rtx_MEM (BLKmode, gen_rtx_SCRATCH (Pmode));
++ MEM_VOLATILE_P (operands[2]) = 1;
++})
+
+-(define_insn "tabort"
++(define_insn "*tabort"
+ [(set (match_operand:CC 1 "cc_reg_operand" "=x")
+- (unspec_volatile:CC [(match_operand:SI 0 "gpc_reg_operand" "r")]
+- UNSPECV_HTM_TABORT))]
++ (unspec_volatile:CC [(match_operand:SI 0 "base_reg_operand" "b")]
++ UNSPECV_HTM_TABORT))
++ (set (match_operand:BLK 2) (unspec:BLK [(match_dup 2)] UNSPEC_HTM_FENCE))]
+ "TARGET_HTM"
+ "tabort. %0"
+ [(set_attr "type" "htm")
+ (set_attr "length" "4")])
+
+-(define_insn "tabortc"
++(define_expand "tabortc"
++ [(parallel
++ [(set (match_operand:CC 3 "cc_reg_operand" "=x")
++ (unspec_volatile:CC [(match_operand 0 "u5bit_cint_operand" "n")
++ (match_operand:GPR 1 "gpc_reg_operand" "r")
++ (match_operand:GPR 2 "gpc_reg_operand" "r")]
++ UNSPECV_HTM_TABORTXC))
++ (set (match_dup 4) (unspec:BLK [(match_dup 4)] UNSPEC_HTM_FENCE))])]
++ "TARGET_HTM"
++{
++ operands[4] = gen_rtx_MEM (BLKmode, gen_rtx_SCRATCH (Pmode));
++ MEM_VOLATILE_P (operands[4]) = 1;
++})
++
++(define_insn "*tabortc"
+ [(set (match_operand:CC 3 "cc_reg_operand" "=x")
+ (unspec_volatile:CC [(match_operand 0 "u5bit_cint_operand" "n")
+ (match_operand:GPR 1 "gpc_reg_operand" "r")
+ (match_operand:GPR 2 "gpc_reg_operand" "r")]
+- UNSPECV_HTM_TABORTXC))]
++ UNSPECV_HTM_TABORTXC))
++ (set (match_operand:BLK 4) (unspec:BLK [(match_dup 4)] UNSPEC_HTM_FENCE))]
+ "TARGET_HTM"
+ "tabortc. %0,%1,%2"
+ [(set_attr "type" "htm")
+ (set_attr "length" "4")])
+
+-(define_insn "tabortci"
++(define_expand "tabortci"
++ [(parallel
++ [(set (match_operand:CC 3 "cc_reg_operand" "=x")
++ (unspec_volatile:CC [(match_operand 0 "u5bit_cint_operand" "n")
++ (match_operand:GPR 1 "gpc_reg_operand" "r")
++ (match_operand 2 "s5bit_cint_operand" "n")]
++ UNSPECV_HTM_TABORTXCI))
++ (set (match_dup 4) (unspec:BLK [(match_dup 4)] UNSPEC_HTM_FENCE))])]
++ "TARGET_HTM"
++{
++ operands[4] = gen_rtx_MEM (BLKmode, gen_rtx_SCRATCH (Pmode));
++ MEM_VOLATILE_P (operands[4]) = 1;
++})
++
++(define_insn "*tabortci"
+ [(set (match_operand:CC 3 "cc_reg_operand" "=x")
+ (unspec_volatile:CC [(match_operand 0 "u5bit_cint_operand" "n")
+ (match_operand:GPR 1 "gpc_reg_operand" "r")
+ (match_operand 2 "s5bit_cint_operand" "n")]
+- UNSPECV_HTM_TABORTXCI))]
++ UNSPECV_HTM_TABORTXCI))
++ (set (match_operand:BLK 4) (unspec:BLK [(match_dup 4)] UNSPEC_HTM_FENCE))]
+ "TARGET_HTM"
+ "tabortci. %0,%1,%2"
+ [(set_attr "type" "htm")
+ (set_attr "length" "4")])
+
+-(define_insn "tbegin"
++(define_expand "tbegin"
++ [(parallel
++ [(set (match_operand:CC 1 "cc_reg_operand" "=x")
++ (unspec_volatile:CC [(match_operand 0 "const_0_to_1_operand" "n")]
++ UNSPECV_HTM_TBEGIN))
++ (set (match_dup 2) (unspec:BLK [(match_dup 2)] UNSPEC_HTM_FENCE))])]
++ "TARGET_HTM"
++{
++ operands[2] = gen_rtx_MEM (BLKmode, gen_rtx_SCRATCH (Pmode));
++ MEM_VOLATILE_P (operands[2]) = 1;
++})
++
++(define_insn "*tbegin"
+ [(set (match_operand:CC 1 "cc_reg_operand" "=x")
+ (unspec_volatile:CC [(match_operand 0 "const_0_to_1_operand" "n")]
+- UNSPECV_HTM_TBEGIN))]
++ UNSPECV_HTM_TBEGIN))
++ (set (match_operand:BLK 2) (unspec:BLK [(match_dup 2)] UNSPEC_HTM_FENCE))]
+ "TARGET_HTM"
+ "tbegin. %0"
+ [(set_attr "type" "htm")
+ (set_attr "length" "4")])
+
+-(define_insn "tcheck"
++(define_expand "tcheck"
++ [(parallel
++ [(set (match_operand:CC 0 "cc_reg_operand" "=y")
++ (unspec_volatile:CC [(const_int 0)] UNSPECV_HTM_TCHECK))
++ (set (match_dup 1) (unspec:BLK [(match_dup 1)] UNSPEC_HTM_FENCE))])]
++ "TARGET_HTM"
++{
++ operands[1] = gen_rtx_MEM (BLKmode, gen_rtx_SCRATCH (Pmode));
++ MEM_VOLATILE_P (operands[1]) = 1;
++})
++
++(define_insn "*tcheck"
+ [(set (match_operand:CC 0 "cc_reg_operand" "=y")
+- (unspec_volatile:CC [(const_int 0)]
+- UNSPECV_HTM_TCHECK))]
++ (unspec_volatile:CC [(const_int 0)] UNSPECV_HTM_TCHECK))
++ (set (match_operand:BLK 1) (unspec:BLK [(match_dup 1)] UNSPEC_HTM_FENCE))]
+ "TARGET_HTM"
+ "tcheck %0"
+ [(set_attr "type" "htm")
+ (set_attr "length" "4")])
+
+-(define_insn "tend"
++(define_expand "tend"
++ [(parallel
++ [(set (match_operand:CC 1 "cc_reg_operand" "=x")
++ (unspec_volatile:CC [(match_operand 0 "const_0_to_1_operand" "n")]
++ UNSPECV_HTM_TEND))
++ (set (match_dup 2) (unspec:BLK [(match_dup 2)] UNSPEC_HTM_FENCE))])]
++ "TARGET_HTM"
++{
++ operands[2] = gen_rtx_MEM (BLKmode, gen_rtx_SCRATCH (Pmode));
++ MEM_VOLATILE_P (operands[2]) = 1;
++})
++
++(define_insn "*tend"
+ [(set (match_operand:CC 1 "cc_reg_operand" "=x")
+ (unspec_volatile:CC [(match_operand 0 "const_0_to_1_operand" "n")]
+- UNSPECV_HTM_TEND))]
++ UNSPECV_HTM_TEND))
++ (set (match_operand:BLK 2) (unspec:BLK [(match_dup 2)] UNSPEC_HTM_FENCE))]
+ "TARGET_HTM"
+ "tend. %0"
+ [(set_attr "type" "htm")
+ (set_attr "length" "4")])
+
+-(define_insn "trechkpt"
++(define_expand "trechkpt"
++ [(parallel
++ [(set (match_operand:CC 0 "cc_reg_operand" "=x")
++ (unspec_volatile:CC [(const_int 0)] UNSPECV_HTM_TRECHKPT))
++ (set (match_dup 1) (unspec:BLK [(match_dup 1)] UNSPEC_HTM_FENCE))])]
++ "TARGET_HTM"
++{
++ operands[1] = gen_rtx_MEM (BLKmode, gen_rtx_SCRATCH (Pmode));
++ MEM_VOLATILE_P (operands[1]) = 1;
++})
++
++(define_insn "*trechkpt"
+ [(set (match_operand:CC 0 "cc_reg_operand" "=x")
+- (unspec_volatile:CC [(const_int 0)]
+- UNSPECV_HTM_TRECHKPT))]
++ (unspec_volatile:CC [(const_int 0)] UNSPECV_HTM_TRECHKPT))
++ (set (match_operand:BLK 1) (unspec:BLK [(match_dup 1)] UNSPEC_HTM_FENCE))]
+ "TARGET_HTM"
+ "trechkpt."
+ [(set_attr "type" "htm")
+ (set_attr "length" "4")])
+
+-(define_insn "treclaim"
++(define_expand "treclaim"
++ [(parallel
++ [(set (match_operand:CC 1 "cc_reg_operand" "=x")
++ (unspec_volatile:CC [(match_operand:SI 0 "gpc_reg_operand" "r")]
++ UNSPECV_HTM_TRECLAIM))
++ (set (match_dup 2) (unspec:BLK [(match_dup 2)] UNSPEC_HTM_FENCE))])]
++ "TARGET_HTM"
++{
++ operands[2] = gen_rtx_MEM (BLKmode, gen_rtx_SCRATCH (Pmode));
++ MEM_VOLATILE_P (operands[2]) = 1;
++})
++
++(define_insn "*treclaim"
+ [(set (match_operand:CC 1 "cc_reg_operand" "=x")
+ (unspec_volatile:CC [(match_operand:SI 0 "gpc_reg_operand" "r")]
+- UNSPECV_HTM_TRECLAIM))]
++ UNSPECV_HTM_TRECLAIM))
++ (set (match_operand:BLK 2) (unspec:BLK [(match_dup 2)] UNSPEC_HTM_FENCE))]
+ "TARGET_HTM"
+ "treclaim. %0"
+ [(set_attr "type" "htm")
+ (set_attr "length" "4")])
+
+-(define_insn "tsr"
++(define_expand "tsr"
++ [(parallel
++ [(set (match_operand:CC 1 "cc_reg_operand" "=x")
++ (unspec_volatile:CC [(match_operand 0 "const_0_to_1_operand" "n")]
++ UNSPECV_HTM_TSR))
++ (set (match_dup 2) (unspec:BLK [(match_dup 2)] UNSPEC_HTM_FENCE))])]
++ "TARGET_HTM"
++{
++ operands[2] = gen_rtx_MEM (BLKmode, gen_rtx_SCRATCH (Pmode));
++ MEM_VOLATILE_P (operands[2]) = 1;
++})
++
++(define_insn "*tsr"
+ [(set (match_operand:CC 1 "cc_reg_operand" "=x")
+ (unspec_volatile:CC [(match_operand 0 "const_0_to_1_operand" "n")]
+- UNSPECV_HTM_TSR))]
++ UNSPECV_HTM_TSR))
++ (set (match_operand:BLK 2) (unspec:BLK [(match_dup 2)] UNSPEC_HTM_FENCE))]
+ "TARGET_HTM"
+ "tsr. %0"
+ [(set_attr "type" "htm")
+ (set_attr "length" "4")])
+
+-(define_insn "ttest"
++(define_expand "ttest"
++ [(parallel
++ [(set (match_operand:CC 0 "cc_reg_operand" "=x")
++ (unspec_volatile:CC [(const_int 0)] UNSPECV_HTM_TTEST))
++ (set (match_dup 1) (unspec:BLK [(match_dup 1)] UNSPEC_HTM_FENCE))])]
++ "TARGET_HTM"
++{
++ operands[1] = gen_rtx_MEM (BLKmode, gen_rtx_SCRATCH (Pmode));
++ MEM_VOLATILE_P (operands[1]) = 1;
++})
++
++(define_insn "*ttest"
+ [(set (match_operand:CC 0 "cc_reg_operand" "=x")
+- (unspec_volatile:CC [(const_int 0)]
+- UNSPECV_HTM_TTEST))]
++ (unspec_volatile:CC [(const_int 0)] UNSPECV_HTM_TTEST))
++ (set (match_operand:BLK 1) (unspec:BLK [(match_dup 1)] UNSPEC_HTM_FENCE))]
+ "TARGET_HTM"
+ "tabortwci. 0,1,0"
+ [(set_attr "type" "htm")
+--- gcc/config/rs6000/rs6000-c.c (revision 228826)
++++ gcc/config/rs6000/rs6000-c.c (revision 228827)
+@@ -372,7 +372,11 @@ rs6000_target_modify_macros (bool define
+ if ((flags & OPTION_MASK_VSX) != 0)
+ rs6000_define_or_undefine_macro (define_p, "__VSX__");
+ if ((flags & OPTION_MASK_HTM) != 0)
+- rs6000_define_or_undefine_macro (define_p, "__HTM__");
++ {
++ rs6000_define_or_undefine_macro (define_p, "__HTM__");
++ /* Tell the user that our HTM insn patterns act as memory barriers. */
++ rs6000_define_or_undefine_macro (define_p, "__TM_FENCE__");
++ }
+ if ((flags & OPTION_MASK_P8_VECTOR) != 0)
+ rs6000_define_or_undefine_macro (define_p, "__POWER8_VECTOR__");
+ if ((flags & OPTION_MASK_QUAD_MEMORY) != 0)
+--- gcc/testsuite/gcc.target/powerpc/htm-tabort-no-r0.c (revision 0)
++++ gcc/testsuite/gcc.target/powerpc/htm-tabort-no-r0.c (revision 226532)
+@@ -0,0 +1,12 @@
++/* { dg-do compile { target { powerpc*-*-* } } } */
++/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */
++/* { dg-require-effective-target powerpc_htm_ok } */
++/* { dg-options "-O2 -mhtm -ffixed-r3 -ffixed-r4 -ffixed-r5 -ffixed-r6 -ffixed-r7 -ffixed-r8 -ffixed-r9 -ffixed-r10 -ffixed-r11 -ffixed-r12" } */
++
++/* { dg-final { scan-assembler-not "tabort\\.\[ \t\]0" } } */
++
++int
++foo (void)
++{
++ return __builtin_tabort (10);
++}
diff --git a/SOURCES/gcc48-pr68184.patch b/SOURCES/gcc48-pr68184.patch
new file mode 100644
index 0000000..445aefd
--- /dev/null
+++ b/SOURCES/gcc48-pr68184.patch
@@ -0,0 +1,59 @@
+2017-02-28 Jakub Jelinek
+
+ Backport from mainline
+ 2015-12-02 Jan Hubicka
+
+ PR ipa/68184
+ * cgraphunit.c (cgraph_node::analyze): Set can_throw_external.
+
+ * g++.dg/torture/pr68184.C: New testcase.
+
+--- gcc/cgraphunit.c.jj 2014-09-10 09:15:51.000000000 +0200
++++ gcc/cgraphunit.c 2017-02-28 08:24:44.387385510 +0100
+@@ -626,8 +626,10 @@ cgraph_analyze_function (struct cgraph_n
+ }
+ else if (node->thunk.thunk_p)
+ {
+- cgraph_create_edge (node, cgraph_get_node (node->thunk.alias),
+- NULL, 0, CGRAPH_FREQ_BASE);
++ struct cgraph_node *t = cgraph_get_node (node->thunk.alias);
++ cgraph_create_edge (node, t, NULL, 0,
++ CGRAPH_FREQ_BASE)->can_throw_external
++ = !TREE_NOTHROW (t->symbol.decl);
+ }
+ else if (node->dispatcher_function)
+ {
+--- gcc/testsuite/g++.dg/torture/pr68184.C.jj 2017-02-28 08:26:09.205246069 +0100
++++ gcc/testsuite/g++.dg/torture/pr68184.C 2015-12-03 16:39:34.589010321 +0100
+@@ -0,0 +1,31 @@
++// { dg-do run }
++namespace {
++struct IFoo { virtual void foo() = 0; };
++struct IBar { virtual void bar() = 0; };
++
++struct FooBar : private IBar, private IFoo
++{
++ void call_foo()
++ {
++ try
++ {
++ static_cast(this)->foo();
++ }
++ catch( ... ) {}
++ }
++ void foo() { throw 1; }
++ void bar() {}
++};
++
++void test()
++{
++ FooBar foobar;
++ foobar.call_foo();
++}
++}
++int main()
++{
++ test();
++ return 0;
++}
++
diff --git a/SOURCES/gcc48-pr68680.patch b/SOURCES/gcc48-pr68680.patch
new file mode 100644
index 0000000..59f6ffe
--- /dev/null
+++ b/SOURCES/gcc48-pr68680.patch
@@ -0,0 +1,46 @@
+2015-12-04 Jakub Jelinek
+
+ PR tree-optimization/68680
+ * calls.c (special_function_p): Return ECF_MAY_BE_ALLOCA for
+ BUILT_IN_ALLOCA{,_WITH_ALIGN}.
+
+ * gcc.target/i386/pr68680.c: New test.
+
+--- gcc/calls.c (revision 231278)
++++ gcc/calls.c (revision 231279)
+@@ -564,6 +564,17 @@ special_function_p (const_tree fndecl, i
+ flags |= ECF_NORETURN;
+ }
+
++ if (DECL_BUILT_IN_CLASS (fndecl) == BUILT_IN_NORMAL)
++ switch (DECL_FUNCTION_CODE (fndecl))
++ {
++ case BUILT_IN_ALLOCA:
++ case BUILT_IN_ALLOCA_WITH_ALIGN:
++ flags |= ECF_MAY_BE_ALLOCA;
++ break;
++ default:
++ break;
++ }
++
+ return flags;
+ }
+
+--- gcc/testsuite/gcc.target/i386/pr68680.c (revision 0)
++++ gcc/testsuite/gcc.target/i386/pr68680.c (revision 231279)
+@@ -0,0 +1,15 @@
++/* PR tree-optimization/68680 */
++/* { dg-do compile } */
++/* { dg-options "-O2 -fstack-protector-strong" } */
++
++int foo (char *);
++
++int
++bar (unsigned long x)
++{
++ char a[x];
++ return foo (a);
++}
++
++/* Verify that this function is stack protected. */
++/* { dg-final { scan-assembler "stack_chk_fail" } } */
diff --git a/SOURCES/gcc48-pr69116.patch b/SOURCES/gcc48-pr69116.patch
new file mode 100644
index 0000000..9b93c79
--- /dev/null
+++ b/SOURCES/gcc48-pr69116.patch
@@ -0,0 +1,92 @@
+2016-02-10 Jonathan Wakely
+
+ PR libstdc++/69116
+ * include/bits/valarray_before.h (__fun, __fun_with_valarray): Only
+ define result_type for types which can be safely used with valarrays.
+ * testsuite/26_numerics/valarray/69116.cc: New.
+
+--- libstdc++-v3/include/bits/valarray_before.h (revision 233264)
++++ libstdc++-v3/include/bits/valarray_before.h (revision 233265)
+@@ -331,14 +331,24 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
+ { return pow(__x, __y); }
+ };
+
++ template
++ struct __fun_with_valarray
++ {
++ typedef _Tp result_type;
++ };
++
++ template
++ struct __fun_with_valarray<_Tp, false>
++ {
++ // No result type defined for invalid value types.
++ };
+
+ // We need these bits in order to recover the return type of
+ // some functions/operators now that we're no longer using
+ // function templates.
+ template
+- struct __fun
++ struct __fun : __fun_with_valarray<_Tp>
+ {
+- typedef _Tp result_type;
+ };
+
+ // several specializations for relational operators.
+--- libstdc++-v3/testsuite/26_numerics/valarray/69116.cc (nonexistent)
++++ libstdc++-v3/testsuite/26_numerics/valarray/69116.cc (revision 233265)
+@@ -0,0 +1,53 @@
++// Copyright (C) 2016 Free Software Foundation, Inc.
++//
++// This file is part of the GNU ISO C++ Library. This library is free
++// software; you can redistribute it and/or modify it under the
++// terms of the GNU General Public License as published by the
++// Free Software Foundation; either version 3, or (at your option)
++// any later version.
++
++// This library is distributed in the hope that it will be useful,
++// but WITHOUT ANY WARRANTY; without even the implied warranty of
++// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++// GNU General Public License for more details.
++
++// You should have received a copy of the GNU General Public License along
++// with this library; see the file COPYING3. If not see
++// .
++
++// { dg-do compile }
++// { dg-options "-std=gnu++98" }
++
++// libstdc++/69116
++
++#include
++#include
++
++template
++ void foo(const T&) { }
++
++struct X : std::exception // makes namespace std an associated namespace
++{
++ virtual void pure() = 0;
++
++ typedef void(*func_type)(const X&);
++
++ void operator+(func_type) const;
++ void operator-(func_type) const;
++ void operator*(func_type) const;
++ void operator/(func_type) const;
++ void operator%(func_type) const;
++ void operator<<(func_type) const;
++ void operator>>(func_type) const;
++};
++
++void foo(X& x)
++{
++ x + foo;
++ x - foo;
++ x * foo;
++ x / foo;
++ x % foo;
++ x << foo;
++ x >> foo;
++}
diff --git a/SOURCES/gcc48-pr70549.patch b/SOURCES/gcc48-pr70549.patch
new file mode 100644
index 0000000..429893f
--- /dev/null
+++ b/SOURCES/gcc48-pr70549.patch
@@ -0,0 +1,61 @@
+2017-03-08 Bernd Schmidt
+
+ PR target/70549
+ * config/aarch64/aarch64.c (aarch64_secondary_reload): Reload
+ CORE_REGS rclass constants in [SD]Fmode through FP_REGS.
+
+ * g++.dg/opt/pr70549.C: New test.
+
+--- gcc/config/aarch64/aarch64.c.jj 2017-03-08 15:50:55.000000000 +0100
++++ gcc/config/aarch64/aarch64.c 2017-03-08 16:01:15.426080172 +0100
+@@ -3846,8 +3846,13 @@ aarch64_secondary_reload (bool in_p ATTR
+ && GET_MODE_SIZE (mode) == 16 && MEM_P (x))
+ return FP_REGS;
+
++ if (rclass == CORE_REGS
++ && (mode == SFmode || mode == DFmode)
++ && CONSTANT_P (x))
++ return FP_REGS;
++
+ if (rclass == FP_REGS && (mode == TImode || mode == TFmode) && CONSTANT_P(x))
+- return CORE_REGS;
++ return CORE_REGS;
+
+ return NO_REGS;
+ }
+--- gcc/testsuite/g++.dg/opt/pr70549.C.jj 2017-03-08 16:02:45.104918249 +0100
++++ gcc/testsuite/g++.dg/opt/pr70549.C 2017-03-08 16:02:14.000000000 +0100
+@@ -0,0 +1,33 @@
++// PR target/70549
++// { dg-do compile }
++// { dg-options "-O2" }
++// { dg-additional-options "-fPIC" { target fpic } }
++
++struct A { float x; float y; };
++A a, b, c;
++int d, e;
++A bar ();
++void foo (A, A);
++inline A operator/ (A, A p2) { if (p2.x) return a; }
++struct B { A dval; };
++int baz (A, B, A, int);
++
++void
++test ()
++{
++ B q;
++ A f, g, h, k;
++ h.x = 1.0;
++ f = h;
++ struct A i, j = f;
++ do {
++ i = bar ();
++ g = i / j;
++ foo (g, c);
++ int l = baz (k, q, b, e);
++ if (l)
++ goto cleanup;
++ j = i;
++ } while (d);
++cleanup:;
++}
diff --git a/SOURCES/gcc48-pr72747.patch b/SOURCES/gcc48-pr72747.patch
new file mode 100644
index 0000000..4216ada
--- /dev/null
+++ b/SOURCES/gcc48-pr72747.patch
@@ -0,0 +1,90 @@
+2016-11-02 Will Schmidt
+
+ Backport from trunk
+ 2016-10-26 Will Schmidt
+
+ PR middle-end/72747
+ * gimplify.c (gimplify_init_constructor): Move emit of constructor
+ assignment to earlier in the if/else logic.
+
+ * c-c++-common/pr72747-1.c: New test.
+ * c-c++-common/pr72747-2.c: Likewise.
+
+--- gcc/gimplify.c (revision 241792)
++++ gcc/gimplify.c (revision 241793)
+@@ -4273,24 +4273,23 @@ gimplify_init_constructor (tree *expr_p,
+
+ if (ret == GS_ERROR)
+ return GS_ERROR;
+- else if (want_value)
++ /* If we have gimplified both sides of the initializer but have
++ not emitted an assignment, do so now. */
++ if (*expr_p)
++ {
++ tree lhs = TREE_OPERAND (*expr_p, 0);
++ tree rhs = TREE_OPERAND (*expr_p, 1);
++ gimple init = gimple_build_assign (lhs, rhs);
++ gimplify_seq_add_stmt (pre_p, init);
++ }
++ if (want_value)
+ {
+ *expr_p = object;
+ return GS_OK;
+ }
+ else
+ {
+- /* If we have gimplified both sides of the initializer but have
+- not emitted an assignment, do so now. */
+- if (*expr_p)
+- {
+- tree lhs = TREE_OPERAND (*expr_p, 0);
+- tree rhs = TREE_OPERAND (*expr_p, 1);
+- gimple init = gimple_build_assign (lhs, rhs);
+- gimplify_seq_add_stmt (pre_p, init);
+- *expr_p = NULL;
+- }
+-
++ *expr_p = NULL;
+ return GS_ALL_DONE;
+ }
+ }
+--- gcc/testsuite/c-c++-common/pr72747-1.c (nonexistent)
++++ gcc/testsuite/c-c++-common/pr72747-1.c (revision 241793)
+@@ -0,0 +1,16 @@
++/* { dg-do compile } */
++/* { dg-require-effective-target powerpc_altivec_ok } */
++/* { dg-options "-maltivec -fdump-tree-gimple" } */
++
++/* PR 72747: Test that cascaded definition is happening for constant vectors. */
++
++#include
++
++int main (int argc, char *argv[])
++{
++ __vector int v1,v2;
++ v1 = v2 = vec_splats ((int) 42);
++ return 0;
++}
++/* { dg-final { scan-tree-dump-times " v2 = { 42, 42, 42, 42 }" 1 "gimple" } } */
++
+--- gcc/testsuite/c-c++-common/pr72747-2.c (nonexistent)
++++ gcc/testsuite/c-c++-common/pr72747-2.c (revision 241793)
+@@ -0,0 +1,18 @@
++/* { dg-do compile } */
++/* { dg-require-effective-target powerpc_altivec_ok } */
++/* { dg-options "-c -maltivec -fdump-tree-gimple" } */
++
++/* PR 72747: test that cascaded definition is happening for non constants. */
++
++void foo ()
++{
++ extern int i;
++ __vector int v,w;
++ v = w = (vector int) { i };
++}
++
++int main (int argc, char *argv[])
++{
++ return 0;
++}
++/* { dg-final { scan-tree-dump-times " w = " 1 "gimple" } } */
diff --git a/SOURCES/gcc48-pr72863.patch b/SOURCES/gcc48-pr72863.patch
new file mode 100644
index 0000000..87547f7
--- /dev/null
+++ b/SOURCES/gcc48-pr72863.patch
@@ -0,0 +1,73 @@
+2016-08-25 Bill Schmidt
+
+ Backport from mainline (minus test for POWER9 support)
+ 2016-08-11 Bill Schmidt
+
+ PR target/72863
+ * vsx.md (vsx_load_): For P8LE, emit swaps at expand time.
+ (vsx_store_): Likewise.
+
+ * gcc.target/powerpc/pr72863.c: New test.
+
+--- gcc/config/rs6000/vsx.md (revision 239761)
++++ gcc/config/rs6000/vsx.md (revision 239762)
+@@ -716,13 +716,27 @@ (define_expand "vsx_load_"
+ [(set (match_operand:VSX_M 0 "vsx_register_operand" "")
+ (match_operand:VSX_M 1 "memory_operand" ""))]
+ "VECTOR_MEM_VSX_P (mode)"
+- "")
++{
++ /* Expand to swaps if needed, prior to swap optimization. */
++ if (!BYTES_BIG_ENDIAN)
++ {
++ rs6000_emit_le_vsx_move (operands[0], operands[1], mode);
++ DONE;
++ }
++})
+
+ (define_expand "vsx_store_"
+ [(set (match_operand:VSX_M 0 "memory_operand" "")
+ (match_operand:VSX_M 1 "vsx_register_operand" ""))]
+ "VECTOR_MEM_VSX_P (mode)"
+- "")
++{
++ /* Expand to swaps if needed, prior to swap optimization. */
++ if (!BYTES_BIG_ENDIAN)
++ {
++ rs6000_emit_le_vsx_move (operands[0], operands[1], mode);
++ DONE;
++ }
++})
+
+
+ ;; VSX vector floating point arithmetic instructions. The VSX scalar
+--- gcc/testsuite/gcc.target/powerpc/pr72863.c (nonexistent)
++++ gcc/testsuite/gcc.target/powerpc/pr72863.c (revision 239762)
+@@ -0,0 +1,27 @@
++/* { dg-do compile { target { powerpc64le-*-* } } } */
++/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
++/* { dg-options "-mcpu=power8 -O3" } */
++/* { dg-final { scan-assembler "lxvd2x" } } */
++/* { dg-final { scan-assembler "stxvd2x" } } */
++/* { dg-final { scan-assembler-not "xxpermdi" } } */
++
++#include
++
++extern unsigned char *src, *dst;
++
++void b(void)
++{
++ int i;
++
++ unsigned char *s8 = src;
++ unsigned char *d8 = dst;
++
++ for (i = 0; i < 100; i++) {
++ vector unsigned char vs = vec_vsx_ld(0, s8);
++ vector unsigned char vd = vec_vsx_ld(0, d8);
++ vector unsigned char vr = vec_xor(vs, vd);
++ vec_vsx_st(vr, 0, d8);
++ s8 += 16;
++ d8 += 16;
++ }
++}
diff --git a/SOURCES/gcc48-pr78064.patch b/SOURCES/gcc48-pr78064.patch
new file mode 100644
index 0000000..0773493
--- /dev/null
+++ b/SOURCES/gcc48-pr78064.patch
@@ -0,0 +1,15 @@
+2016-10-24 Florian Weimer
+
+ PR libgcc/78064
+ * unwind-c.c: Include auto-target.h.
+
+--- libgcc/unwind-c.c (revision 241490)
++++ libgcc/unwind-c.c (revision 241491)
+@@ -26,6 +26,7 @@ see the files COPYING3 and COPYING.RUNTI
+
+ #include "tconfig.h"
+ #include "tsystem.h"
++#include "auto-target.h"
+ #include "unwind.h"
+ #define NO_SIZE_OF_ENCODED_VALUE
+ #include "unwind-pe.h"
diff --git a/SOURCES/gcc48-pr78796.patch b/SOURCES/gcc48-pr78796.patch
new file mode 100644
index 0000000..6afd47a
--- /dev/null
+++ b/SOURCES/gcc48-pr78796.patch
@@ -0,0 +1,56 @@
+2016-12-14 Wilco Dijkstra
+ Jakub Jelinek
+
+ PR target/78796
+ * config/aarch64/aarch64.c (aarch64_classify_symbol): Merge large
+ model checks into switch.
+
+ * gcc.dg/tls/pr78796.c: New test.
+
+--- gcc/config/aarch64/aarch64.c (revision 243645)
++++ gcc/config/aarch64/aarch64.c (revision 243646)
+@@ -4986,6 +4986,9 @@ aarch64_classify_symbol (rtx x,
+ switch (aarch64_cmodel)
+ {
+ case AARCH64_CMODEL_LARGE:
++ if (aarch64_tls_symbol_p (x))
++ return aarch64_classify_tls_symbol (x);
++
+ return SYMBOL_FORCE_TO_MEM;
+
+ case AARCH64_CMODEL_TINY:
+--- gcc/testsuite/gcc.dg/tls/pr78796.c (nonexistent)
++++ gcc/testsuite/gcc.dg/tls/pr78796.c (revision 243646)
+@@ -0,0 +1,32 @@
++/* PR target/78796 */
++/* { dg-do run } */
++/* { dg-options "-O2" } */
++/* { dg-additional-options "-mcmodel=large" { target aarch64-*-* } } */
++/* { dg-require-effective-target tls } */
++
++struct S { int a, b, c, d, e; };
++struct S t;
++__thread struct S s;
++
++__attribute__((used, noinline, noclone)) void
++foo (int *x, int *y)
++{
++ asm volatile ("" : : "g" (x), "g" (y) : "memory");
++ if (*x != 1 || *y != 2)
++ __builtin_abort ();
++}
++
++__attribute__((used, noinline, noclone)) void
++bar (void)
++{
++ foo (&t.c, &s.c);
++}
++
++int
++main ()
++{
++ t.c = 1;
++ s.c = 2;
++ bar ();
++ return 0;
++}
diff --git a/SOURCES/gcc48-pr78875.patch b/SOURCES/gcc48-pr78875.patch
new file mode 100644
index 0000000..12dd0eb
--- /dev/null
+++ b/SOURCES/gcc48-pr78875.patch
@@ -0,0 +1,254 @@
+2017-01-17 Segher Boessenkool
+
+ PR target/78875
+ * config/rs6000/rs6000-opts.h (stack_protector_guard): New enum.
+ * config/rs6000/rs6000.c (rs6000_option_override_internal): Handle
+ the new options.
+ * config/rs6000/rs6000.md (stack_protect_set): Handle the new more
+ flexible settings.
+ (stack_protect_test): Ditto.
+ * config/rs6000/rs6000.opt (mstack-protector-guard=,
+ mstack-protector-guard-reg=, mstack-protector-guard-offset=): New
+ options.
+ * doc/invoke.texi (Option Summary) [RS/6000 and PowerPC Options]:
+ Add -mstack-protector-guard=, -mstack-protector-guard-reg=, and
+ -mstack-protector-guard-offset=.
+ (RS/6000 and PowerPC Options): Ditto.
+
+ * gcc.target/powerpc/ssp-1.c: New testcase.
+ * gcc.target/powerpc/ssp-2.c: New testcase.
+
+--- gcc/config/rs6000/rs6000.opt (revision 244555)
++++ gcc/config/rs6000/rs6000.opt (revision 244556)
+@@ -593,3 +593,31 @@ Allow float variables in upper registers
+ moptimize-swaps
+ Target Undocumented Var(rs6000_optimize_swaps) Init(1) Save
+ Analyze and remove doubleword swaps from VSX computations.
++
++mstack-protector-guard=
++Target RejectNegative Joined Enum(stack_protector_guard) Var(rs6000_stack_protector_guard) Init(SSP_TLS)
++Use given stack-protector guard.
++
++Enum
++Name(stack_protector_guard) Type(enum stack_protector_guard)
++Valid arguments to -mstack-protector-guard=:
++
++EnumValue
++Enum(stack_protector_guard) String(tls) Value(SSP_TLS)
++
++EnumValue
++Enum(stack_protector_guard) String(global) Value(SSP_GLOBAL)
++
++mstack-protector-guard-reg=
++Target RejectNegative Joined Var(rs6000_stack_protector_guard_reg_str)
++Use the given base register for addressing the stack-protector guard.
++
++TargetVariable
++int rs6000_stack_protector_guard_reg = 0
++
++mstack-protector-guard-offset=
++Target RejectNegative Joined Integer Var(rs6000_stack_protector_guard_offset_str)
++Use the given offset for addressing the stack-protector guard.
++
++TargetVariable
++long rs6000_stack_protector_guard_offset = 0
+--- gcc/config/rs6000/rs6000.c (revision 244555)
++++ gcc/config/rs6000/rs6000.c (revision 244556)
+@@ -3727,6 +3727,54 @@ rs6000_option_override_internal (bool gl
+ atoi (rs6000_sched_insert_nops_str));
+ }
+
++ /* Handle stack protector */
++ if (!global_options_set.x_rs6000_stack_protector_guard)
++#ifdef TARGET_THREAD_SSP_OFFSET
++ rs6000_stack_protector_guard = SSP_TLS;
++#else
++ rs6000_stack_protector_guard = SSP_GLOBAL;
++#endif
++
++#ifdef TARGET_THREAD_SSP_OFFSET
++ rs6000_stack_protector_guard_offset = TARGET_THREAD_SSP_OFFSET;
++ rs6000_stack_protector_guard_reg = TARGET_64BIT ? 13 : 2;
++#endif
++
++ if (global_options_set.x_rs6000_stack_protector_guard_offset_str)
++ {
++ char *endp;
++ const char *str = rs6000_stack_protector_guard_offset_str;
++
++ errno = 0;
++ long offset = strtol (str, &endp, 0);
++ if (!*str || *endp || errno)
++ error ("%qs is not a valid number "
++ "in -mstack-protector-guard-offset=", str);
++
++ if (!IN_RANGE (offset, -0x8000, 0x7fff)
++ || (TARGET_64BIT && (offset & 3)))
++ error ("%qs is not a valid offset "
++ "in -mstack-protector-guard-offset=", str);
++
++ rs6000_stack_protector_guard_offset = offset;
++ }
++
++ if (global_options_set.x_rs6000_stack_protector_guard_reg_str)
++ {
++ const char *str = rs6000_stack_protector_guard_reg_str;
++ int reg = decode_reg_name (str);
++
++ if (!IN_RANGE (reg, 1, 31))
++ error ("%qs is not a valid base register "
++ "in -mstack-protector-guard-reg=", str);
++
++ rs6000_stack_protector_guard_reg = reg;
++ }
++
++ if (rs6000_stack_protector_guard == SSP_TLS
++ && !IN_RANGE (rs6000_stack_protector_guard_reg, 1, 31))
++ error ("-mstack-protector-guard=tls needs a valid base register");
++
+ if (global_init_p)
+ {
+ #ifdef TARGET_REGNAMES
+--- gcc/config/rs6000/rs6000.md (revision 244555)
++++ gcc/config/rs6000/rs6000.md (revision 244556)
+@@ -13092,19 +13092,23 @@
+
+
+ (define_expand "stack_protect_set"
+- [(match_operand 0 "memory_operand" "")
+- (match_operand 1 "memory_operand" "")]
++ [(match_operand 0 "memory_operand")
++ (match_operand 1 "memory_operand")]
+ ""
+ {
+-#ifdef TARGET_THREAD_SSP_OFFSET
+- rtx tlsreg = gen_rtx_REG (Pmode, TARGET_64BIT ? 13 : 2);
+- rtx addr = gen_rtx_PLUS (Pmode, tlsreg, GEN_INT (TARGET_THREAD_SSP_OFFSET));
+- operands[1] = gen_rtx_MEM (Pmode, addr);
+-#endif
++ if (rs6000_stack_protector_guard == SSP_TLS)
++ {
++ rtx reg = gen_rtx_REG (Pmode, rs6000_stack_protector_guard_reg);
++ rtx offset = GEN_INT (rs6000_stack_protector_guard_offset);
++ rtx addr = gen_rtx_PLUS (Pmode, reg, offset);
++ operands[1] = gen_rtx_MEM (Pmode, addr);
++ }
++
+ if (TARGET_64BIT)
+ emit_insn (gen_stack_protect_setdi (operands[0], operands[1]));
+ else
+ emit_insn (gen_stack_protect_setsi (operands[0], operands[1]));
++
+ DONE;
+ })
+
+@@ -13127,21 +13131,26 @@
+ (set_attr "length" "12")])
+
+ (define_expand "stack_protect_test"
+- [(match_operand 0 "memory_operand" "")
+- (match_operand 1 "memory_operand" "")
+- (match_operand 2 "" "")]
++ [(match_operand 0 "memory_operand")
++ (match_operand 1 "memory_operand")
++ (match_operand 2 "")]
+ ""
+ {
+- rtx test, op0, op1;
+-#ifdef TARGET_THREAD_SSP_OFFSET
+- rtx tlsreg = gen_rtx_REG (Pmode, TARGET_64BIT ? 13 : 2);
+- rtx addr = gen_rtx_PLUS (Pmode, tlsreg, GEN_INT (TARGET_THREAD_SSP_OFFSET));
+- operands[1] = gen_rtx_MEM (Pmode, addr);
+-#endif
+- op0 = operands[0];
+- op1 = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, operands[1]), UNSPEC_SP_TEST);
+- test = gen_rtx_EQ (VOIDmode, op0, op1);
+- emit_jump_insn (gen_cbranchsi4 (test, op0, op1, operands[2]));
++ rtx guard = operands[1];
++
++ if (rs6000_stack_protector_guard == SSP_TLS)
++ {
++ rtx reg = gen_rtx_REG (Pmode, rs6000_stack_protector_guard_reg);
++ rtx offset = GEN_INT (rs6000_stack_protector_guard_offset);
++ rtx addr = gen_rtx_PLUS (Pmode, reg, offset);
++ guard = gen_rtx_MEM (Pmode, addr);
++ }
++
++ operands[1] = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, guard), UNSPEC_SP_TEST);
++ rtx test = gen_rtx_EQ (VOIDmode, operands[0], operands[1]);
++ rtx jump = gen_cbranchsi4 (test, operands[0], operands[1], operands[2]);
++ emit_jump_insn (jump);
++
+ DONE;
+ })
+
+--- gcc/config/rs6000/rs6000-opts.h (revision 244555)
++++ gcc/config/rs6000/rs6000-opts.h (revision 244556)
+@@ -154,6 +154,12 @@ enum rs6000_vector {
+ VECTOR_OTHER /* Some other vector unit */
+ };
+
++/* Where to get the canary for the stack protector. */
++enum stack_protector_guard {
++ SSP_TLS, /* per-thread canary in TLS block */
++ SSP_GLOBAL /* global canary */
++};
++
+ /* No enumeration is defined to index the -mcpu= values (entries in
+ processor_target_table), with the type int being used instead, but
+ we need to distinguish the special "native" value. */
+--- gcc/doc/invoke.texi (revision 244555)
++++ gcc/doc/invoke.texi (revision 244556)
+@@ -862,7 +862,9 @@ See RS/6000 and PowerPC Options.
+ -mcrypto -mno-crypto -mdirect-move -mno-direct-move @gol
+ -mquad-memory -mno-quad-memory @gol
+ -mquad-memory-atomic -mno-quad-memory-atomic @gol
+--mcompat-align-parm -mno-compat-align-parm}
++-mcompat-align-parm -mno-compat-align-parm @gol
++-mstack-protector-guard=@var{guard} -mstack-protector-guard-reg=@var{reg} @gol
++-mstack-protector-guard-offset=@var{offset}}
+
+ @emph{RX Options}
+ @gccoptlist{-m64bit-doubles -m32bit-doubles -fpu -nofpu@gol
+@@ -18295,6 +18297,23 @@ GCC.
+
+ In this version of the compiler, the @option{-mcompat-align-parm}
+ is the default, except when using the Linux ELFv2 ABI.
++
++@item -mstack-protector-guard=@var{guard}
++@itemx -mstack-protector-guard-reg=@var{reg}
++@itemx -mstack-protector-guard-offset=@var{offset}
++@opindex mstack-protector-guard
++@opindex mstack-protector-guard-reg
++@opindex mstack-protector-guard-offset
++Generate stack protection code using canary at @var{guard}. Supported
++locations are @samp{global} for global canary or @samp{tls} for per-thread
++canary in the TLS block (the default with GNU libc version 2.4 or later).
++
++With the latter choice the options
++@option{-mstack-protector-guard-reg=@var{reg}} and
++@option{-mstack-protector-guard-offset=@var{offset}} furthermore specify
++which register to use as base register for reading the canary, and from what
++offset from that base register. The default for those is as specified in the
++relevant ABI.
+ @end table
+
+ @node RX Options
+--- gcc/testsuite/gcc.target/powerpc/ssp-1.c (nonexistent)
++++ gcc/testsuite/gcc.target/powerpc/ssp-1.c (revision 244562)
+@@ -0,0 +1,6 @@
++/* { dg-do compile } */
++/* { dg-options "-O2 -fstack-protector-all -mstack-protector-guard=global" } */
++
++/* { dg-final { scan-assembler "__stack_chk_guard" } } */
++
++void f(void) { }
+--- gcc/testsuite/gcc.target/powerpc/ssp-2.c (nonexistent)
++++ gcc/testsuite/gcc.target/powerpc/ssp-2.c (revision 244562)
+@@ -0,0 +1,6 @@
++/* { dg-do compile } */
++/* { dg-options "-O2 -fstack-protector-all -mstack-protector-guard=tls -mstack-protector-guard-reg=r18 -mstack-protector-guard-offset=0x3038" } */
++
++/* { dg-final { scan-assembler {\m12344\(r?18\)} } } */
++
++void f(void) { }
diff --git a/SOURCES/gcc48-pr79439.patch b/SOURCES/gcc48-pr79439.patch
new file mode 100644
index 0000000..c593dfc
--- /dev/null
+++ b/SOURCES/gcc48-pr79439.patch
@@ -0,0 +1,53 @@
+2017-03-01 Michael Meissner
+
+ PR target/79439
+ * config/rs6000/predicates.md (current_file_function_operand): Do
+ not allow self calls to be local if the function is replaceable.
+
+ * gcc.target/powerpc/pr79439.c: New test.
+
+--- gcc/config/rs6000/predicates.md (revision 245812)
++++ gcc/config/rs6000/predicates.md (revision 245813)
+@@ -1086,8 +1086,8 @@
+ && ((DEFAULT_ABI != ABI_AIX
+ && DEFAULT_ABI != ABI_ELFv2)
+ || !SYMBOL_REF_EXTERNAL_P (op)))
+- || (op == XEXP (DECL_RTL (current_function_decl),
+- 0)))")))
++ || (op == XEXP (DECL_RTL (current_function_decl), 0)
++ && !decl_replaceable_p (current_function_decl)))")))
+
+ ;; Return 1 if this operand is a valid input for a move insn.
+ (define_predicate "input_operand"
+--- gcc/testsuite/gcc.target/powerpc/pr79439.c (nonexistent)
++++ gcc/testsuite/gcc.target/powerpc/pr79439.c (revision 245813)
+@@ -0,0 +1,29 @@
++/* { dg-do compile { target { powerpc64*-*-linux* && lp64 } } } */
++/* { dg-options "-O2 -fpic" } */
++
++/* On the Linux 64-bit ABIs, we should not eliminate NOP in the 'rec' call if
++ -fpic is used because rec can be interposed at link time (since it is
++ external), and the recursive call should call the interposed function. The
++ Linux 32-bit ABIs do not require NOPs after the BL instruction. */
++
++int f (void);
++
++void
++g (void)
++{
++}
++
++int
++rec (int a)
++{
++ int ret = 0;
++ if (a > 10 && f ())
++ ret += rec (a - 1);
++ g ();
++ return a + ret;
++}
++
++/* { dg-final { scan-assembler-times {\mbl f\M} 1 } } */
++/* { dg-final { scan-assembler-times {\mbl g\M} 2 } } */
++/* { dg-final { scan-assembler-times {\mbl rec\M} 1 } } */
++/* { dg-final { scan-assembler-times {\mnop\M} 4 } } */
diff --git a/SOURCES/gcc48-pr79969.patch b/SOURCES/gcc48-pr79969.patch
new file mode 100644
index 0000000..53a4ed7
--- /dev/null
+++ b/SOURCES/gcc48-pr79969.patch
@@ -0,0 +1,43 @@
+2017-03-09 Jakub Jelinek
+
+ PR c/79969
+ * c-decl.c (start_enum): Adjust DECL_SOURCE_LOCATION of
+ TYPE_STUB_DECL.
+
+ * gcc.dg/debug/dwarf2/enum-loc1.c: New test.
+
+--- gcc/c/c-decl.c.jj 2017-03-05 22:39:45.000000000 +0100
++++ gcc/c/c-decl.c 2017-03-09 08:19:33.100042166 +0100
+@@ -8201,6 +8201,10 @@ start_enum (location_t loc, struct c_enu
+ enumtype = make_node (ENUMERAL_TYPE);
+ pushtag (loc, name, enumtype);
+ }
++ /* Update type location to the one of the definition, instead of e.g.
++ a forward declaration. */
++ else if (TYPE_STUB_DECL (enumtype))
++ DECL_SOURCE_LOCATION (TYPE_STUB_DECL (enumtype)) = loc;
+
+ if (C_TYPE_BEING_DEFINED (enumtype))
+ error_at (loc, "nested redefinition of %", name);
+--- gcc/testsuite/gcc.dg/debug/dwarf2/enum-loc1.c.jj 2017-03-09 08:09:30.742037844 +0100
++++ gcc/testsuite/gcc.dg/debug/dwarf2/enum-loc1.c 2017-03-09 08:16:45.202268438 +0100
+@@ -0,0 +1,19 @@
++/* PR c/79969 */
++/* { dg-do compile } */
++/* { dg-options "-gdwarf-2 -dA -fno-merge-debug-strings" } */
++
++enum ENUMTAG;
++
++enum ENUMTAG
++{
++ B = 1,
++ C = 2
++};
++
++void
++bar (void)
++{
++ enum ENUMTAG a = C;
++}
++
++/* { dg-final { scan-assembler "DW_TAG_enumeration_type\[^\\r\\n\]*\[\\r\\n\]+\[^\\r\\n\]*\"ENUMTAG\[^\\r\\n\]*DW_AT_name(\[^\\r\\n\]*\[\\r\\n\]+\[^\\r\\n\]*DW_AT_)*\[^\\r\\n\]*\[\\r\\n\]+\[^\\r\\n\]*\[^0-9a-fA-FxX](0x)?7\[^0-9a-fA-FxX]\[^\\r\\n\]*DW_AT_decl_line" } } */
diff --git a/SOURCES/gcc48-rh1180633.patch b/SOURCES/gcc48-rh1180633.patch
new file mode 100644
index 0000000..f3898f9
--- /dev/null
+++ b/SOURCES/gcc48-rh1180633.patch
@@ -0,0 +1,338 @@
+2016-01-22 Torvald Riegel
+
+ * beginend.cc (GTM::gtm_thread::serial_lock): Put on cacheline
+ boundary.
+ (htm_fastpath): Remove.
+ (gtm_thread::begin_transaction): Fix HTM fastpath.
+ (_ITM_commitTransaction): Adapt.
+ (_ITM_commitTransactionEH): Adapt.
+ * libitm/config/linux/rwlock.h (gtm_rwlock): Add htm_fastpath member
+ and accessors.
+ * libitm/config/posix/rwlock.h (gtm_rwlock): Likewise.
+ * libitm/config/posix/rwlock.cc (gtm_rwlock::gtm_rwlock): Adapt.
+ * libitm/libitm_i.h (htm_fastpath): Remove declaration.
+ * libitm/method-serial.cc (htm_mg): Adapt.
+ (gtm_thread::serialirr_mode): Adapt.
+ * libitm/query.cc (_ITM_inTransaction, _ITM_getTransactionId): Adapt.
+
+--- libitm/beginend.cc
++++ libitm/beginend.cc
+@@ -32,7 +32,11 @@ using namespace GTM;
+ extern __thread gtm_thread_tls _gtm_thr_tls;
+ #endif
+
+-gtm_rwlock GTM::gtm_thread::serial_lock;
++// Put this at the start of a cacheline so that serial_lock's writers and
++// htm_fastpath fields are on the same cacheline, so that HW transactions
++// only have to pay one cacheline capacity to monitor both.
++gtm_rwlock GTM::gtm_thread::serial_lock
++ __attribute__((aligned(HW_CACHELINE_SIZE)));
+ gtm_thread *GTM::gtm_thread::list_of_threads = 0;
+ unsigned GTM::gtm_thread::number_of_threads = 0;
+
+@@ -54,9 +58,6 @@ static pthread_mutex_t global_tid_lock = PTHREAD_MUTEX_INITIALIZER;
+ static pthread_key_t thr_release_key;
+ static pthread_once_t thr_release_once = PTHREAD_ONCE_INIT;
+
+-// See gtm_thread::begin_transaction.
+-uint32_t GTM::htm_fastpath = 0;
+-
+ /* Allocate a transaction structure. */
+ void *
+ GTM::gtm_thread::operator new (size_t s)
+@@ -174,9 +175,11 @@ GTM::gtm_thread::begin_transaction (uint32_t prop, const gtm_jmpbuf *jb)
+ // lock's writer flag and thus abort if another thread is or becomes a
+ // serial transaction. Therefore, if the fastpath is enabled, then a
+ // transaction is not executing as a HW transaction iff the serial lock is
+- // write-locked. This allows us to use htm_fastpath and the serial lock's
+- // writer flag to reliable determine whether the current thread runs a HW
+- // transaction, and thus we do not need to maintain this information in
++ // write-locked. Also, HW transactions monitor the fastpath control
++ // variable, so that they will only execute if dispatch_htm is still the
++ // current method group. This allows us to use htm_fastpath and the serial
++ // lock's writers flag to reliable determine whether the current thread runs
++ // a HW transaction, and thus we do not need to maintain this information in
+ // per-thread state.
+ // If an uninstrumented code path is not available, we can still run
+ // instrumented code from a HW transaction because the HTM fastpath kicks
+@@ -187,9 +190,14 @@ GTM::gtm_thread::begin_transaction (uint32_t prop, const gtm_jmpbuf *jb)
+ // indeed in serial mode, and HW transactions should never need serial mode
+ // for any internal changes (e.g., they never abort visibly to the STM code
+ // and thus do not trigger the standard retry handling).
+- if (likely(htm_fastpath && (prop & pr_hasNoAbort)))
++ if (likely(serial_lock.get_htm_fastpath() && (prop & pr_hasNoAbort)))
+ {
+- for (uint32_t t = htm_fastpath; t; t--)
++ // Note that the snapshot of htm_fastpath that we take here could be
++ // outdated, and a different method group than dispatch_htm may have
++ // been chosen in the meantime. Therefore, take care not not touch
++ // anything besides the serial lock, which is independent of method
++ // groups.
++ for (uint32_t t = serial_lock.get_htm_fastpath(); t; t--)
+ {
+ uint32_t ret = htm_begin();
+ if (htm_begin_success(ret))
+@@ -197,9 +205,11 @@ GTM::gtm_thread::begin_transaction (uint32_t prop, const gtm_jmpbuf *jb)
+ // We are executing a transaction now.
+ // Monitor the writer flag in the serial-mode lock, and abort
+ // if there is an active or waiting serial-mode transaction.
++ // Also checks that htm_fastpath is still nonzero and thus
++ // HW transactions are allowed to run.
+ // Note that this can also happen due to an enclosing
+ // serial-mode transaction; we handle this case below.
+- if (unlikely(serial_lock.is_write_locked()))
++ if (unlikely(serial_lock.htm_fastpath_disabled()))
+ htm_abort();
+ else
+ // We do not need to set a_saveLiveVariables because of HTM.
+@@ -210,9 +220,12 @@ GTM::gtm_thread::begin_transaction (uint32_t prop, const gtm_jmpbuf *jb)
+ // retrying the transaction will be successful.
+ if (!htm_abort_should_retry(ret))
+ break;
++ // Check whether the HTM fastpath has been disabled.
++ if (!serial_lock.get_htm_fastpath())
++ break;
+ // Wait until any concurrent serial-mode transactions have finished.
+ // This is an empty critical section, but won't be elided.
+- if (serial_lock.is_write_locked())
++ if (serial_lock.htm_fastpath_disabled())
+ {
+ tx = gtm_thr();
+ if (unlikely(tx == NULL))
+@@ -618,7 +631,7 @@ _ITM_commitTransaction(void)
+ // a serial-mode transaction. If we are, then there will be no other
+ // concurrent serial-mode transaction.
+ // See gtm_thread::begin_transaction.
+- if (likely(htm_fastpath && !gtm_thread::serial_lock.is_write_locked()))
++ if (likely(!gtm_thread::serial_lock.htm_fastpath_disabled()))
+ {
+ htm_commit();
+ return;
+@@ -634,7 +647,7 @@ _ITM_commitTransactionEH(void *exc_ptr)
+ {
+ #if defined(USE_HTM_FASTPATH)
+ // See _ITM_commitTransaction.
+- if (likely(htm_fastpath && !gtm_thread::serial_lock.is_write_locked()))
++ if (likely(!gtm_thread::serial_lock.htm_fastpath_disabled()))
+ {
+ htm_commit();
+ return;
+--- libitm/config/linux/rwlock.h
++++ libitm/config/linux/rwlock.h
+@@ -39,16 +39,29 @@ struct gtm_thread;
+ //
+ // In this implementation, writers are given highest priority access but
+ // read-to-write upgrades do not have a higher priority than writers.
++//
++// Do not change the layout of this class; it must remain a POD type with
++// standard layout, and the writers field must be first (i.e., so the
++// assembler code can assume that its address is equal to the address of the
++// respective instance of the class), and htm_fastpath must be second.
+
+ class gtm_rwlock
+ {
+- // TODO Put futexes on different cachelines?
+ std::atomic writers; // Writers' futex.
++ // We put the HTM fastpath control variable here so that HTM fastpath
++ // transactions can check efficiently whether they are allowed to run.
++ // This must be accessed atomically because threads can load this value
++ // when they are neither a registered reader nor writer (i.e., when they
++ // attempt to execute the HTM fastpath).
++ std::atomic htm_fastpath;
++ // TODO Put these futexes on different cachelines? (writers and htm_fastpath
++ // should remain on the same cacheline.
+ std::atomic writer_readers;// A confirmed writer waits here for readers.
+ std::atomic readers; // Readers wait here for writers (iff true).
+
+ public:
+- gtm_rwlock() : writers(0), writer_readers(0), readers(0) {};
++ gtm_rwlock() : writers(0), htm_fastpath(0), writer_readers(0), readers(0)
++ { }
+
+ void read_lock (gtm_thread *tx);
+ void read_unlock (gtm_thread *tx);
+@@ -59,12 +72,28 @@ class gtm_rwlock
+ bool write_upgrade (gtm_thread *tx);
+ void write_upgrade_finish (gtm_thread *tx);
+
+- // Returns true iff there is a concurrent active or waiting writer.
+- // This is primarily useful for simple HyTM approaches, and the value being
+- // checked is loaded with memory_order_relaxed.
+- bool is_write_locked()
++ // Returns true iff there is a concurrent active or waiting writer, or
++ // htm_fastpath is zero. This is primarily useful for simple HyTM
++ // approaches, and the values being checked are loaded with
++ // memory_order_relaxed.
++ bool htm_fastpath_disabled ()
++ {
++ return writers.load (memory_order_relaxed) != 0
++ || htm_fastpath.load (memory_order_relaxed) == 0;
++ }
++
++ // This does not need to return an exact value, hence relaxed MO is
++ // sufficient.
++ uint32_t get_htm_fastpath ()
++ {
++ return htm_fastpath.load (memory_order_relaxed);
++ }
++ // This must only be called while having acquired the write lock, and other
++ // threads do not need to load an exact value; hence relaxed MO is
++ // sufficient.
++ void set_htm_fastpath (uint32_t val)
+ {
+- return writers.load (memory_order_relaxed) != 0;
++ htm_fastpath.store (val, memory_order_relaxed);
+ }
+
+ protected:
+--- libitm/config/posix/rwlock.h
++++ libitm/config/posix/rwlock.h
+@@ -44,19 +44,32 @@ struct gtm_thread;
+ //
+ // In this implementation, writers are given highest priority access but
+ // read-to-write upgrades do not have a higher priority than writers.
++//
++// Do not change the layout of this class; it must remain a POD type with
++// standard layout, and the summary field must be first (i.e., so the
++// assembler code can assume that its address is equal to the address of the
++// respective instance of the class), and htm_fastpath must be second.
+
+ class gtm_rwlock
+ {
+- pthread_mutex_t mutex; // Held if manipulating any field.
+- pthread_cond_t c_readers; // Readers wait here
+- pthread_cond_t c_writers; // Writers wait here for writers
+- pthread_cond_t c_confirmed_writers; // Writers wait here for readers
+-
+ static const unsigned a_writer = 1; // An active writer.
+ static const unsigned w_writer = 2; // The w_writers field != 0
+ static const unsigned w_reader = 4; // The w_readers field != 0
+
+ std::atomic summary; // Bitmask of the above.
++
++ // We put the HTM fastpath control variable here so that HTM fastpath
++ // transactions can check efficiently whether they are allowed to run.
++ // This must be accessed atomically because threads can load this value
++ // when they are neither a registered reader nor writer (i.e., when they
++ // attempt to execute the HTM fastpath).
++ std::atomic htm_fastpath;
++
++ pthread_mutex_t mutex; // Held if manipulating any field.
++ pthread_cond_t c_readers; // Readers wait here
++ pthread_cond_t c_writers; // Writers wait here for writers
++ pthread_cond_t c_confirmed_writers; // Writers wait here for readers
++
+ unsigned int a_readers; // Nr active readers as observed by a writer
+ unsigned int w_readers; // Nr waiting readers
+ unsigned int w_writers; // Nr waiting writers
+@@ -74,12 +87,28 @@ class gtm_rwlock
+ bool write_upgrade (gtm_thread *tx);
+ void write_upgrade_finish (gtm_thread *tx);
+
+- // Returns true iff there is a concurrent active or waiting writer.
+- // This is primarily useful for simple HyTM approaches, and the value being
+- // checked is loaded with memory_order_relaxed.
+- bool is_write_locked()
++ // Returns true iff there is a concurrent active or waiting writer, or
++ // htm_fastpath is zero. This is primarily useful for simple HyTM
++ // approaches, and the values being checked are loaded with
++ // memory_order_relaxed.
++ bool htm_fastpath_disabled ()
++ {
++ return (summary.load (memory_order_relaxed) & (a_writer | w_writer))
++ || htm_fastpath.load (memory_order_relaxed) == 0;
++ }
++
++ // This does not need to return an exact value, hence relaxed MO is
++ // sufficient.
++ uint32_t get_htm_fastpath ()
++ {
++ return htm_fastpath.load (memory_order_relaxed);
++ }
++ // This must only be called while having acquired the write lock, and other
++ // threads do not need to load an exact value; hence relaxed MO is
++ // sufficient.
++ void set_htm_fastpath (uint32_t val)
+ {
+- return summary.load (memory_order_relaxed) & (a_writer | w_writer);
++ htm_fastpath.store (val, memory_order_relaxed);
+ }
+
+ protected:
+--- libitm/config/posix/rwlock.cc
++++ libitm/config/posix/rwlock.cc
+@@ -30,11 +30,12 @@ namespace GTM HIDDEN {
+ // ??? Move this back to the header file when constexpr is implemented.
+
+ gtm_rwlock::gtm_rwlock()
+- : mutex (PTHREAD_MUTEX_INITIALIZER),
++ : summary (0),
++ htm_fastpath (0),
++ mutex (PTHREAD_MUTEX_INITIALIZER),
+ c_readers (PTHREAD_COND_INITIALIZER),
+ c_writers (PTHREAD_COND_INITIALIZER),
+ c_confirmed_writers (PTHREAD_COND_INITIALIZER),
+- summary (0),
+ a_readers (0),
+ w_readers (0),
+ w_writers (0)
+--- libitm/libitm_i.h
++++ libitm/libitm_i.h
+@@ -336,10 +336,6 @@ extern abi_dispatch *dispatch_htm();
+
+ extern gtm_cacheline_mask gtm_mask_stack(gtm_cacheline *, gtm_cacheline_mask);
+
+-// Control variable for the HTM fastpath that uses serial mode as fallback.
+-// Non-zero if the HTM fastpath is enabled. See gtm_thread::begin_transaction.
+-extern uint32_t htm_fastpath;
+-
+ } // namespace GTM
+
+ #endif // LIBITM_I_H
+--- libitm/method-serial.cc
++++ libitm/method-serial.cc
+@@ -222,13 +222,13 @@ struct htm_mg : public method_group
+ // Enable the HTM fastpath if the HW is available. The fastpath is
+ // initially disabled.
+ #ifdef USE_HTM_FASTPATH
+- htm_fastpath = htm_init();
++ gtm_thread::serial_lock.set_htm_fastpath(htm_init());
+ #endif
+ }
+ virtual void fini()
+ {
+ // Disable the HTM fastpath.
+- htm_fastpath = 0;
++ gtm_thread::serial_lock.set_htm_fastpath(0);
+ }
+ };
+
+@@ -288,7 +288,7 @@ GTM::gtm_thread::serialirr_mode ()
+ #if defined(USE_HTM_FASTPATH)
+ // HTM fastpath. If we are executing a HW transaction, don't go serial but
+ // continue. See gtm_thread::begin_transaction.
+- if (likely(htm_fastpath && !gtm_thread::serial_lock.is_write_locked()))
++ if (likely(!gtm_thread::serial_lock.htm_fastpath_disabled()))
+ return;
+ #endif
+
+--- libitm/query.cc
++++ libitm/query.cc
+@@ -49,7 +49,7 @@ _ITM_inTransaction (void)
+ // a transaction and thus we can't deduce this by looking at just the serial
+ // lock. This function isn't used in practice currently, so the easiest
+ // way to handle it is to just abort.
+- if (htm_fastpath && htm_transaction_active())
++ if (gtm_thread::serial_lock.get_htm_fastpath() && htm_transaction_active())
+ htm_abort();
+ #endif
+ struct gtm_thread *tx = gtm_thr();
+@@ -69,7 +69,7 @@ _ITM_getTransactionId (void)
+ {
+ #if defined(USE_HTM_FASTPATH)
+ // See ITM_inTransaction.
+- if (htm_fastpath && htm_transaction_active())
++ if (gtm_thread::serial_lock.get_htm_fastpath() && htm_transaction_active())
+ htm_abort();
+ #endif
+ struct gtm_thread *tx = gtm_thr();
diff --git a/SOURCES/gcc48-rh1243366.patch b/SOURCES/gcc48-rh1243366.patch
new file mode 100644
index 0000000..da137f3
--- /dev/null
+++ b/SOURCES/gcc48-rh1243366.patch
@@ -0,0 +1,35 @@
+2015-07-15 Jonathan Wakely
+
+ PR libstdc++/57394
+ * include/std/streambuf (basic_streambuf(const basic_streambuf&)):
+ Fix initializer for _M_out_end.
+ (operator=(const basic_streambuf&)): Replace stub with actual
+ implementation.
+
+--- libstdc++-v3/include/std/streambuf
++++ libstdc++-v3/include/std/streambuf
+@@ -802,12 +802,22 @@
+ basic_streambuf(const basic_streambuf& __sb)
+ : _M_in_beg(__sb._M_in_beg), _M_in_cur(__sb._M_in_cur),
+ _M_in_end(__sb._M_in_end), _M_out_beg(__sb._M_out_beg),
+- _M_out_cur(__sb._M_out_cur), _M_out_end(__sb._M_out_cur),
++ _M_out_cur(__sb._M_out_cur), _M_out_end(__sb._M_out_end),
+ _M_buf_locale(__sb._M_buf_locale)
+ { }
+
+ basic_streambuf&
+- operator=(const basic_streambuf&) { return *this; };
++ operator=(const basic_streambuf& __sb)
++ {
++ _M_in_beg = __sb._M_in_beg;
++ _M_in_cur = __sb._M_in_cur;
++ _M_in_end = __sb._M_in_end;
++ _M_out_beg = __sb._M_out_beg;
++ _M_out_cur = __sb._M_out_cur;
++ _M_out_end = __sb._M_out_end;
++ _M_buf_locale = __sb._M_buf_locale;
++ return *this;
++ };
+ };
+
+ // Explicit specialization declarations, defined in src/streambuf.cc.
diff --git a/SOURCES/gcc48-rh1278872.patch b/SOURCES/gcc48-rh1278872.patch
new file mode 100644
index 0000000..ce82c3d
--- /dev/null
+++ b/SOURCES/gcc48-rh1278872.patch
@@ -0,0 +1,78 @@
+2013-07-25 Sterling Augustine
+
+ * dwarf2out.c (size_of_pubnames): Move code to...
+ (include_pubname_in_output): ...here. New.
+ (output_pubnames): Call include_pubname_in_output. Move assertion.
+
+--- gcc/dwarf2out.c (revision 201254)
++++ gcc/dwarf2out.c (revision 201255)
+@@ -7806,6 +7806,30 @@ unmark_all_dies (dw_die_ref die)
+ unmark_all_dies (AT_ref (a));
+ }
+
++/* Calculate if the entry should appear in the final output file. It may be
++ from a pruned a type. */
++
++static bool
++include_pubname_in_output (vec *table, pubname_entry *p)
++{
++ if (table == pubname_table)
++ {
++ /* Enumerator names are part of the pubname table, but the parent
++ DW_TAG_enumeration_type die may have been pruned. Don't output
++ them if that is the case. */
++ if (p->die->die_tag == DW_TAG_enumerator && !p->die->die_mark)
++ return false;
++
++ /* Everything else in the pubname table is included. */
++ return true;
++ }
++
++ /* The pubtypes table shouldn't include types that have been
++ pruned. */
++ return (p->die->die_offset != 0
++ || !flag_eliminate_unused_debug_types);
++}
++
+ /* Return the size of the .debug_pubnames or .debug_pubtypes table
+ generated for the compilation unit. */
+
+@@ -7818,9 +7842,7 @@ size_of_pubnames (vecdie->die_offset != 0
+- || !flag_eliminate_unused_debug_types)
++ if (include_pubname_in_output (names, p))
+ size += strlen (p->name) + DWARF_OFFSET_SIZE + 1;
+
+ size += DWARF_OFFSET_SIZE;
+@@ -8999,22 +9021,14 @@ output_pubnames (vecdie->die_tag == DW_TAG_enumerator && !pub->die->die_mark)
+- continue;
+-
+- /* We shouldn't see pubnames for DIEs outside of the main CU. */
+- if (names == pubname_table)
+- gcc_assert (pub->die->die_mark);
+-
+- if (names != pubtype_table
+- || pub->die->die_offset != 0
+- || !flag_eliminate_unused_debug_types)
++ if (include_pubname_in_output (names, pub))
+ {
+ dw_offset die_offset = pub->die->die_offset;
+
++ /* We shouldn't see pubnames for DIEs outside of the main CU. */
++ if (names == pubname_table)
++ gcc_assert (pub->die->die_mark);
++
+ /* If we're putting types in their own .debug_types sections,
+ the .debug_pubtypes table will still point to the compile
+ unit (not the type unit), so we want to use the offset of
diff --git a/SOURCES/gcc48-rh1296211.patch b/SOURCES/gcc48-rh1296211.patch
new file mode 100644
index 0000000..f1b084a
--- /dev/null
+++ b/SOURCES/gcc48-rh1296211.patch
@@ -0,0 +1,14 @@
+2015-09-02 Alan Modra
+
+ * config/rs6000/sysv4.h (LINK_SPEC): Delete link_target.
+
+--- gcc/config/rs6000/sysv4.h (revision 227396)
++++ gcc/config/rs6000/sysv4.h (revision 227397)
+@@ -574,7 +574,6 @@ ENDIAN_SELECT(" -mbig", " -mlittle", DEF
+ %{R*} \
+ %(link_shlib) \
+ %{!T*: %(link_start) } \
+-%(link_target) \
+ %(link_os)"
+
+ /* Shared libraries are not default. */
diff --git a/SOURCES/gcc48-rh1304449.patch b/SOURCES/gcc48-rh1304449.patch
new file mode 100644
index 0000000..213ff0c
--- /dev/null
+++ b/SOURCES/gcc48-rh1304449.patch
@@ -0,0 +1,496 @@
+2015-12-24 Kirill Yukhin
+
+ * common/config/i386/i386-common.c (OPTION_MASK_ISA_PKU_SET): New.
+ (OPTION_MASK_ISA_PKU_UNSET): Ditto.
+ (ix86_handle_option): Handle OPT_mpku.
+ * config.gcc: Add pkuintrin.h to i[34567]86-*-* and x86_64-*-*
+ targets.
+ * config/i386/cpuid.h (host_detect_local_cpu): Detect PKU feature.
+ * config/i386/i386-c.c (ix86_target_macros_internal): Handle PKU ISA
+ flag.
+ * config/i386/i386.c (ix86_target_string): Add "-mpku" to
+ ix86_target_opts.
+ (ix86_option_override_internal): Define PTA_PKU, mention new key
+ in skylake-avx512. Handle new ISA bits.
+ (ix86_valid_target_attribute_inner_p): Add "pku".
+ (enum ix86_builtins): Add IX86_BUILTIN_RDPKRU and IX86_BUILTIN_WRPKRU.
+ (builtin_description bdesc_special_args[]): Add new built-ins.
+ * config/i386/i386.h (define TARGET_PKU): New.
+ (define TARGET_PKU_P): Ditto.
+ * config/i386/i386.md (define_c_enum "unspecv"): Add UNSPEC_PKU.
+ (define_expand "rdpkru"): New.
+ (define_insn "*rdpkru"): Ditto.
+ (define_expand "wrpkru"): Ditto.
+ (define_insn "*wrpkru"): Ditto.
+ * config/i386/i386.opt (mpku): Ditto.
+ * config/i386/pkuintrin.h: New file.
+ * config/i386/x86intrin.h: Include pkuintrin.h
+ * doc/extend.texi: Describe new built-ins.
+ * doc/invoke.texi: Describe new switches.
+
+ * g++.dg/other/i386-2.C: Add -mpku.
+ * g++.dg/other/i386-3.C: Ditto.
+ * gcc.target/i386/rdpku-1.c: New test.
+ * gcc.target/i386/sse-12.c: Add -mpku.
+ * gcc.target/i386/sse-13.c: Ditto.
+ * gcc.target/i386/sse-22.c: Ditto.
+ * gcc.target/i386/sse-33.c: Ditto.
+ * gcc.target/i386/wrpku-1.c: New test.
+
+--- gcc/config.gcc (revision 231943)
++++ gcc/config.gcc (revision 231945)
+@@ -368,7 +368,7 @@ i[34567]86-*-*)
+ lzcntintrin.h bmiintrin.h bmi2intrin.h tbmintrin.h
+ avx2intrin.h fmaintrin.h f16cintrin.h rtmintrin.h
+ xtestintrin.h rdseedintrin.h prfchwintrin.h adxintrin.h
+- fxsrintrin.h xsaveintrin.h xsaveoptintrin.h"
++ fxsrintrin.h xsaveintrin.h xsaveoptintrin.h pkuintrin.h"
+ ;;
+ x86_64-*-*)
+ cpu_type=i386
+@@ -383,7 +383,7 @@ x86_64-*-*)
+ lzcntintrin.h bmiintrin.h tbmintrin.h bmi2intrin.h
+ avx2intrin.h fmaintrin.h f16cintrin.h rtmintrin.h
+ xtestintrin.h rdseedintrin.h prfchwintrin.h adxintrin.h
+- fxsrintrin.h xsaveintrin.h xsaveoptintrin.h"
++ fxsrintrin.h xsaveintrin.h xsaveoptintrin.h pkuintrin.h"
+ need_64bit_hwint=yes
+ ;;
+ ia64-*-*)
+--- gcc/common/config/i386/i386-common.c (revision 231943)
++++ gcc/common/config/i386/i386-common.c (revision 231945)
+@@ -98,6 +98,7 @@ along with GCC; see the file COPYING3.
+ #define OPTION_MASK_ISA_RDRND_SET OPTION_MASK_ISA_RDRND
+ #define OPTION_MASK_ISA_F16C_SET \
+ (OPTION_MASK_ISA_F16C | OPTION_MASK_ISA_AVX_SET)
++#define OPTION_MASK_ISA_PKU_SET OPTION_MASK_ISA_PKU
+
+ /* Define a set of ISAs which aren't available when a given ISA is
+ disabled. MMX and SSE ISAs are handled separately. */
+@@ -164,6 +165,7 @@ along with GCC; see the file COPYING3.
+ #define OPTION_MASK_ISA_FSGSBASE_UNSET OPTION_MASK_ISA_FSGSBASE
+ #define OPTION_MASK_ISA_RDRND_UNSET OPTION_MASK_ISA_RDRND
+ #define OPTION_MASK_ISA_F16C_UNSET OPTION_MASK_ISA_F16C
++#define OPTION_MASK_ISA_PKU_UNSET OPTION_MASK_ISA_PKU
+
+ /* Implement TARGET_HANDLE_OPTION. */
+
+@@ -659,6 +661,19 @@ ix86_handle_option (struct gcc_options *
+ }
+ return true;
+
++ case OPT_mpku:
++ if (value)
++ {
++ opts->x_ix86_isa_flags |= OPTION_MASK_ISA_PKU_SET;
++ opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_PKU_SET;
++ }
++ else
++ {
++ opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_PKU_UNSET;
++ opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_PKU_UNSET;
++ }
++ return true;
++
+ /* Comes from final.c -- no real reason to change it. */
+ #define MAX_CODE_ALIGN 16
+
+--- gcc/config/i386/i386.h (revision 231943)
++++ gcc/config/i386/i386.h (revision 231945)
+@@ -80,6 +80,7 @@ see the files COPYING3 and COPYING.RUNTI
+ #define TARGET_FXSR TARGET_ISA_FXSR
+ #define TARGET_XSAVE TARGET_ISA_XSAVE
+ #define TARGET_XSAVEOPT TARGET_ISA_XSAVEOPT
++#define TARGET_PKU TARGET_ISA_PKU
+
+ #define TARGET_LP64 TARGET_ABI_64
+ #define TARGET_X32 TARGET_ABI_X32
+--- gcc/config/i386/i386.md (revision 231943)
++++ gcc/config/i386/i386.md (revision 231945)
+@@ -224,6 +224,9 @@ (define_c_enum "unspecv" [
+ UNSPECV_XTEST
+
+ UNSPECV_NLGR
++
++ ;; For RDPKRU and WRPKRU support
++ UNSPECV_PKU
+ ])
+
+ ;; Constants to represent rounding modes in the ROUND instruction
+@@ -18289,6 +18292,48 @@ (define_insn "xtest_1"
+ [(set_attr "type" "other")
+ (set_attr "length" "3")])
+
++;; RDPKRU and WRPKRU
++
++(define_expand "rdpkru"
++ [(parallel
++ [(set (match_operand:SI 0 "register_operand")
++ (unspec_volatile:SI [(match_dup 1)] UNSPECV_PKU))
++ (set (match_dup 2) (const_int 0))])]
++ "TARGET_PKU"
++{
++ operands[1] = force_reg (SImode, const0_rtx);
++ operands[2] = gen_reg_rtx (SImode);
++})
++
++(define_insn "*rdpkru"
++ [(set (match_operand:SI 0 "register_operand" "=a")
++ (unspec_volatile:SI [(match_operand:SI 2 "register_operand" "c")]
++ UNSPECV_PKU))
++ (set (match_operand:SI 1 "register_operand" "=d")
++ (const_int 0))]
++ "TARGET_PKU"
++ "rdpkru"
++ [(set_attr "type" "other")])
++
++(define_expand "wrpkru"
++ [(unspec_volatile:SI
++ [(match_operand:SI 0 "register_operand")
++ (match_dup 1) (match_dup 2)] UNSPECV_PKU)]
++ "TARGET_PKU"
++{
++ operands[1] = force_reg (SImode, const0_rtx);
++ operands[2] = force_reg (SImode, const0_rtx);
++})
++
++(define_insn "*wrpkru"
++ [(unspec_volatile:SI
++ [(match_operand:SI 0 "register_operand" "a")
++ (match_operand:SI 1 "register_operand" "d")
++ (match_operand:SI 2 "register_operand" "c")] UNSPECV_PKU)]
++ "TARGET_PKU"
++ "wrpkru"
++ [(set_attr "type" "other")])
++
+ (include "mmx.md")
+ (include "sse.md")
+ (include "sync.md")
+--- gcc/config/i386/pkuintrin.h (revision 0)
++++ gcc/config/i386/pkuintrin.h (revision 231945)
+@@ -0,0 +1,45 @@
++/* Copyright (C) 2015 Free Software Foundation, Inc.
++
++ This file is part of GCC.
++
++ GCC is free software; you can redistribute it and/or modify
++ it under the terms of the GNU General Public License as published by
++ the Free Software Foundation; either version 3, or (at your option)
++ any later version.
++
++ GCC is distributed in the hope that it will be useful,
++ but WITHOUT ANY WARRANTY; without even the implied warranty of
++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ GNU General Public License for more details.
++
++ Under Section 7 of GPL version 3, you are granted additional
++ permissions described in the GCC Runtime Library Exception, version
++ 3.1, as published by the Free Software Foundation.
++
++ You should have received a copy of the GNU General Public License and
++ a copy of the GCC Runtime Library Exception along with this program;
++ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
++ . */
++
++#if !defined _X86INTRIN_H_INCLUDED
++# error "Never use directly; include instead."
++#endif
++
++#ifndef _PKUINTRIN_H_INCLUDED
++#define _PKUINTRIN_H_INCLUDED
++
++extern __inline unsigned int
++__attribute__((__gnu_inline__, __always_inline__, __artificial__))
++_rdpkru_u32(void)
++{
++ return __builtin_ia32_rdpkru ();
++}
++
++extern __inline void
++__attribute__((__gnu_inline__, __always_inline__, __artificial__))
++_wrpkru(unsigned int key)
++{
++ return __builtin_ia32_wrpkru (key);
++}
++
++#endif /* _PKUINTRIN_H_INCLUDED */
+--- gcc/config/i386/cpuid.h (revision 231943)
++++ gcc/config/i386/cpuid.h (revision 231945)
+@@ -74,6 +74,10 @@
+ #define bit_RDSEED (1 << 18)
+ #define bit_ADX (1 << 19)
+
++/* %ecx */
++#define bit_PKU (1 << 3)
++#define bit_OSPKE (1 << 4)
++
+ /* Extended State Enumeration Sub-leaf (%eax == 13, %ecx == 1) */
+ #define bit_XSAVEOPT (1 << 0)
+
+--- gcc/config/i386/x86intrin.h (revision 231943)
++++ gcc/config/i386/x86intrin.h (revision 231945)
+@@ -119,4 +119,8 @@
+
+ #include
+
++#ifdef __PKU__
++#include
++#endif
++
+ #endif /* _X86INTRIN_H_INCLUDED */
+--- gcc/config/i386/i386-c.c (revision 231943)
++++ gcc/config/i386/i386-c.c (revision 231945)
+@@ -348,6 +348,8 @@ ix86_target_macros_internal (HOST_WIDE_I
+ def_or_undef (parse_in, "__XSAVE__");
+ if (isa_flag & OPTION_MASK_ISA_XSAVEOPT)
+ def_or_undef (parse_in, "__XSAVEOPT__");
++ if (isa_flag & OPTION_MASK_ISA_PKU)
++ def_or_undef (parse_in, "__PKU__");
+ if ((fpmath & FPMATH_SSE) && (isa_flag & OPTION_MASK_ISA_SSE))
+ def_or_undef (parse_in, "__SSE_MATH__");
+ if ((fpmath & FPMATH_SSE) && (isa_flag & OPTION_MASK_ISA_SSE2))
+--- gcc/config/i386/i386.opt (revision 231943)
++++ gcc/config/i386/i386.opt (revision 231945)
+@@ -626,3 +626,7 @@ Split 32-byte AVX unaligned store
+ mrtm
+ Target Report Mask(ISA_RTM) Var(ix86_isa_flags) Save
+ Support RTM built-in functions and code generation
++
++mpku
++Target Report Mask(ISA_PKU) Var(ix86_isa_flags) Save
++Support PKU built-in functions and code generation
+--- gcc/config/i386/driver-i386.c (revision 231943)
++++ gcc/config/i386/driver-i386.c (revision 231945)
+@@ -408,6 +408,7 @@ const char *host_detect_local_cpu (int a
+ unsigned int has_rdrnd = 0, has_f16c = 0, has_fsgsbase = 0;
+ unsigned int has_rdseed = 0, has_prfchw = 0, has_adx = 0;
+ unsigned int has_osxsave = 0, has_fxsr = 0, has_xsave = 0, has_xsaveopt = 0;
++ unsigned int has_pku = 0;
+
+ bool arch;
+
+@@ -479,6 +480,8 @@ const char *host_detect_local_cpu (int a
+ has_fsgsbase = ebx & bit_FSGSBASE;
+ has_rdseed = ebx & bit_RDSEED;
+ has_adx = ebx & bit_ADX;
++
++ has_pku = ecx & bit_OSPKE;
+ }
+
+ if (max_level >= 13)
+@@ -855,12 +858,13 @@ const char *host_detect_local_cpu (int a
+ const char *fxsr = has_fxsr ? " -mfxsr" : " -mno-fxsr";
+ const char *xsave = has_xsave ? " -mxsave" : " -mno-xsave";
+ const char *xsaveopt = has_xsaveopt ? " -mxsaveopt" : " -mno-xsaveopt";
++ const char *pku = has_pku ? " -mpku" : " -mno-pku";
+
+ options = concat (options, cx16, sahf, movbe, ase, pclmul,
+ popcnt, abm, lwp, fma, fma4, xop, bmi, bmi2,
+ tbm, avx, avx2, sse4_2, sse4_1, lzcnt, rtm,
+ hle, rdrnd, f16c, fsgsbase, rdseed, prfchw, adx,
+- fxsr, xsave, xsaveopt, NULL);
++ fxsr, xsave, xsaveopt, pku, NULL);
+ }
+
+ done:
+--- gcc/config/i386/i386.c (revision 231943)
++++ gcc/config/i386/i386.c (revision 231945)
+@@ -2632,6 +2632,7 @@ ix86_target_string (HOST_WIDE_INT isa, i
+ { "-mrtm", OPTION_MASK_ISA_RTM },
+ { "-mxsave", OPTION_MASK_ISA_XSAVE },
+ { "-mxsaveopt", OPTION_MASK_ISA_XSAVEOPT },
++ { "-mpku", OPTION_MASK_ISA_PKU },
+ };
+
+ /* Flag options. */
+@@ -2905,6 +2906,7 @@ ix86_option_override_internal (bool main
+ #define PTA_FXSR (HOST_WIDE_INT_1 << 37)
+ #define PTA_XSAVE (HOST_WIDE_INT_1 << 38)
+ #define PTA_XSAVEOPT (HOST_WIDE_INT_1 << 39)
++#define PTA_PKU (HOST_WIDE_INT_1 << 60)
+
+ /* if this reaches 64, need to widen struct pta flags below */
+
+@@ -3429,6 +3431,9 @@ ix86_option_override_internal (bool main
+ if (processor_alias_table[i].flags & PTA_XSAVEOPT
+ && !(ix86_isa_flags_explicit & OPTION_MASK_ISA_XSAVEOPT))
+ ix86_isa_flags |= OPTION_MASK_ISA_XSAVEOPT;
++ if (processor_alias_table[i].flags & PTA_PKU
++ && !(ix86_isa_flags_explicit & OPTION_MASK_ISA_PKU))
++ ix86_isa_flags |= OPTION_MASK_ISA_PKU;
+ if (processor_alias_table[i].flags & (PTA_PREFETCH_SSE | PTA_SSE))
+ x86_prefetch_sse = true;
+
+@@ -4220,6 +4225,7 @@ ix86_valid_target_attribute_inner_p (tre
+ IX86_ATTR_ISA ("fxsr", OPT_mfxsr),
+ IX86_ATTR_ISA ("xsave", OPT_mxsave),
+ IX86_ATTR_ISA ("xsaveopt", OPT_mxsaveopt),
++ IX86_ATTR_ISA ("pku", OPT_mpku),
+
+ /* enum options */
+ IX86_ATTR_ENUM ("fpmath=", OPT_mfpmath_),
+@@ -27042,6 +27048,10 @@ enum ix86_builtins
+ IX86_BUILTIN_CPU_IS,
+ IX86_BUILTIN_CPU_SUPPORTS,
+
++ /* PKU instructions. */
++ IX86_BUILTIN_RDPKRU,
++ IX86_BUILTIN_WRPKRU,
++
+ IX86_BUILTIN_MAX
+ };
+
+@@ -27357,6 +27367,10 @@ static const struct builtin_description
+ { OPTION_MASK_ISA_RTM, CODE_FOR_xbegin, "__builtin_ia32_xbegin", IX86_BUILTIN_XBEGIN, UNKNOWN, (int) UNSIGNED_FTYPE_VOID },
+ { OPTION_MASK_ISA_RTM, CODE_FOR_xend, "__builtin_ia32_xend", IX86_BUILTIN_XEND, UNKNOWN, (int) VOID_FTYPE_VOID },
+ { OPTION_MASK_ISA_RTM, CODE_FOR_xtest, "__builtin_ia32_xtest", IX86_BUILTIN_XTEST, UNKNOWN, (int) INT_FTYPE_VOID },
++
++ /* RDPKRU and WRPKRU. */
++ { OPTION_MASK_ISA_PKU, CODE_FOR_rdpkru, "__builtin_ia32_rdpkru", IX86_BUILTIN_RDPKRU, UNKNOWN, (int) UNSIGNED_FTYPE_VOID },
++ { OPTION_MASK_ISA_PKU, CODE_FOR_wrpkru, "__builtin_ia32_wrpkru", IX86_BUILTIN_WRPKRU, UNKNOWN, (int) VOID_FTYPE_UNSIGNED },
+ };
+
+ /* Builtins with variable number of arguments. */
+--- gcc/doc/extend.texi (revision 231943)
++++ gcc/doc/extend.texi (revision 231945)
+@@ -10996,6 +10996,13 @@ void __builtin_ia32_xabort (status)
+ int __builtin_ia32_xtest ()
+ @end smallexample
+
++The following built-in functions are available when @option{-mpku} is used.
++They generate reads and writes to PKRU.
++@smallexample
++void __builtin_ia32_wrpkru (unsigned int)
++unsigned int __builtin_ia32_rdpkru ()
++@end smallexample
++
+ @node X86 transactional memory intrinsics
+ @subsection X86 transaction memory intrinsics
+
+--- gcc/doc/invoke.texi (revision 231943)
++++ gcc/doc/invoke.texi (revision 231945)
+@@ -645,7 +645,7 @@ Objective-C and Objective-C++ Dialects}.
+ -mmmx -msse -msse2 -msse3 -mssse3 -msse4.1 -msse4.2 -msse4 -mavx @gol
+ -mavx2 -maes -mpclmul -mfsgsbase -mrdrnd -mf16c -mfma @gol
+ -msse4a -m3dnow -mpopcnt -mabm -mbmi -mtbm -mfma4 -mxop -mlzcnt @gol
+--mbmi2 -mrtm -mlwp -mthreads @gol
++-mbmi2 -mrtm -mlwp -mpku -mthreads @gol
+ -mno-align-stringops -minline-all-stringops @gol
+ -minline-stringops-dynamically -mstringop-strategy=@var{alg} @gol
+ -mpush-args -maccumulate-outgoing-args -m128bit-long-double @gol
+@@ -14326,6 +14326,8 @@ preferred alignment to @option{-mpreferr
+ @itemx -mlzcnt
+ @itemx -mno-lzcnt
+ @itemx -mrtm
++@itemx -mpku
++@itemx -mno-pku
+ @itemx -mtbm
+ @itemx -mno-tbm
+ @opindex mmmx
+@@ -14336,7 +14338,7 @@ preferred alignment to @option{-mpreferr
+ @opindex mno-3dnow
+ These switches enable or disable the use of instructions in the MMX, SSE,
+ SSE2, SSE3, SSSE3, SSE4.1, AVX, AVX2, AES, PCLMUL, FSGSBASE, RDRND, F16C,
+-FMA, SSE4A, FMA4, XOP, LWP, ABM, BMI, BMI2, LZCNT, RTM or 3DNow!@:
++FMA, SSE4A, FMA4, XOP, LWP, ABM, BMI, BMI2, LZCNT, RTM, PKU or 3DNow!@:
+ extended instruction sets.
+ These extensions are also available as built-in functions: see
+ @ref{X86 Built-in Functions}, for details of the functions enabled and
+--- gcc/testsuite/gcc.target/i386/sse-12.c (revision 231943)
++++ gcc/testsuite/gcc.target/i386/sse-12.c (revision 231945)
+@@ -3,7 +3,7 @@
+ popcntintrin.h and mm_malloc.h are usable
+ with -O -std=c89 -pedantic-errors. */
+ /* { dg-do compile } */
+-/* { dg-options "-O -std=c89 -pedantic-errors -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt" } */
++/* { dg-options "-O -std=c89 -pedantic-errors -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt -mpku" } */
+
+ #include
+
+--- gcc/testsuite/gcc.target/i386/sse-13.c (revision 231943)
++++ gcc/testsuite/gcc.target/i386/sse-13.c (revision 231945)
+@@ -1,5 +1,5 @@
+ /* { dg-do compile } */
+-/* { dg-options "-O2 -Werror-implicit-function-declaration -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt" } */
++/* { dg-options "-O2 -Werror-implicit-function-declaration -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt -mpku" } */
+
+ #include
+
+--- gcc/testsuite/gcc.target/i386/sse-22.c (revision 231943)
++++ gcc/testsuite/gcc.target/i386/sse-22.c (revision 231945)
+@@ -268,7 +268,7 @@ test_2 (_mm_clmulepi64_si128, __m128i, _
+
+ /* x86intrin.h (FMA4/XOP/LWP/BMI/BMI2/TBM/LZCNT/FMA). */
+ #ifdef DIFFERENT_PRAGMAS
+-#pragma GCC target ("fma4,xop,lwp,bmi,bmi2,tbm,lzcnt,fma,rdseed,prfchw,adx,fxsr,xsaveopt")
++#pragma GCC target ("fma4,xop,lwp,bmi,bmi2,tbm,lzcnt,fma,rdseed,prfchw,adx,fxsr,xsaveopt,pku")
+ #endif
+ #include
+ /* xopintrin.h */
+--- gcc/testsuite/gcc.target/i386/sse-23.c (revision 231943)
++++ gcc/testsuite/gcc.target/i386/sse-23.c (revision 231945)
+@@ -183,7 +183,7 @@
+ /* rtmintrin.h */
+ #define __builtin_ia32_xabort(M) __builtin_ia32_xabort(1)
+
+-#pragma GCC target ("sse4a,3dnow,avx,avx2,fma4,xop,aes,pclmul,popcnt,abm,lzcnt,bmi,bmi2,tbm,lwp,fsgsbase,rdrnd,f16c,fma,rtm,rdseed,prfchw,adx,fxsr,xsaveopt")
++#pragma GCC target ("sse4a,3dnow,avx,avx2,fma4,xop,aes,pclmul,popcnt,abm,lzcnt,bmi,bmi2,tbm,lwp,fsgsbase,rdrnd,f16c,fma,rtm,rdseed,prfchw,adx,fxsr,xsaveopt,pku")
+ #include
+ #include
+ #include
+--- gcc/testsuite/gcc.target/i386/rdpku-1.c (revision 0)
++++ gcc/testsuite/gcc.target/i386/rdpku-1.c (revision 231945)
+@@ -0,0 +1,11 @@
++/* { dg-do compile } */
++/* { dg-options "-mpku -O2" } */
++/* { dg-final { scan-assembler "rdpkru\n" } } */
++
++#include
++
++unsigned extern
++rdpku_test (void)
++{
++ return _rdpkru_u32 ();
++}
+--- gcc/testsuite/gcc.target/i386/wrpku-1.c (revision 0)
++++ gcc/testsuite/gcc.target/i386/wrpku-1.c (revision 231945)
+@@ -0,0 +1,11 @@
++/* { dg-do compile } */
++/* { dg-options "-mpku -O2" } */
++/* { dg-final { scan-assembler "wrpkru\n" } } */
++
++#include
++
++void extern
++wrpku_test (unsigned int key)
++{
++ _wrpkru (key);
++}
+--- gcc/testsuite/g++.dg/other/i386-2.C (revision 231943)
++++ gcc/testsuite/g++.dg/other/i386-2.C (revision 231945)
+@@ -1,9 +1,9 @@
+ /* { dg-do compile { target i?86-*-* x86_64-*-* } } */
+-/* { dg-options "-O -pedantic-errors -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt" } */
++/* { dg-options "-O -pedantic-errors -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt -mpku" } */
+
+ /* Test that {,x,e,p,t,s,w,a,b,i}mmintrin.h, mm3dnow.h, fma4intrin.h,
+ xopintrin.h, abmintrin.h, bmiintrin.h, tbmintrin.h, lwpintrin.h,
+- popcntintrin.h, fmaintrin.h and mm_malloc.h.h are usable with
++ popcntintrin.h, fmaintrin.h, pkuintrin.h and mm_malloc.h.h are usable with
+ -O -pedantic-errors. */
+
+ #include
+--- gcc/testsuite/g++.dg/other/i386-3.C (revision 231943)
++++ gcc/testsuite/g++.dg/other/i386-3.C (revision 231945)
+@@ -1,9 +1,9 @@
+ /* { dg-do compile { target i?86-*-* x86_64-*-* } } */
+-/* { dg-options "-O -fkeep-inline-functions -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt" } */
++/* { dg-options "-O -fkeep-inline-functions -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt -mpku" } */
+
+ /* Test that {,x,e,p,t,s,w,a,b,i}mmintrin.h, mm3dnow.h, fma4intrin.h,
+ xopintrin.h, abmintrin.h, bmiintrin.h, tbmintrin.h, lwpintrin.h,
+- popcntintrin.h, fmaintrin.h and mm_malloc.h are usable with
++ popcntintrin.h, fmaintrin.h, pkuintrin.h and mm_malloc.h are usable with
+ -O -fkeep-inline-functions. */
+
+ #include
diff --git a/SOURCES/gcc48-rh1312436.patch b/SOURCES/gcc48-rh1312436.patch
new file mode 100644
index 0000000..6bf9313
--- /dev/null
+++ b/SOURCES/gcc48-rh1312436.patch
@@ -0,0 +1,76 @@
+2015-12-02 Pierre-Marie de Rodat
+
+ * dwarf2out.c (dwar2out_var_location): Enhance pattern matching to get
+ the SYMBOL_REF they embed.
+ (gen_subprogram_die): Handle such calls.
+
+--- gcc/dwarf2out.c (revision 231184)
++++ gcc/dwarf2out.c (revision 231185)
+@@ -18051,18 +18051,23 @@ gen_subprogram_die (tree decl, dw_die_re
+ }
+ if (mode == VOIDmode || mode == BLKmode)
+ continue;
+- if (XEXP (XEXP (arg, 0), 0) == pc_rtx)
++ /* Get dynamic information about call target only if we
++ have no static information: we cannot generate both
++ DW_AT_abstract_origin and DW_AT_GNU_call_site_target
++ attributes. */
++ if (ca_loc->symbol_ref == NULL_RTX)
+ {
+- gcc_assert (ca_loc->symbol_ref == NULL_RTX);
+- tloc = XEXP (XEXP (arg, 0), 1);
+- continue;
+- }
+- else if (GET_CODE (XEXP (XEXP (arg, 0), 0)) == CLOBBER
+- && XEXP (XEXP (XEXP (arg, 0), 0), 0) == pc_rtx)
+- {
+- gcc_assert (ca_loc->symbol_ref == NULL_RTX);
+- tlocc = XEXP (XEXP (arg, 0), 1);
+- continue;
++ if (XEXP (XEXP (arg, 0), 0) == pc_rtx)
++ {
++ tloc = XEXP (XEXP (arg, 0), 1);
++ continue;
++ }
++ else if (GET_CODE (XEXP (XEXP (arg, 0), 0)) == CLOBBER
++ && XEXP (XEXP (XEXP (arg, 0), 0), 0) == pc_rtx)
++ {
++ tlocc = XEXP (XEXP (arg, 0), 1);
++ continue;
++ }
+ }
+ reg = NULL;
+ if (REG_P (XEXP (XEXP (arg, 0), 0)))
+@@ -20842,15 +20847,27 @@ dwarf2out_var_location (rtx loc_note)
+ if (!CALL_P (prev))
+ prev = XVECEXP (PATTERN (prev), 0, 0);
+ ca_loc->tail_call_p = SIBLING_CALL_P (prev);
++
++ /* Look for a SYMBOL_REF in the "prev" instruction. */
+ x = get_call_rtx_from (PATTERN (prev));
+ if (x)
+ {
+- x = XEXP (XEXP (x, 0), 0);
+- if (GET_CODE (x) == SYMBOL_REF
+- && SYMBOL_REF_DECL (x)
+- && TREE_CODE (SYMBOL_REF_DECL (x)) == FUNCTION_DECL)
+- ca_loc->symbol_ref = x;
++ /* Try to get the call symbol, if any. */
++ if (MEM_P (XEXP (x, 0)))
++ x = XEXP (x, 0);
++ /* First, look for a memory access to a symbol_ref. */
++ if (GET_CODE (XEXP (x, 0)) == SYMBOL_REF
++ && SYMBOL_REF_DECL (XEXP (x, 0))
++ && TREE_CODE (SYMBOL_REF_DECL (XEXP (x, 0))) == FUNCTION_DECL)
++ ca_loc->symbol_ref = XEXP (x, 0);
++ /* Otherwise, look at a compile-time known user-level function
++ declaration. */
++ else if (MEM_P (x)
++ && MEM_EXPR (x)
++ && TREE_CODE (MEM_EXPR (x)) == FUNCTION_DECL)
++ ca_loc->symbol_ref = XEXP (DECL_RTL (MEM_EXPR (x)), 0);
+ }
++
+ ca_loc->block = insn_scope (prev);
+ if (call_arg_locations)
+ call_arg_loc_last->next = ca_loc;
diff --git a/SOURCES/gcc48-rh1312850.patch b/SOURCES/gcc48-rh1312850.patch
new file mode 100644
index 0000000..841627f
--- /dev/null
+++ b/SOURCES/gcc48-rh1312850.patch
@@ -0,0 +1,24 @@
+2016-05-26 Martin Sebor
+ Jakub Jelinek
+
+ * asan/asan_rtl.cc (InitializeHighMemEnd): Backport part of upstream
+ r221457 fix and typo fix from r206158.
+
+--- libsanitizer/asan/asan_rtl.cc.jj 2013-03-04 12:44:18.000000000 +0100
++++ libsanitizer/asan/asan_rtl.cc 2016-05-26 09:57:10.761973999 +0200
+@@ -308,11 +308,13 @@ static void InitializeHighMemEnd() {
+ # if defined(__powerpc64__)
+ // FIXME:
+ // On PowerPC64 we have two different address space layouts: 44- and 46-bit.
+- // We somehow need to figure our which one we are using now and choose
++ // We somehow need to figure out which one we are using now and choose
+ // one of 0x00000fffffffffffUL and 0x00003fffffffffffUL.
+ // Note that with 'ulimit -s unlimited' the stack is moved away from the top
+ // of the address space, so simply checking the stack address is not enough.
+- kHighMemEnd = (1ULL << 44) - 1; // 0x00000fffffffffffUL
++ // This should (does) work for both PowerPC64 Endian modes.
++ kHighMemEnd =
++ (1ULL << (MostSignificantSetBitIndex(GET_CURRENT_FRAME()) + 1)) - 1;
+ # else
+ kHighMemEnd = (1ULL << 47) - 1; // 0x00007fffffffffffUL;
+ # endif
diff --git a/SOURCES/gcc48-rh1344807.patch b/SOURCES/gcc48-rh1344807.patch
new file mode 100644
index 0000000..130f558
--- /dev/null
+++ b/SOURCES/gcc48-rh1344807.patch
@@ -0,0 +1,37 @@
+2016-06-14 Jason Merrill
+
+ * call.c (add_function_candidate): Be more careful about
+ ref-to-ptr conversion.
+
+2016-06-15 Jakub Jelinek
+
+ * g++.dg/cpp0x/ref-qual17.C: New test.
+
+--- gcc/cp/call.c.jj 2014-08-06 10:45:03.260163142 +0200
++++ gcc/cp/call.c 2016-06-15 11:15:06.663878423 +0200
+@@ -1975,7 +1975,9 @@ add_function_candidate (struct z_candida
+ bool rv = FUNCTION_RVALUE_QUALIFIED (TREE_TYPE (fn));
+ parmtype = cp_build_reference_type (parmtype, rv);
+ if (TREE_CODE (arg) == CONVERT_EXPR
+- && TYPE_PTR_P (TREE_TYPE (arg)))
++ && TYPE_PTR_P (TREE_TYPE (arg))
++ && (TREE_CODE (TREE_TYPE (TREE_OPERAND (arg, 0)))
++ == REFERENCE_TYPE))
+ /* Strip conversion from reference to pointer. */
+ arg = TREE_OPERAND (arg, 0);
+ arg = build_fold_indirect_ref (arg);
+--- gcc/testsuite/g++.dg/cpp0x/ref-qual17.C.jj 2016-06-15 11:12:57.692558903 +0200
++++ gcc/testsuite/g++.dg/cpp0x/ref-qual17.C 2016-06-15 11:07:02.000000000 +0200
+@@ -0,0 +1,12 @@
++// { dg-do compile { target c++11 } }
++
++struct A
++{
++ void foo () &;
++};
++
++void
++bar (__UINTPTR_TYPE__ a)
++{
++ reinterpret_cast(a)->foo ();
++}
diff --git a/SOURCES/gcc48-rh1369183.patch b/SOURCES/gcc48-rh1369183.patch
new file mode 100644
index 0000000..7127d15
--- /dev/null
+++ b/SOURCES/gcc48-rh1369183.patch
@@ -0,0 +1,52 @@
+2017-03-07 Jakub Jelinek
+
+ Partial backport
+ 2016-05-07 Fritz Reese
+
+ PR fortran/56226
+ * interface.c (gfc_compare_derived_types): Don't ICE if the
+ derived type or both types have no components.
+
+ * gfortran.dg/rh1369183.f90: New test.
+
+--- gcc/fortran/interface.c.jj 2015-06-18 16:32:45.000000000 +0200
++++ gcc/fortran/interface.c 2017-03-07 18:35:38.982302826 +0100
+@@ -418,6 +418,13 @@ gfc_compare_derived_types (gfc_symbol *d
+ && !(derived1->attr.is_bind_c && derived2->attr.is_bind_c))
+ return 0;
+
++ /* Protect against null components. */
++ if (derived1->attr.zero_comp != derived2->attr.zero_comp)
++ return 0;
++
++ if (derived1->attr.zero_comp)
++ return 1;
++
+ dt1 = derived1->components;
+ dt2 = derived2->components;
+
+--- gcc/testsuite/gfortran.dg/rh1369183.f90.jj 2017-03-07 18:37:39.574775432 +0100
++++ gcc/testsuite/gfortran.dg/rh1369183.f90 2017-03-07 18:38:38.423993194 +0100
+@@ -0,0 +1,22 @@
++! { dg-do compile }
++
++module mod1369183
++ implicit none
++ contains
++ subroutine sub(test)
++ type test_t
++ sequence
++ integer(4) type
++ end type test_t
++ type(test_t),intent(inout) :: test
++ end subroutine sub
++end module mod1369183
++subroutine rh1369183
++ use mod1369183
++ implicit none
++ type test_t
++ sequence
++ end type test_t
++ type(test_t) :: tst
++ call sub(tst) ! { dg-error "Type mismatch in argument" }
++end subroutine rh1369183
diff --git a/SOURCES/gcc48-rh1402585.patch b/SOURCES/gcc48-rh1402585.patch
new file mode 100644
index 0000000..3aa1cae
--- /dev/null
+++ b/SOURCES/gcc48-rh1402585.patch
@@ -0,0 +1,32 @@
+--- gcc/reload.c (revision 235552)
++++ gcc/reload.c (working copy)
+@@ -4054,14 +4054,14 @@ find_reloads (rtx insn, int replace, int
+ &XEXP (recog_data.operand[i], 0), (rtx*) 0,
+ base_reg_class (VOIDmode, as, MEM, SCRATCH),
+ address_mode,
+- VOIDmode, 0, 0, i, RELOAD_FOR_INPUT);
++ VOIDmode, 0, 0, i, RELOAD_OTHER);
+ rld[operand_reloadnum[i]].inc
+ = GET_MODE_SIZE (GET_MODE (recog_data.operand[i]));
+
+ /* If this operand is an output, we will have made any
+ reloads for its address as RELOAD_FOR_OUTPUT_ADDRESS, but
+ now we are treating part of the operand as an input, so
+- we must change these to RELOAD_FOR_INPUT_ADDRESS. */
++ we must change these to RELOAD_FOR_OTHER_ADDRESS. */
+
+ if (modified[i] == RELOAD_WRITE)
+ {
+@@ -4070,10 +4070,10 @@ find_reloads (rtx insn, int replace, int
+ if (rld[j].opnum == i)
+ {
+ if (rld[j].when_needed == RELOAD_FOR_OUTPUT_ADDRESS)
+- rld[j].when_needed = RELOAD_FOR_INPUT_ADDRESS;
++ rld[j].when_needed = RELOAD_FOR_OTHER_ADDRESS;
+ else if (rld[j].when_needed
+ == RELOAD_FOR_OUTADDR_ADDRESS)
+- rld[j].when_needed = RELOAD_FOR_INPADDR_ADDRESS;
++ rld[j].when_needed = RELOAD_FOR_OTHER_ADDRESS;
+ }
+ }
+ }
diff --git a/SOURCES/gcc48-rh1457969.patch b/SOURCES/gcc48-rh1457969.patch
new file mode 100644
index 0000000..84178fe
--- /dev/null
+++ b/SOURCES/gcc48-rh1457969.patch
@@ -0,0 +1,16 @@
+2014-01-15 Pat Haugen
+
+ * config/rs6000/rs6000.c (rs6000_output_function_prologue): Check if
+ current procedure should be profiled.
+
+--- gcc/config/rs6000/rs6000.c
++++ gcc/config/rs6000/rs6000.c
+@@ -23198,7 +23198,7 @@ rs6000_output_function_prologue (FILE *file,
+ /* Output -mprofile-kernel code. This needs to be done here instead of
+ in output_function_profile since it must go after the ELFv2 ABI
+ local entry point. */
+- if (TARGET_PROFILE_KERNEL)
++ if (TARGET_PROFILE_KERNEL && crtl->profile)
+ {
+ gcc_assert (DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_ELFv2);
+ gcc_assert (!TARGET_32BIT);
diff --git a/SOURCES/gcc48-rh1487434.patch b/SOURCES/gcc48-rh1487434.patch
new file mode 100644
index 0000000..5295ce6
--- /dev/null
+++ b/SOURCES/gcc48-rh1487434.patch
@@ -0,0 +1,49 @@
+2016-05-04 Alan Modra