c616bf
From 0df8313a0a5d8533f2487e21d7b42e9adee28f18 Mon Sep 17 00:00:00 2001
c616bf
From: "H.J. Lu" <hjl.tools@gmail.com>
c616bf
Date: Wed, 27 Oct 2021 06:27:15 -0700
c616bf
Subject: [PATCH 2/4] x86: Add -mindirect-branch-cs-prefix
c616bf
c616bf
Add -mindirect-branch-cs-prefix to add CS prefix to call and jmp to
c616bf
indirect thunk with branch target in r8-r15 registers so that the call
c616bf
and jmp instruction length is 6 bytes to allow them to be replaced with
c616bf
"lfence; call *%r8-r15" or "lfence; jmp *%r8-r15" at run-time.
c616bf
c616bf
gcc/
c616bf
c616bf
	PR target/102952
c616bf
	* config/i386/i386.c (ix86_output_jmp_thunk_or_indirect): Emit
c616bf
	CS prefix for -mindirect-branch-cs-prefix.
c616bf
	(ix86_output_indirect_branch_via_reg): Likewise.
c616bf
	* config/i386/i386.opt: Add -mindirect-branch-cs-prefix.
c616bf
	* doc/invoke.texi: Document -mindirect-branch-cs-prefix.
c616bf
c616bf
gcc/testsuite/
c616bf
c616bf
	PR target/102952
c616bf
	* gcc.target/i386/indirect-thunk-cs-prefix-1.c: New test.
c616bf
	* gcc.target/i386/indirect-thunk-cs-prefix-2.c: Likewise.
c616bf
c616bf
(cherry picked from commit 2196a681d7810ad8b227bf983f38ba716620545e)
c616bf
---
c616bf
 gcc/config/i386/i386.c                            | 14 ++++++++++++--
c616bf
 gcc/config/i386/i386.opt                          |  4 ++++
c616bf
 gcc/doc/invoke.texi                               | 10 +++++++++-
c616bf
 .../gcc.target/i386/indirect-thunk-cs-prefix-1.c  | 14 ++++++++++++++
c616bf
 .../gcc.target/i386/indirect-thunk-cs-prefix-2.c  | 15 +++++++++++++++
c616bf
 5 files changed, 54 insertions(+), 3 deletions(-)
c616bf
 create mode 100644 gcc/testsuite/gcc.target/i386/indirect-thunk-cs-prefix-1.c
c616bf
 create mode 100644 gcc/testsuite/gcc.target/i386/indirect-thunk-cs-prefix-2.c
c616bf
c616bf
diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
c616bf
index eb9303f8742..8442dd0daea 100644
c616bf
--- a/gcc/config/i386/i386.c
c616bf
+++ b/gcc/config/i386/i386.c
c616bf
@@ -28728,7 +28728,12 @@ ix86_output_jmp_thunk_or_indirect (const char *thunk_name,
c616bf
       if (need_prefix == indirect_thunk_prefix_bnd)
c616bf
 	fprintf (asm_out_file, "\tbnd jmp\t");
c616bf
       else
c616bf
-	fprintf (asm_out_file, "\tjmp\t");
c616bf
+	{
c616bf
+	  if (REX_INT_REGNO_P (regno)
c616bf
+	      && ix86_indirect_branch_cs_prefix)
c616bf
+	    fprintf (asm_out_file, "\tcs\n");
c616bf
+	  fprintf (asm_out_file, "\tjmp\t");
c616bf
+	}
c616bf
       assemble_name (asm_out_file, thunk_name);
c616bf
       putc ('\n', asm_out_file);
c616bf
       if ((ix86_harden_sls & harden_sls_indirect_branch))
c616bf
@@ -28787,7 +28792,12 @@ ix86_output_indirect_branch_via_reg (rtx call_op, bool sibcall_p)
c616bf
 	  if (need_prefix == indirect_thunk_prefix_bnd)
c616bf
 	    fprintf (asm_out_file, "\tbnd call\t");
c616bf
 	  else
c616bf
-	    fprintf (asm_out_file, "\tcall\t");
c616bf
+	    {
c616bf
+	      if (REX_INT_REGNO_P (regno)
c616bf
+		  && ix86_indirect_branch_cs_prefix)
c616bf
+		fprintf (asm_out_file, "\tcs\n");
c616bf
+	      fprintf (asm_out_file, "\tcall\t");
c616bf
+	    }
c616bf
 	  assemble_name (asm_out_file, thunk_name);
c616bf
 	  putc ('\n', asm_out_file);
c616bf
 	  return;
c616bf
diff --git a/gcc/config/i386/i386.opt b/gcc/config/i386/i386.opt
c616bf
index 3ae48609e25..9f67ef558dc 100644
c616bf
--- a/gcc/config/i386/i386.opt
c616bf
+++ b/gcc/config/i386/i386.opt
c616bf
@@ -1044,6 +1044,10 @@ Enum(indirect_branch) String(thunk-inline) Value(indirect_branch_thunk_inline)
c616bf
 EnumValue
c616bf
 Enum(indirect_branch) String(thunk-extern) Value(indirect_branch_thunk_extern)
c616bf
 
c616bf
+mindirect-branch-cs-prefix
c616bf
+Target Var(ix86_indirect_branch_cs_prefix) Init(0)
c616bf
+Add CS prefix to call and jmp to indirect thunk with branch target in r8-r15 registers.
c616bf
+
c616bf
 mindirect-branch-register
c616bf
 Target Report Var(ix86_indirect_branch_register) Init(0)
c616bf
 Force indirect call and jump via register.
c616bf
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
c616bf
index 1e20efd6969..605cd4b93f1 100644
c616bf
--- a/gcc/doc/invoke.texi
c616bf
+++ b/gcc/doc/invoke.texi
c616bf
@@ -1284,7 +1284,8 @@ See RS/6000 and PowerPC Options.
c616bf
 -mstack-protector-guard-symbol=@var{symbol} -mmitigate-rop @gol
c616bf
 -mgeneral-regs-only -mcall-ms2sysv-xlogues @gol
c616bf
 -mindirect-branch=@var{choice} -mfunction-return=@var{choice} @gol
c616bf
--mindirect-branch-register -mharden-sls=@var{choice}}
c616bf
+-mindirect-branch-register -mharden-sls=@var{choice} @gol
c616bf
+-mindirect-branch-cs-prefix}
c616bf
 
c616bf
 @emph{x86 Windows Options}
c616bf
 @gccoptlist{-mconsole  -mcygwin  -mno-cygwin  -mdll @gol
c616bf
@@ -28044,6 +28045,13 @@ hardening.  @samp{return} enables SLS hardening for function return.
c616bf
 @samp{indirect-branch} enables SLS hardening for indirect branch.
c616bf
 @samp{all} enables all SLS hardening.
c616bf
 
c616bf
+@item -mindirect-branch-cs-prefix
c616bf
+@opindex mindirect-branch-cs-prefix
c616bf
+Add CS prefix to call and jmp to indirect thunk with branch target in
c616bf
+r8-r15 registers so that the call and jmp instruction length is 6 bytes
c616bf
+to allow them to be replaced with @samp{lfence; call *%r8-r15} or
c616bf
+@samp{lfence; jmp *%r8-r15} at run-time.
c616bf
+
c616bf
 @end table
c616bf
 
c616bf
 These @samp{-m} switches are supported in addition to the above
c616bf
diff --git a/gcc/testsuite/gcc.target/i386/indirect-thunk-cs-prefix-1.c b/gcc/testsuite/gcc.target/i386/indirect-thunk-cs-prefix-1.c
c616bf
new file mode 100644
c616bf
index 00000000000..db2f3416823
c616bf
--- /dev/null
c616bf
+++ b/gcc/testsuite/gcc.target/i386/indirect-thunk-cs-prefix-1.c
c616bf
@@ -0,0 +1,14 @@
c616bf
+/* { dg-do compile { target { ! ia32 } } } */
c616bf
+/* { dg-options "-O2 -ffixed-rax -ffixed-rbx -ffixed-rcx -ffixed-rdx -ffixed-rdi -ffixed-rsi -mindirect-branch-cs-prefix -mindirect-branch=thunk-extern" } */
c616bf
+/* { dg-additional-options "-fno-pic" { target { ! *-*-darwin* } } } */
c616bf
+
c616bf
+extern void (*fptr) (void);
c616bf
+
c616bf
+void
c616bf
+foo (void)
c616bf
+{
c616bf
+  fptr ();
c616bf
+}
c616bf
+
c616bf
+/* { dg-final { scan-assembler-times "jmp\[ \t\]+_?__x86_indirect_thunk_r\[0-9\]+" 1 } } */
c616bf
+/* { dg-final { scan-assembler-times "\tcs" 1 } } */
c616bf
diff --git a/gcc/testsuite/gcc.target/i386/indirect-thunk-cs-prefix-2.c b/gcc/testsuite/gcc.target/i386/indirect-thunk-cs-prefix-2.c
c616bf
new file mode 100644
c616bf
index 00000000000..adfc39a49d4
c616bf
--- /dev/null
c616bf
+++ b/gcc/testsuite/gcc.target/i386/indirect-thunk-cs-prefix-2.c
c616bf
@@ -0,0 +1,15 @@
c616bf
+/* { dg-do compile { target { ! ia32 } } } */
c616bf
+/* { dg-options "-O2 -ffixed-rax -ffixed-rbx -ffixed-rcx -ffixed-rdx -ffixed-rdi -ffixed-rsi -mindirect-branch-cs-prefix -mindirect-branch=thunk-extern" } */
c616bf
+/* { dg-additional-options "-fno-pic" { target { ! *-*-darwin* } } } */
c616bf
+
c616bf
+extern void (*bar) (void);
c616bf
+
c616bf
+int
c616bf
+foo (void)
c616bf
+{
c616bf
+  bar ();
c616bf
+  return 0;
c616bf
+}
c616bf
+
c616bf
+/* { dg-final { scan-assembler-times "call\[ \t\]+_?__x86_indirect_thunk_r\[0-9\]+" 1 } } */
c616bf
+/* { dg-final { scan-assembler-times "\tcs" 1 } } */
c616bf
-- 
c616bf
2.36.1
c616bf