|
 |
fab8f6 |
commit 6effbc703b711779a196e5dbaf6335f39fab71c2
|
|
|
fab8f6 |
Author: hjl <hjl@138bc75d-0d04-0410-961f-82ee72b054a4>
|
|
|
fab8f6 |
Date: Tue Jan 16 11:19:51 2018 +0000
|
|
|
fab8f6 |
|
|
|
fab8f6 |
HJ patch #4
|
|
|
fab8f6 |
|
|
|
fab8f6 |
diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
|
|
|
fab8f6 |
index 9dffd02f..e73389b 100644
|
|
|
fab8f6 |
--- a/gcc/config/i386/i386.c
|
|
|
fab8f6 |
+++ b/gcc/config/i386/i386.c
|
|
|
fab8f6 |
@@ -14497,6 +14497,7 @@ put_condition_code (enum rtx_code code, enum machine_mode mode, bool reverse,
|
|
|
fab8f6 |
If CODE is 'h', pretend the reg is the 'high' byte register.
|
|
|
fab8f6 |
If CODE is 'y', print "st(0)" instead of "st", if the reg is stack op.
|
|
|
fab8f6 |
If CODE is 'd', duplicate the operand for AVX instruction.
|
|
|
fab8f6 |
+ If CODE is 'V', print naked full integer register name without %.
|
|
|
fab8f6 |
*/
|
|
|
fab8f6 |
|
|
|
fab8f6 |
void
|
|
|
fab8f6 |
@@ -14506,7 +14507,7 @@ print_reg (rtx x, int code, FILE *file)
|
|
|
fab8f6 |
unsigned int regno;
|
|
|
fab8f6 |
bool duplicated = code == 'd' && TARGET_AVX;
|
|
|
fab8f6 |
|
|
|
fab8f6 |
- if (ASSEMBLER_DIALECT == ASM_ATT)
|
|
|
fab8f6 |
+ if (ASSEMBLER_DIALECT == ASM_ATT && code != 'V')
|
|
|
fab8f6 |
putc ('%', file);
|
|
|
fab8f6 |
|
|
|
fab8f6 |
if (x == pc_rtx)
|
|
|
fab8f6 |
@@ -14542,6 +14543,14 @@ print_reg (rtx x, int code, FILE *file)
|
|
|
fab8f6 |
else
|
|
|
fab8f6 |
code = GET_MODE_SIZE (GET_MODE (x));
|
|
|
fab8f6 |
|
|
|
fab8f6 |
+ if (code == 'V')
|
|
|
fab8f6 |
+ {
|
|
|
fab8f6 |
+ if (GENERAL_REGNO_P (regno))
|
|
|
fab8f6 |
+ code = GET_MODE_SIZE (word_mode);
|
|
|
fab8f6 |
+ else
|
|
|
fab8f6 |
+ error ("'V' modifier on non-integer register");
|
|
|
fab8f6 |
+ }
|
|
|
fab8f6 |
+
|
|
|
fab8f6 |
/* Irritatingly, AMD extended registers use different naming convention
|
|
|
fab8f6 |
from the normal registers: "r%d[bwd]" */
|
|
|
fab8f6 |
if (REX_INT_REGNO_P (regno))
|
|
|
fab8f6 |
@@ -14695,6 +14704,7 @@ get_some_local_dynamic_name (void)
|
|
|
fab8f6 |
& -- print some in-use local-dynamic symbol name.
|
|
|
fab8f6 |
H -- print a memory address offset by 8; used for sse high-parts
|
|
|
fab8f6 |
Y -- print condition for XOP pcom* instruction.
|
|
|
fab8f6 |
+ V -- print naked full integer register name without %.
|
|
|
fab8f6 |
+ -- print a branch hint as 'cs' or 'ds' prefix
|
|
|
fab8f6 |
; -- print a semicolon (after prefixes due to bug in older gas).
|
|
|
fab8f6 |
~ -- print "i" if TARGET_AVX2, "f" otherwise.
|
|
|
fab8f6 |
@@ -14919,6 +14929,7 @@ ix86_print_operand (FILE *file, rtx x, int code)
|
|
|
fab8f6 |
case 'X':
|
|
|
fab8f6 |
case 'P':
|
|
|
fab8f6 |
case 'p':
|
|
|
fab8f6 |
+ case 'V':
|
|
|
fab8f6 |
break;
|
|
|
fab8f6 |
|
|
|
fab8f6 |
case 's':
|
|
|
fab8f6 |
diff --git a/gcc/testsuite/gcc.target/i386/indirect-thunk-register-4.c b/gcc/testsuite/gcc.target/i386/indirect-thunk-register-4.c
|
|
|
fab8f6 |
new file mode 100644
|
|
|
fab8f6 |
index 0000000..f0cd9b7
|
|
|
fab8f6 |
--- /dev/null
|
|
|
fab8f6 |
+++ b/gcc/testsuite/gcc.target/i386/indirect-thunk-register-4.c
|
|
|
fab8f6 |
@@ -0,0 +1,13 @@
|
|
|
fab8f6 |
+/* { dg-do compile } */
|
|
|
fab8f6 |
+/* { dg-options "-O2 -mindirect-branch=keep -fno-pic" } */
|
|
|
fab8f6 |
+
|
|
|
fab8f6 |
+extern void (*func_p) (void);
|
|
|
fab8f6 |
+
|
|
|
fab8f6 |
+void
|
|
|
fab8f6 |
+foo (void)
|
|
|
fab8f6 |
+{
|
|
|
fab8f6 |
+ asm("call __x86_indirect_thunk_%V0" : : "a" (func_p));
|
|
|
fab8f6 |
+}
|
|
|
fab8f6 |
+
|
|
|
fab8f6 |
+/* { dg-final { scan-assembler "call\[ \t\]*__x86_indirect_thunk_eax" { target ia32 } } } */
|
|
|
fab8f6 |
+/* { dg-final { scan-assembler "call\[ \t\]*__x86_indirect_thunk_rax" { target { ! ia32 } } } } */
|