Blame SOURCES/gcc48-rh1535655-2.patch

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commit 60281b40f9b28b1b1b912f3157547d6b4f50669c
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Author: root <root@lenovo-x3950-01.khw.lab.eng.bos.redhat.com>
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Date:   Thu Jan 18 17:50:46 2018 -0500
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    HJ patch #1
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diff --git a/gcc/config/i386/i386-opts.h b/gcc/config/i386/i386-opts.h
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index 11c0845..139d23c 100644
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--- a/gcc/config/i386/i386-opts.h
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+++ b/gcc/config/i386/i386-opts.h
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@@ -85,4 +85,16 @@ enum ix86_veclibabi {
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   ix86_veclibabi_type_acml
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 };
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+/* This is used to mitigate variant #2 of the speculative execution
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+   vulnerabilities on x86 processors identified by CVE-2017-5715, aka
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+   Spectre.  They convert indirect branches and function returns to
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+   call and return thunks to avoid speculative execution via indirect
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+   call, jmp and ret.  */
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+enum indirect_branch {
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+  indirect_branch_unset = 0,
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+  indirect_branch_keep,
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+  indirect_branch_thunk,
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+  indirect_branch_thunk_inline,
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+  indirect_branch_thunk_extern
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+};
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 #endif
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diff --git a/gcc/config/i386/i386-protos.h b/gcc/config/i386/i386-protos.h
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index 96e7c5c..ecdf108 100644
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--- a/gcc/config/i386/i386-protos.h
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+++ b/gcc/config/i386/i386-protos.h
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@@ -306,6 +306,7 @@ extern enum attr_cpu ix86_schedule;
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 #endif
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 extern const char * ix86_output_call_insn (rtx insn, rtx call_op);
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+extern const char * ix86_output_indirect_jmp (rtx call_op, bool ret_p);
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 #ifdef RTX_CODE
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 /* Target data for multipass lookahead scheduling.
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diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
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index b91a456..ebc9a90 100644
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--- a/gcc/config/i386/i386.c
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+++ b/gcc/config/i386/i386.c
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@@ -2572,12 +2572,23 @@ struct rtl_opt_pass pass_insert_vzeroupper =
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  }
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 };
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-/* Return true if a red-zone is in use.  */
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+/* Return true if a red-zone is in use.  We can't use red-zone when
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+   there are local indirect jumps, like "indirect_jump" or "tablejump",
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+   which jumps to another place in the function, since "call" in the
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+   indirect thunk pushes the return address onto stack, destroying
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+   red-zone.
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+
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+   TODO: If we can reserve the first 2 WORDs, for PUSH and, another
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+   for CALL, in red-zone, we can allow local indirect jumps with
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+   indirect thunk.  */
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 static inline bool
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 ix86_using_red_zone (void)
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 {
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-  return TARGET_RED_ZONE && !TARGET_64BIT_MS_ABI;
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+  return (TARGET_RED_ZONE
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+	  && !TARGET_64BIT_MS_ABI
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+	  && (!cfun->machine->has_local_indirect_jump
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+	      || cfun->machine->indirect_branch_type == indirect_branch_keep));
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 }
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 /* Return a string that documents the current -m options.  The caller is
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@@ -4595,6 +4606,37 @@ ix86_can_inline_p (tree caller, tree callee)
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 }
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+/* Set the indirect_branch_type field from the function FNDECL.  */
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+
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+static void
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+ix86_set_indirect_branch_type (tree fndecl)
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+{
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+  if (cfun->machine->indirect_branch_type == indirect_branch_unset)
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+    {
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+      tree attr = lookup_attribute ("indirect_branch",
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+				    DECL_ATTRIBUTES (fndecl));
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+      if (attr != NULL)
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+	{
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+	  tree args = TREE_VALUE (attr);
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+	  if (args == NULL)
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+	    gcc_unreachable ();
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+	  tree cst = TREE_VALUE (args);
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+	  if (strcmp (TREE_STRING_POINTER (cst), "keep") == 0)
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+	    cfun->machine->indirect_branch_type = indirect_branch_keep;
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+	  else if (strcmp (TREE_STRING_POINTER (cst), "thunk") == 0)
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+	    cfun->machine->indirect_branch_type = indirect_branch_thunk;
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+	  else if (strcmp (TREE_STRING_POINTER (cst), "thunk-inline") == 0)
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+	    cfun->machine->indirect_branch_type = indirect_branch_thunk_inline;
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+	  else if (strcmp (TREE_STRING_POINTER (cst), "thunk-extern") == 0)
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+	    cfun->machine->indirect_branch_type = indirect_branch_thunk_extern;
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+	  else
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+	    gcc_unreachable ();
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+	}
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+      else
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+	cfun->machine->indirect_branch_type = ix86_indirect_branch;
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+    }
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+}
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+
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 /* Remember the last target of ix86_set_current_function.  */
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 static GTY(()) tree ix86_previous_fndecl;
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@@ -4609,6 +4651,9 @@ ix86_set_current_function (tree fndecl)
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      slow things down too much or call target_reinit when it isn't safe.  */
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   if (fndecl && fndecl != ix86_previous_fndecl)
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     {
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+      if (cfun && cfun->machine && fndecl)
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+	ix86_set_indirect_branch_type (fndecl);
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+
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       tree old_tree = (ix86_previous_fndecl
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 		       ? DECL_FUNCTION_SPECIFIC_TARGET (ix86_previous_fndecl)
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 		       : NULL_TREE);
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@@ -4637,6 +4682,8 @@ ix86_set_current_function (tree fndecl)
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 	  target_reinit ();
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 	}
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     }
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+  if (cfun && cfun->machine && fndecl)
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+    ix86_set_indirect_branch_type (fndecl);
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 }
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@@ -8668,6 +8715,196 @@ ix86_setup_frame_addresses (void)
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 # endif
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 #endif
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+/* Label count for call and return thunks.  It is used to make unique
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+   labels in call and return thunks.  */
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+static int indirectlabelno;
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+
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+/* True if call and return thunk functions are needed.  */
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+static bool indirect_thunk_needed = false;
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+
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+/* Bit masks of integer registers, which contain branch target, used
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+   by call and return thunks functions.  */
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+static int indirect_thunks_used;
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+
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+#ifndef INDIRECT_LABEL
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+# define INDIRECT_LABEL "LIND"
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+#endif
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+
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+/* Fills in the label name that should be used for the indirect thunk.  */
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+
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+static void
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+indirect_thunk_name (char name[32], int regno)
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+{
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+  if (USE_HIDDEN_LINKONCE)
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+    {
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+      if (regno >= 0)
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+	{
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+	  const char *reg_prefix;
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+	  if (LEGACY_INT_REGNO_P (regno))
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+	    reg_prefix = TARGET_64BIT ? "r" : "e";
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+	  else
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+	    reg_prefix = "";
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+	  sprintf (name, "__x86_indirect_thunk_%s%s",
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+		   reg_prefix, reg_names[regno]);
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+	}
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+      else
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+	sprintf (name, "__x86_indirect_thunk");
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+    }
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+  else
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+    {
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+      if (regno >= 0)
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+	ASM_GENERATE_INTERNAL_LABEL (name, "LITR", regno);
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+      else
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+	ASM_GENERATE_INTERNAL_LABEL (name, "LIT", 0);
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+    }
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+}
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+
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+/* Output a call and return thunk for indirect branch.  If REGNO != -1,
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+   the function address is in REGNO and the call and return thunk looks like:
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+
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+	call	L2
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+   L1:
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+	pause
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+	jmp	L1
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+   L2:
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+	mov	%REG, (%sp)
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+	ret
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+
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+   Otherwise, the function address is on the top of stack and the
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+   call and return thunk looks like:
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+
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+	call L2
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+  L1:
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+	pause
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+	jmp L1
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+  L2:
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+	lea WORD_SIZE(%sp), %sp
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+	ret
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+ */
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+
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+static void
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+output_indirect_thunk (int regno)
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+{
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+  char indirectlabel1[32];
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+  char indirectlabel2[32];
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+
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+  ASM_GENERATE_INTERNAL_LABEL (indirectlabel1, INDIRECT_LABEL,
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+			       indirectlabelno++);
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+  ASM_GENERATE_INTERNAL_LABEL (indirectlabel2, INDIRECT_LABEL,
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+			       indirectlabelno++);
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+
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+  /* Call */
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+  fputs ("\tcall\t", asm_out_file);
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+  assemble_name_raw (asm_out_file, indirectlabel2);
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+  fputc ('\n', asm_out_file);
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+
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+  ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, indirectlabel1);
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+
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+  /* Pause + lfence.  */
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+  fprintf (asm_out_file, "\tpause\n\tlfence\n");
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+
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+  /* Jump.  */
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+  fputs ("\tjmp\t", asm_out_file);
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+  assemble_name_raw (asm_out_file, indirectlabel1);
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+  fputc ('\n', asm_out_file);
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+
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+  ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, indirectlabel2);
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+
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+  if (regno >= 0)
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+    {
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+      /* MOV.  */
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+      rtx xops[2];
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+      xops[0] = gen_rtx_MEM (word_mode, stack_pointer_rtx);
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+      xops[1] = gen_rtx_REG (word_mode, regno);
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+      output_asm_insn ("mov\t{%1, %0|%0, %1}", xops);
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+    }
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+  else
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+    {
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+      /* LEA.  */
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+      rtx xops[2];
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+      xops[0] = stack_pointer_rtx;
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+      xops[1] = plus_constant (Pmode, stack_pointer_rtx, UNITS_PER_WORD);
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+      output_asm_insn ("lea\t{%E1, %0|%0, %E1}", xops);
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+    }
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+
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+  fputs ("\tret\n", asm_out_file);
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+}
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+
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+/* Output a funtion with a call and return thunk for indirect branch.
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+   If REGNO != -1, the function address is in REGNO.  Otherwise, the
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+   function address is on the top of stack.  */
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+
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+static void
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+output_indirect_thunk_function (int regno)
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+{
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+  char name[32];
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+  tree decl;
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+
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+  /* Create __x86_indirect_thunk.  */
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+  indirect_thunk_name (name, regno);
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+  decl = build_decl (BUILTINS_LOCATION, FUNCTION_DECL,
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+		     get_identifier (name),
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+		     build_function_type_list (void_type_node, NULL_TREE));
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+  DECL_RESULT (decl) = build_decl (BUILTINS_LOCATION, RESULT_DECL,
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+				   NULL_TREE, void_type_node);
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+  TREE_PUBLIC (decl) = 1;
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+  TREE_STATIC (decl) = 1;
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+  DECL_IGNORED_P (decl) = 1;
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+
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+#if TARGET_MACHO
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+  if (TARGET_MACHO)
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+    {
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+      switch_to_section (darwin_sections[picbase_thunk_section]);
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+      fputs ("\t.weak_definition\t", asm_out_file);
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+      assemble_name (asm_out_file, name);
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+      fputs ("\n\t.private_extern\t", asm_out_file);
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+      assemble_name (asm_out_file, name);
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+      putc ('\n', asm_out_file);
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+      ASM_OUTPUT_LABEL (asm_out_file, name);
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+      DECL_WEAK (decl) = 1;
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+    }
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+  else
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+#endif
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+    if (USE_HIDDEN_LINKONCE)
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+      {
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+	DECL_COMDAT (decl) = 1;
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+	make_decl_one_only (decl, DECL_ASSEMBLER_NAME (decl));
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+
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+	targetm.asm_out.unique_section (decl, 0);
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+	switch_to_section (get_named_section (decl, NULL, 0));
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+
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+	targetm.asm_out.globalize_label (asm_out_file, name);
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+	fputs ("\t.hidden\t", asm_out_file);
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+	assemble_name (asm_out_file, name);
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+	putc ('\n', asm_out_file);
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+	ASM_DECLARE_FUNCTION_NAME (asm_out_file, name, decl);
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+      }
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+    else
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+      {
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+	switch_to_section (text_section);
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+	ASM_OUTPUT_LABEL (asm_out_file, name);
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+      }
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+
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+  DECL_INITIAL (decl) = make_node (BLOCK);
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+  current_function_decl = decl;
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+  allocate_struct_function (decl, false);
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+  init_function_start (decl);
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+  /* We're about to hide the function body from callees of final_* by
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+     emitting it directly; tell them we're a thunk, if they care.  */
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+  cfun->is_thunk = true;
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+  first_function_block_is_cold = false;
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+  /* Make sure unwind info is emitted for the thunk if needed.  */
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+  final_start_function (emit_barrier (), asm_out_file, 1);
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+
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+  output_indirect_thunk (regno);
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+
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+  final_end_function ();
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+  init_insn_lengths ();
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+  free_after_compilation (cfun);
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+  set_cfun (NULL);
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+  current_function_decl = NULL;
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+}
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+
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 static int pic_labels_used;
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 /* Fills in the label name that should be used for a pc thunk for
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@@ -8694,11 +8931,24 @@ ix86_code_end (void)
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   rtx xops[2];
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   int regno;
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+  if (indirect_thunk_needed)
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+    output_indirect_thunk_function (-1);
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+
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+  for (regno = FIRST_REX_INT_REG; regno <= LAST_REX_INT_REG; regno++)
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+    {
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+      int i = regno - FIRST_REX_INT_REG + LAST_INT_REG + 1;
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+      if ((indirect_thunks_used & (1 << i)))
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+	output_indirect_thunk_function (regno);
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+    }
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+
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   for (regno = AX_REG; regno <= SP_REG; regno++)
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     {
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       char name[32];
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       tree decl;
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+      if ((indirect_thunks_used & (1 << regno)))
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+	output_indirect_thunk_function (regno);
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+
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       if (!(pic_labels_used & (1 << regno)))
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 	continue;
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@@ -24074,12 +24324,250 @@ ix86_expand_call (rtx retval, rtx fnaddr, rtx callarg1,
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   return call;
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 }
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+/* Output indirect branch via a call and return thunk.  CALL_OP is a
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+   register which contains the branch target.  XASM is the assembly
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+   template for CALL_OP.  Branch is a tail call if SIBCALL_P is true.
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+   A normal call is converted to:
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+
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+	call __x86_indirect_thunk_reg
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+
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+   and a tail call is converted to:
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+
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+	jmp __x86_indirect_thunk_reg
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+ */
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+
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+static void
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+ix86_output_indirect_branch_via_reg (rtx call_op, bool sibcall_p)
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+{
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+  char thunk_name_buf[32];
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+  char *thunk_name;
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+  int regno = REGNO (call_op);
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+
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+  if (cfun->machine->indirect_branch_type
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+      != indirect_branch_thunk_inline)
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+    {
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+      if (cfun->machine->indirect_branch_type == indirect_branch_thunk)
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+	{
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+	  int i = regno;
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+	  if (i >= FIRST_REX_INT_REG)
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+	    i -= (FIRST_REX_INT_REG - LAST_INT_REG - 1);
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+	  indirect_thunks_used |= 1 << i;
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+	}
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+      indirect_thunk_name (thunk_name_buf, regno);
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+      thunk_name = thunk_name_buf;
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+    }
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+  else
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+    thunk_name = NULL;
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+
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+  if (sibcall_p)
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+    {
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+      if (thunk_name != NULL)
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+	fprintf (asm_out_file, "\tjmp\t%s\n", thunk_name);
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+      else
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+	output_indirect_thunk (regno);
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+    }
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+  else
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+    {
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+      if (thunk_name != NULL)
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+	{
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+	  fprintf (asm_out_file, "\tcall\t%s\n", thunk_name);
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+	  return;
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+	}
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+
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+      char indirectlabel1[32];
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+      char indirectlabel2[32];
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+
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+      ASM_GENERATE_INTERNAL_LABEL (indirectlabel1,
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+				   INDIRECT_LABEL,
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+				   indirectlabelno++);
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+      ASM_GENERATE_INTERNAL_LABEL (indirectlabel2,
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+				   INDIRECT_LABEL,
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+				   indirectlabelno++);
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+
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+      /* Jump.  */
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+      fputs ("\tjmp\t", asm_out_file);
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+      assemble_name_raw (asm_out_file, indirectlabel2);
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+      fputc ('\n', asm_out_file);
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+
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+      ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, indirectlabel1);
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+
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+      if (thunk_name != NULL)
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+	fprintf (asm_out_file, "\tjmp\t%s\n", thunk_name);
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+      else
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+	output_indirect_thunk (regno);
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+
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+      ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, indirectlabel2);
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+
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+      /* Call.  */
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+      fputs ("\tcall\t", asm_out_file);
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+      assemble_name_raw (asm_out_file, indirectlabel1);
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+      fputc ('\n', asm_out_file);
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+    }
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+}
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+
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+/* Output indirect branch via a call and return thunk.  CALL_OP is
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+   the branch target.  XASM is the assembly template for CALL_OP.
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+   Branch is a tail call if SIBCALL_P is true.  A normal call is
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+   converted to:
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+
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+	jmp L2
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+   L1:
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+	push CALL_OP
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+	jmp __x86_indirect_thunk
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+   L2:
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+	call L1
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+
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+   and a tail call is converted to:
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+
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+	push CALL_OP
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+	jmp __x86_indirect_thunk
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+ */
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+
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+static void
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+ix86_output_indirect_branch_via_push (rtx call_op, const char *xasm,
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+				      bool sibcall_p)
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+{
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+  char thunk_name_buf[32];
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+  char *thunk_name;
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+  char push_buf[64];
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+  int regno = -1;
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+
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+  if (cfun->machine->indirect_branch_type
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+      != indirect_branch_thunk_inline)
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+    {
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+      if (cfun->machine->indirect_branch_type == indirect_branch_thunk)
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+	indirect_thunk_needed = true;
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+      indirect_thunk_name (thunk_name_buf, regno);
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+      thunk_name = thunk_name_buf;
343cc1
+    }
343cc1
+  else
343cc1
+    thunk_name = NULL;
343cc1
+
343cc1
+  snprintf (push_buf, sizeof (push_buf), "push{%c}\t%s",
343cc1
+	    TARGET_64BIT ? 'q' : 'l', xasm);
343cc1
+
343cc1
+  if (sibcall_p)
343cc1
+    {
343cc1
+      output_asm_insn (push_buf, &call_op);
343cc1
+      if (thunk_name != NULL)
343cc1
+	fprintf (asm_out_file, "\tjmp\t%s\n", thunk_name);
343cc1
+      else
343cc1
+	output_indirect_thunk (regno);
343cc1
+    }
343cc1
+  else
343cc1
+    {
343cc1
+      char indirectlabel1[32];
343cc1
+      char indirectlabel2[32];
343cc1
+
343cc1
+      ASM_GENERATE_INTERNAL_LABEL (indirectlabel1,
343cc1
+				   INDIRECT_LABEL,
343cc1
+				   indirectlabelno++);
343cc1
+      ASM_GENERATE_INTERNAL_LABEL (indirectlabel2,
343cc1
+				   INDIRECT_LABEL,
343cc1
+				   indirectlabelno++);
343cc1
+
343cc1
+      /* Jump.  */
343cc1
+      fputs ("\tjmp\t", asm_out_file);
343cc1
+      assemble_name_raw (asm_out_file, indirectlabel2);
343cc1
+      fputc ('\n', asm_out_file);
343cc1
+
343cc1
+      ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, indirectlabel1);
343cc1
+
343cc1
+      /* An external function may be called via GOT, instead of PLT.  */
343cc1
+      if (MEM_P (call_op))
343cc1
+	{
343cc1
+	  struct ix86_address parts;
343cc1
+	  rtx addr = XEXP (call_op, 0);
343cc1
+	  if (ix86_decompose_address (addr, &parts)
343cc1
+	      && parts.base == stack_pointer_rtx)
343cc1
+	    {
343cc1
+	      /* Since call will adjust stack by -UNITS_PER_WORD,
343cc1
+		 we must convert "disp(stack, index, scale)" to
343cc1
+		 "disp+UNITS_PER_WORD(stack, index, scale)".  */
343cc1
+	      if (parts.index)
343cc1
+		{
343cc1
+		  addr = gen_rtx_MULT (Pmode, parts.index,
343cc1
+				       GEN_INT (parts.scale));
343cc1
+		  addr = gen_rtx_PLUS (Pmode, stack_pointer_rtx,
343cc1
+				       addr);
343cc1
+		}
343cc1
+	      else
343cc1
+		addr = stack_pointer_rtx;
343cc1
+
343cc1
+	      rtx disp;
343cc1
+	      if (parts.disp != NULL_RTX)
343cc1
+		disp = plus_constant (Pmode, parts.disp,
343cc1
+				      UNITS_PER_WORD);
343cc1
+	      else
343cc1
+		disp = GEN_INT (UNITS_PER_WORD);
343cc1
+
343cc1
+	      addr = gen_rtx_PLUS (Pmode, addr, disp);
343cc1
+	      call_op = gen_rtx_MEM (GET_MODE (call_op), addr);
343cc1
+	    }
343cc1
+	}
343cc1
+
343cc1
+      output_asm_insn (push_buf, &call_op);
343cc1
+
343cc1
+      if (thunk_name != NULL)
343cc1
+	fprintf (asm_out_file, "\tjmp\t%s\n", thunk_name);
343cc1
+      else
343cc1
+	output_indirect_thunk (regno);
343cc1
+
343cc1
+      ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, indirectlabel2);
343cc1
+
343cc1
+      /* Call.  */
343cc1
+      fputs ("\tcall\t", asm_out_file);
343cc1
+      assemble_name_raw (asm_out_file, indirectlabel1);
343cc1
+      fputc ('\n', asm_out_file);
343cc1
+    }
343cc1
+}
343cc1
+
343cc1
+/* Output indirect branch via a call and return thunk.  CALL_OP is
343cc1
+   the branch target.  XASM is the assembly template for CALL_OP.
343cc1
+   Branch is a tail call if SIBCALL_P is true.   */
343cc1
+
343cc1
+static void
343cc1
+ix86_output_indirect_branch (rtx call_op, const char *xasm,
343cc1
+			     bool sibcall_p)
343cc1
+{
343cc1
+  if (REG_P (call_op))
343cc1
+    ix86_output_indirect_branch_via_reg (call_op, sibcall_p);
343cc1
+  else
343cc1
+    ix86_output_indirect_branch_via_push (call_op, xasm, sibcall_p);
343cc1
+}
343cc1
+/* Output indirect jump.  CALL_OP is the jump target.  Jump is a
343cc1
+   function return if RET_P is true.  */
343cc1
+
343cc1
+const char *
343cc1
+ix86_output_indirect_jmp (rtx call_op, bool ret_p)
343cc1
+{
343cc1
+  if (cfun->machine->indirect_branch_type != indirect_branch_keep)
343cc1
+    {
343cc1
+      struct ix86_frame frame;
343cc1
+      ix86_compute_frame_layout (&frame);
343cc1
+
343cc1
+      /* We can't have red-zone if this isn't a function return since
343cc1
+	 "call" in the indirect thunk pushes the return address onto
343cc1
+	 stack, destroying red-zone.  */
343cc1
+      if (!ret_p && frame.red_zone_size != 0)
343cc1
+	gcc_unreachable ();
343cc1
+
343cc1
+      ix86_output_indirect_branch (call_op, "%0", true);
343cc1
+      return "";
343cc1
+    }
343cc1
+  else
343cc1
+    return "jmp\t%A0";
343cc1
+}
343cc1
+
343cc1
 /* Output the assembly for a call instruction.  */
343cc1
 
343cc1
 const char *
343cc1
 ix86_output_call_insn (rtx insn, rtx call_op)
343cc1
 {
343cc1
   bool direct_p = constant_call_address_operand (call_op, VOIDmode);
343cc1
+  bool output_indirect_p
343cc1
+    = (!TARGET_SEH
343cc1
+       && cfun->machine->indirect_branch_type != indirect_branch_keep);
343cc1
   bool seh_nop_p = false;
343cc1
   const char *xasm;
343cc1
 
343cc1
@@ -24092,9 +24580,17 @@ ix86_output_call_insn (rtx insn, rtx call_op)
343cc1
       else if (TARGET_SEH)
343cc1
 	xasm = "rex.W jmp %A0";
343cc1
       else
343cc1
-	xasm = "jmp\t%A0";
343cc1
+	{
343cc1
+	  if (output_indirect_p)
343cc1
+	    xasm = "%0";
343cc1
+	  else
343cc1
+	    xasm = "jmp\t%A0";
343cc1
+	}
343cc1
 
343cc1
-      output_asm_insn (xasm, &call_op);
343cc1
+      if (output_indirect_p && !direct_p)
343cc1
+	ix86_output_indirect_branch (call_op, xasm, true);
343cc1
+      else
343cc1
+	output_asm_insn (xasm, &call_op);
343cc1
       return "";
343cc1
     }
343cc1
 
343cc1
@@ -24131,9 +24627,17 @@ ix86_output_call_insn (rtx insn, rtx call_op)
343cc1
   if (direct_p)
343cc1
     xasm = "call\t%P0";
343cc1
   else
343cc1
-    xasm = "call\t%A0";
343cc1
+    {
343cc1
+      if (output_indirect_p)
343cc1
+	xasm = "%0";
343cc1
+      else
343cc1
+	xasm = "call\t%A0";
343cc1
+    }
343cc1
 
343cc1
-  output_asm_insn (xasm, &call_op);
343cc1
+  if (output_indirect_p && !direct_p)
343cc1
+    ix86_output_indirect_branch (call_op, xasm, false);
343cc1
+  else
343cc1
+    output_asm_insn (xasm, &call_op);
343cc1
 
343cc1
   if (seh_nop_p)
343cc1
     return "nop";
343cc1
@@ -35436,7 +35940,7 @@ ix86_handle_struct_attribute (tree *node, tree name,
343cc1
 
343cc1
 static tree
343cc1
 ix86_handle_fndecl_attribute (tree *node, tree name,
343cc1
-                              tree args ATTRIBUTE_UNUSED,
343cc1
+                              tree args,
343cc1
                               int flags ATTRIBUTE_UNUSED, bool *no_add_attrs)
343cc1
 {
343cc1
   if (TREE_CODE (*node) != FUNCTION_DECL)
343cc1
@@ -35445,6 +35949,29 @@ ix86_handle_fndecl_attribute (tree *node, tree name,
343cc1
                name);
343cc1
       *no_add_attrs = true;
343cc1
     }
343cc1
+
343cc1
+  if (is_attribute_p ("indirect_branch", name))
343cc1
+    {
343cc1
+      tree cst = TREE_VALUE (args);
343cc1
+      if (TREE_CODE (cst) != STRING_CST)
343cc1
+	{
343cc1
+	  warning (OPT_Wattributes,
343cc1
+		   "%qE attribute requires a string constant argument",
343cc1
+		   name);
343cc1
+	  *no_add_attrs = true;
343cc1
+	}
343cc1
+      else if (strcmp (TREE_STRING_POINTER (cst), "keep") != 0
343cc1
+	       && strcmp (TREE_STRING_POINTER (cst), "thunk") != 0
343cc1
+	       && strcmp (TREE_STRING_POINTER (cst), "thunk-inline") != 0
343cc1
+	       && strcmp (TREE_STRING_POINTER (cst), "thunk-extern") != 0)
343cc1
+	{
343cc1
+	  warning (OPT_Wattributes,
343cc1
+		   "argument to %qE attribute is not "
343cc1
+		   "(keep|thunk|thunk-inline|thunk-extern)", name);
343cc1
+	  *no_add_attrs = true;
343cc1
+	}
343cc1
+    }
343cc1
+
343cc1
   return NULL_TREE;
343cc1
 }
343cc1
 
343cc1
@@ -38963,6 +39490,8 @@ static const struct attribute_spec ix86_attribute_table[] =
343cc1
     false },
343cc1
   { "callee_pop_aggregate_return", 1, 1, false, true, true,
343cc1
     ix86_handle_callee_pop_aggregate_return, true },
343cc1
+  { "indirect_branch", 1, 1, true, false, false,
343cc1
+    ix86_handle_fndecl_attribute, false },
343cc1
   /* End element.  */
343cc1
   { NULL,        0, 0, false, false, false, NULL, false }
343cc1
 };
343cc1
diff --git a/gcc/config/i386/i386.h b/gcc/config/i386/i386.h
343cc1
index 87fd381..8183cee7 100644
343cc1
--- a/gcc/config/i386/i386.h
343cc1
+++ b/gcc/config/i386/i386.h
343cc1
@@ -2322,6 +2322,13 @@ struct GTY(()) machine_function {
343cc1
      stack below the return address.  */
343cc1
   BOOL_BITFIELD static_chain_on_stack : 1;
343cc1
 
343cc1
+  /* How to generate indirec branch.  */
343cc1
+  ENUM_BITFIELD(indirect_branch) indirect_branch_type : 3;
343cc1
+
343cc1
+  /* If true, the current function has local indirect jumps, like
343cc1
+     "indirect_jump" or "tablejump".  */
343cc1
+  BOOL_BITFIELD has_local_indirect_jump : 1;
343cc1
+
343cc1
   /* During prologue/epilogue generation, the current frame state.
343cc1
      Otherwise, the frame state at the end of the prologue.  */
343cc1
   struct machine_frame_state fs;
343cc1
diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
343cc1
index e09e961..b943849 100644
343cc1
--- a/gcc/config/i386/i386.md
343cc1
+++ b/gcc/config/i386/i386.md
343cc1
@@ -11276,13 +11276,18 @@
343cc1
 {
343cc1
   if (TARGET_X32)
343cc1
     operands[0] = convert_memory_address (word_mode, operands[0]);
343cc1
+  cfun->machine->has_local_indirect_jump = true;
343cc1
 })
343cc1
 
343cc1
 (define_insn "*indirect_jump"
343cc1
   [(set (pc) (match_operand:W 0 "indirect_branch_operand" "rw"))]
343cc1
   ""
343cc1
-  "jmp\t%A0"
343cc1
-  [(set_attr "type" "ibr")
343cc1
+  "* return ix86_output_indirect_jmp (operands[0], false);"
343cc1
+  [(set (attr "type")
343cc1
+     (if_then_else (match_test "(cfun->machine->indirect_branch_type
343cc1
+				 != indirect_branch_keep)")
343cc1
+	(const_string "multi")
343cc1
+	(const_string "ibr")))
343cc1
    (set_attr "length_immediate" "0")])
343cc1
 
343cc1
 (define_expand "tablejump"
343cc1
@@ -11324,14 +11329,19 @@
343cc1
 
343cc1
   if (TARGET_X32)
343cc1
     operands[0] = convert_memory_address (word_mode, operands[0]);
343cc1
+  cfun->machine->has_local_indirect_jump = true;
343cc1
 })
343cc1
 
343cc1
 (define_insn "*tablejump_1"
343cc1
   [(set (pc) (match_operand:W 0 "indirect_branch_operand" "rw"))
343cc1
    (use (label_ref (match_operand 1)))]
343cc1
   ""
343cc1
-  "jmp\t%A0"
343cc1
-  [(set_attr "type" "ibr")
343cc1
+  "* return ix86_output_indirect_jmp (operands[0], false);"
343cc1
+  [(set (attr "type")
343cc1
+     (if_then_else (match_test "(cfun->machine->indirect_branch_type
343cc1
+				 != indirect_branch_keep)")
343cc1
+	(const_string "multi")
343cc1
+	(const_string "ibr")))
343cc1
    (set_attr "length_immediate" "0")])
343cc1
 
343cc1
 ;; Convert setcc + movzbl to xor + setcc if operands don't overlap.
343cc1
@@ -11773,8 +11783,12 @@
343cc1
   [(simple_return)
343cc1
    (use (match_operand:SI 0 "register_operand" "r"))]
343cc1
   "reload_completed"
343cc1
-  "jmp\t%A0"
343cc1
-  [(set_attr "type" "ibr")
343cc1
+  "* return ix86_output_indirect_jmp (operands[0], true);"
343cc1
+  [(set (attr "type")
343cc1
+     (if_then_else (match_test "(cfun->machine->indirect_branch_type
343cc1
+				 != indirect_branch_keep)")
343cc1
+	(const_string "multi")
343cc1
+	(const_string "ibr")))
343cc1
    (set_attr "length_immediate" "0")])
343cc1
 
343cc1
 (define_insn "nop"
343cc1
diff --git a/gcc/config/i386/i386.opt b/gcc/config/i386/i386.opt
343cc1
index e93aa5a..0f6965a 100644
343cc1
--- a/gcc/config/i386/i386.opt
343cc1
+++ b/gcc/config/i386/i386.opt
343cc1
@@ -630,3 +630,23 @@ Support RTM built-in functions and code generation
343cc1
 mpku
343cc1
 Target Report Mask(ISA_PKU) Var(ix86_isa_flags) Save
343cc1
 Support PKU built-in functions and code generation
343cc1
+
343cc1
+mindirect-branch=
343cc1
+Target Report RejectNegative Joined Enum(indirect_branch) Var(ix86_indirect_branch) Init(indirect_branch_keep)
343cc1
+Convert indirect call and jump to call and return thunks.
343cc1
+
343cc1
+Enum
343cc1
+Name(indirect_branch) Type(enum indirect_branch)
343cc1
+Known indirect branch choices (for use with the -mindirect-branch= option):
343cc1
+
343cc1
+EnumValue
343cc1
+Enum(indirect_branch) String(keep) Value(indirect_branch_keep)
343cc1
+
343cc1
+EnumValue
343cc1
+Enum(indirect_branch) String(thunk) Value(indirect_branch_thunk)
343cc1
+
343cc1
+EnumValue
343cc1
+Enum(indirect_branch) String(thunk-inline) Value(indirect_branch_thunk_inline)
343cc1
+
343cc1
+EnumValue
343cc1
+Enum(indirect_branch) String(thunk-extern) Value(indirect_branch_thunk_extern)
343cc1
diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi
343cc1
index e495af5..847991c 100644
343cc1
--- a/gcc/doc/extend.texi
343cc1
+++ b/gcc/doc/extend.texi
343cc1
@@ -3811,6 +3811,16 @@ Specify which floating-point unit to use.  The
343cc1
 @code{target("fpmath=sse,387")} option must be specified as
343cc1
 @code{target("fpmath=sse+387")} because the comma would separate
343cc1
 different options.
343cc1
+
343cc1
+@item indirect_branch("@var{choice}")
343cc1
+@cindex @code{indirect_branch} function attribute, x86
343cc1
+On x86 targets, the @code{indirect_branch} attribute causes the compiler
343cc1
+to convert indirect call and jump with @var{choice}.  @samp{keep}
343cc1
+keeps indirect call and jump unmodified.  @samp{thunk} converts indirect
343cc1
+call and jump to call and return thunk.  @samp{thunk-inline} converts
343cc1
+indirect call and jump to inlined call and return thunk.
343cc1
+@samp{thunk-extern} converts indirect call and jump to external call
343cc1
+and return thunk provided in a separate object file.
343cc1
 @end table
343cc1
 
343cc1
 On the PowerPC, the following options are allowed:
343cc1
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
343cc1
index 313a6c5..b299fbf 100644
343cc1
--- a/gcc/doc/invoke.texi
343cc1
+++ b/gcc/doc/invoke.texi
343cc1
@@ -657,7 +657,8 @@ Objective-C and Objective-C++ Dialects}.
343cc1
 -mcmodel=@var{code-model} -mabi=@var{name} -maddress-mode=@var{mode} @gol
343cc1
 -m32 -m64 -mx32 -mlarge-data-threshold=@var{num} @gol
343cc1
 -msse2avx -mfentry -m8bit-idiv @gol
343cc1
--mavx256-split-unaligned-load -mavx256-split-unaligned-store}
343cc1
+-mavx256-split-unaligned-load -mavx256-split-unaligned-store @gol
343cc1
+-mindirect-branch=@var{choice}}
343cc1
 
343cc1
 @emph{i386 and x86-64 Windows Options}
343cc1
 @gccoptlist{-mconsole -mcygwin -mno-cygwin -mdll @gol
343cc1
@@ -14646,6 +14647,17 @@ to 255, 8-bit unsigned integer divide is used instead of
343cc1
 @opindex avx256-split-unaligned-store
343cc1
 Split 32-byte AVX unaligned load and store.
343cc1
 
343cc1
+@item -mindirect-branch=@var{choice}
343cc1
+@opindex -mindirect-branch
343cc1
+Convert indirect call and jump with @var{choice}.  The default is
343cc1
+@samp{keep}, which keeps indirect call and jump unmodified.
343cc1
+@samp{thunk} converts indirect call and jump to call and return thunk.
343cc1
+@samp{thunk-inline} converts indirect call and jump to inlined call
343cc1
+and return thunk.  @samp{thunk-extern} converts indirect call and jump
343cc1
+to external call and return thunk provided in a separate object file.
343cc1
+You can control this behavior for a specific function by using the
343cc1
+function attribute @code{indirect_branch}.  @xref{Function Attributes}.
343cc1
+
343cc1
 @end table
343cc1
 
343cc1
 These @samp{-m} switches are supported in addition to the above
343cc1
diff --git a/gcc/testsuite/gcc.target/i386/indirect-thunk-1.c b/gcc/testsuite/gcc.target/i386/indirect-thunk-1.c
343cc1
new file mode 100644
343cc1
index 0000000..87f6dae
343cc1
--- /dev/null
343cc1
+++ b/gcc/testsuite/gcc.target/i386/indirect-thunk-1.c
343cc1
@@ -0,0 +1,22 @@
343cc1
+/* { dg-do compile } */
343cc1
+/* { dg-options "-O2 -mindirect-branch=thunk -fno-pic" } */
343cc1
+
343cc1
+typedef void (*dispatch_t)(long offset);
343cc1
+
343cc1
+dispatch_t dispatch;
343cc1
+
343cc1
+void
343cc1
+male_indirect_jump (long offset)
343cc1
+{
343cc1
+  dispatch(offset);
343cc1
+}
343cc1
+
343cc1
+/* Our gcc-4.8 based compiler is not as aggressive at sibcalls
343cc1
+   where the target is in a MEM.  Thus we have to scan for different
343cc1
+   patterns here than in newer compilers.  */
343cc1
+/* { dg-final { scan-assembler "mov(?:l|q)\[ \t\]*_?dispatch" } } */
343cc1
+/* { dg-final { scan-assembler "jmp\[ \t\]*__x86_indirect_thunk_(r|e)ax" } } */
343cc1
+/* { dg-final { scan-assembler "jmp\[ \t\]*\.LIND" } } */
343cc1
+/* { dg-final { scan-assembler "call\[ \t\]*\.LIND" } } */
343cc1
+/* { dg-final { scan-assembler {\tpause} } } */
343cc1
+/* { dg-final { scan-assembler {\tlfence} } } */
343cc1
diff --git a/gcc/testsuite/gcc.target/i386/indirect-thunk-2.c b/gcc/testsuite/gcc.target/i386/indirect-thunk-2.c
343cc1
new file mode 100644
343cc1
index 0000000..6bc4f0a
343cc1
--- /dev/null
343cc1
+++ b/gcc/testsuite/gcc.target/i386/indirect-thunk-2.c
343cc1
@@ -0,0 +1,22 @@
343cc1
+/* { dg-do compile } */
343cc1
+/* { dg-options "-O2 -mindirect-branch=thunk -fno-pic" } */
343cc1
+
343cc1
+typedef void (*dispatch_t)(long offset);
343cc1
+
343cc1
+dispatch_t dispatch[256];
343cc1
+
343cc1
+void
343cc1
+male_indirect_jump (long offset)
343cc1
+{
343cc1
+  dispatch[offset](offset);
343cc1
+}
343cc1
+
343cc1
+/* Our gcc-4.8 based compiler is not as aggressive at sibcalls
343cc1
+   where the target is in a MEM.  Thus we have to scan for different
343cc1
+   patterns here than in newer compilers.  */
343cc1
+/* { dg-final { scan-assembler "mov(?:l|q)\[ \t\]*_?dispatch" } } */
343cc1
+/* { dg-final { scan-assembler "jmp\[ \t\]*__x86_indirect_thunk_(r|e)ax" } } */
343cc1
+/* { dg-final { scan-assembler "jmp\[ \t\]*\.LIND" } } */
343cc1
+/* { dg-final { scan-assembler "call\[ \t\]*\.LIND" } } */
343cc1
+/* { dg-final { scan-assembler {\tpause} } } */
343cc1
+/* { dg-final { scan-assembler {\tlfence} } } */
343cc1
diff --git a/gcc/testsuite/gcc.target/i386/indirect-thunk-3.c b/gcc/testsuite/gcc.target/i386/indirect-thunk-3.c
343cc1
new file mode 100644
343cc1
index 0000000..f20d35c
343cc1
--- /dev/null
343cc1
+++ b/gcc/testsuite/gcc.target/i386/indirect-thunk-3.c
343cc1
@@ -0,0 +1,21 @@
343cc1
+/* { dg-do compile } */
343cc1
+/* { dg-options "-O2 -mindirect-branch=thunk -fno-pic" } */
343cc1
+
343cc1
+typedef void (*dispatch_t)(long offset);
343cc1
+
343cc1
+dispatch_t dispatch;
343cc1
+
343cc1
+int
343cc1
+male_indirect_jump (long offset)
343cc1
+{
343cc1
+  dispatch(offset);
343cc1
+  return 0;
343cc1
+}
343cc1
+
343cc1
+/* { dg-final { scan-assembler "push(?:l|q)\[ \t\]*_?dispatch" { target { ! x32 } } } } */
343cc1
+/* { dg-final { scan-assembler "jmp\[ \t\]*__x86_indirect_thunk" { target { ! x32 } } } } */
343cc1
+/* { dg-final { scan-assembler "call\[ \t\]*__x86_indirect_thunk_(r|e)ax" { target x32 } } } */
343cc1
+/* { dg-final { scan-assembler "jmp\[ \t\]*\.LIND" } } */
343cc1
+/* { dg-final { scan-assembler "call\[ \t\]*\.LIND" } } */
343cc1
+/* { dg-final { scan-assembler {\tpause} } } */
343cc1
+/* { dg-final { scan-assembler {\tlfence} } } */
343cc1
diff --git a/gcc/testsuite/gcc.target/i386/indirect-thunk-4.c b/gcc/testsuite/gcc.target/i386/indirect-thunk-4.c
343cc1
new file mode 100644
343cc1
index 0000000..0eff8fb
343cc1
--- /dev/null
343cc1
+++ b/gcc/testsuite/gcc.target/i386/indirect-thunk-4.c
343cc1
@@ -0,0 +1,21 @@
343cc1
+/* { dg-do compile } */
343cc1
+/* { dg-options "-O2 -mindirect-branch=thunk -fno-pic" } */
343cc1
+
343cc1
+typedef void (*dispatch_t)(long offset);
343cc1
+
343cc1
+dispatch_t dispatch[256];
343cc1
+
343cc1
+int
343cc1
+male_indirect_jump (long offset)
343cc1
+{
343cc1
+  dispatch[offset](offset);
343cc1
+  return 0;
343cc1
+}
343cc1
+
343cc1
+/* { dg-final { scan-assembler "push(?:l|q)\[ \t\]*_?dispatch" { target { ! x32 } } } } */
343cc1
+/* { dg-final { scan-assembler "jmp\[ \t\]*__x86_indirect_thunk" { target { ! x32 } } } } */
343cc1
+/* { dg-final { scan-assembler "call\[ \t\]*__x86_indirect_thunk_(r|e)ax" { target x32 } } } */
343cc1
+/* { dg-final { scan-assembler "jmp\[ \t\]*\.LIND" } } */
343cc1
+/* { dg-final { scan-assembler "call\[ \t\]*\.LIND" } } */
343cc1
+/* { dg-final { scan-assembler {\tpause} } } */
343cc1
+/* { dg-final { scan-assembler {\tlfence} } } */
343cc1
diff --git a/gcc/testsuite/gcc.target/i386/indirect-thunk-7.c b/gcc/testsuite/gcc.target/i386/indirect-thunk-7.c
343cc1
new file mode 100644
343cc1
index 0000000..afdb600
343cc1
--- /dev/null
343cc1
+++ b/gcc/testsuite/gcc.target/i386/indirect-thunk-7.c
343cc1
@@ -0,0 +1,44 @@
343cc1
+/* { dg-do compile } */
343cc1
+/* { dg-options "-O2 -mindirect-branch=thunk -fno-pic" } */
343cc1
+
343cc1
+void func0 (void);
343cc1
+void func1 (void);
343cc1
+void func2 (void);
343cc1
+void func3 (void);
343cc1
+void func4 (void);
343cc1
+void func4 (void);
343cc1
+void func5 (void);
343cc1
+
343cc1
+void
343cc1
+bar (int i)
343cc1
+{
343cc1
+  switch (i)
343cc1
+    {
343cc1
+    default:
343cc1
+      func0 ();
343cc1
+      break;
343cc1
+    case 1:
343cc1
+      func1 ();
343cc1
+      break;
343cc1
+    case 2:
343cc1
+      func2 ();
343cc1
+      break;
343cc1
+    case 3:
343cc1
+      func3 ();
343cc1
+      break;
343cc1
+    case 4:
343cc1
+      func4 ();
343cc1
+      break;
343cc1
+    case 5:
343cc1
+      func5 ();
343cc1
+      break;
343cc1
+    }
343cc1
+}
343cc1
+
343cc1
+/* { dg-final { scan-assembler "push(?:l|q)\[ \t\]*\.L\[0-9\]+\\(,%" { target { ! x32 } } } } */
343cc1
+/* { dg-final { scan-assembler "jmp\[ \t\]*__x86_indirect_thunk" { target { ! x32 } } } } */
343cc1
+/* { dg-final { scan-assembler "jmp\[ \t\]*__x86_indirect_thunk_(r|e)ax" { target x32 } } } */
343cc1
+/* { dg-final { scan-assembler "jmp\[ \t\]*\.LIND" } } */
343cc1
+/* { dg-final { scan-assembler "call\[ \t\]*\.LIND" } } */
343cc1
+/* { dg-final { scan-assembler {\tpause} } } */
343cc1
+/* { dg-final { scan-assembler {\tlfence} } } */
343cc1
diff --git a/gcc/testsuite/gcc.target/i386/indirect-thunk-attr-1.c b/gcc/testsuite/gcc.target/i386/indirect-thunk-attr-1.c
343cc1
new file mode 100644
343cc1
index 0000000..efccdec
343cc1
--- /dev/null
343cc1
+++ b/gcc/testsuite/gcc.target/i386/indirect-thunk-attr-1.c
343cc1
@@ -0,0 +1,25 @@
343cc1
+/* { dg-do compile } */
343cc1
+/* { dg-options "-O2 -fno-pic" } */
343cc1
+
343cc1
+typedef void (*dispatch_t)(long offset);
343cc1
+
343cc1
+dispatch_t dispatch;
343cc1
+
343cc1
+extern void male_indirect_jump (long)
343cc1
+  __attribute__ ((indirect_branch("thunk")));
343cc1
+
343cc1
+void
343cc1
+male_indirect_jump (long offset)
343cc1
+{
343cc1
+  dispatch(offset);
343cc1
+}
343cc1
+
343cc1
+/* Our gcc-4.8 based compiler is not as aggressive at sibcalls
343cc1
+   where the target is in a MEM.  Thus we have to scan for different
343cc1
+   patterns here than in newer compilers.  */
343cc1
+/* { dg-final { scan-assembler "mov(?:l|q)\[ \t\]*_?dispatch" } } */
343cc1
+/* { dg-final { scan-assembler "jmp\[ \t\]*__x86_indirect_thunk_(r|e)ax" } } */
343cc1
+/* { dg-final { scan-assembler "jmp\[ \t\]*\.LIND" } } */
343cc1
+/* { dg-final { scan-assembler "call\[ \t\]*\.LIND" } } */
343cc1
+/* { dg-final { scan-assembler {\tpause} } } */
343cc1
+/* { dg-final { scan-assembler {\tlfence} } } */
343cc1
diff --git a/gcc/testsuite/gcc.target/i386/indirect-thunk-attr-2.c b/gcc/testsuite/gcc.target/i386/indirect-thunk-attr-2.c
343cc1
new file mode 100644
343cc1
index 0000000..ca3814e
343cc1
--- /dev/null
343cc1
+++ b/gcc/testsuite/gcc.target/i386/indirect-thunk-attr-2.c
343cc1
@@ -0,0 +1,23 @@
343cc1
+/* { dg-do compile } */
343cc1
+/* { dg-options "-O2 -fno-pic" } */
343cc1
+
343cc1
+typedef void (*dispatch_t)(long offset);
343cc1
+
343cc1
+dispatch_t dispatch[256];
343cc1
+
343cc1
+__attribute__ ((indirect_branch("thunk")))
343cc1
+void
343cc1
+male_indirect_jump (long offset)
343cc1
+{
343cc1
+  dispatch[offset](offset);
343cc1
+}
343cc1
+
343cc1
+/* Our gcc-4.8 based compiler is not as aggressive at sibcalls
343cc1
+   where the target is in a MEM.  Thus we have to scan for different
343cc1
+   patterns here than in newer compilers.  */
343cc1
+/* { dg-final { scan-assembler "mov(?:l|q)\[ \t\]*_?dispatch" } } */
343cc1
+/* { dg-final { scan-assembler "jmp\[ \t\]*__x86_indirect_thunk_(r|e)ax" } } */
343cc1
+/* { dg-final { scan-assembler "jmp\[ \t\]*\.LIND" } } */
343cc1
+/* { dg-final { scan-assembler "call\[ \t\]*\.LIND" } } */
343cc1
+/* { dg-final { scan-assembler {\tpause} } } */
343cc1
+/* { dg-final { scan-assembler {\tlfence} } } */
343cc1
diff --git a/gcc/testsuite/gcc.target/i386/indirect-thunk-attr-3.c b/gcc/testsuite/gcc.target/i386/indirect-thunk-attr-3.c
343cc1
new file mode 100644
343cc1
index 0000000..97744d6
343cc1
--- /dev/null
343cc1
+++ b/gcc/testsuite/gcc.target/i386/indirect-thunk-attr-3.c
343cc1
@@ -0,0 +1,23 @@
343cc1
+/* { dg-do compile } */
343cc1
+/* { dg-options "-O2 -fno-pic" } */
343cc1
+
343cc1
+typedef void (*dispatch_t)(long offset);
343cc1
+
343cc1
+dispatch_t dispatch;
343cc1
+extern int male_indirect_jump (long)
343cc1
+  __attribute__ ((indirect_branch("thunk-inline")));
343cc1
+
343cc1
+int
343cc1
+male_indirect_jump (long offset)
343cc1
+{
343cc1
+  dispatch(offset);
343cc1
+  return 0;
343cc1
+}
343cc1
+
343cc1
+/* { dg-final { scan-assembler "push(?:l|q)\[ \t\]*_?dispatch" { target { ! x32 } } } } */
343cc1
+/* { dg-final { scan-assembler-times "jmp\[ \t\]*\.LIND" 2 } } */
343cc1
+/* { dg-final { scan-assembler-times "call\[ \t\]*\.LIND" 2 } } */
343cc1
+/* { dg-final { scan-assembler {\tpause} } } */
343cc1
+/* { dg-final { scan-assembler {\tlfence} } } */
343cc1
+/* { dg-final { scan-assembler-not "__x86_indirect_thunk" } } */
343cc1
+/* { dg-final { scan-assembler-not "pushq\[ \t\]%rax" { target x32 } } } */
343cc1
diff --git a/gcc/testsuite/gcc.target/i386/indirect-thunk-attr-4.c b/gcc/testsuite/gcc.target/i386/indirect-thunk-attr-4.c
343cc1
new file mode 100644
343cc1
index 0000000..bfce3ea
343cc1
--- /dev/null
343cc1
+++ b/gcc/testsuite/gcc.target/i386/indirect-thunk-attr-4.c
343cc1
@@ -0,0 +1,22 @@
343cc1
+/* { dg-do compile } */
343cc1
+/* { dg-options "-O2 -fno-pic" } */
343cc1
+
343cc1
+typedef void (*dispatch_t)(long offset);
343cc1
+
343cc1
+dispatch_t dispatch[256];
343cc1
+
343cc1
+__attribute__ ((indirect_branch("thunk-inline")))
343cc1
+int
343cc1
+male_indirect_jump (long offset)
343cc1
+{
343cc1
+  dispatch[offset](offset);
343cc1
+  return 0;
343cc1
+}
343cc1
+
343cc1
+/* { dg-final { scan-assembler "push(?:l|q)\[ \t\]*_?dispatch" { target { ! x32 } } } } */
343cc1
+/* { dg-final { scan-assembler-times "jmp\[ \t\]*\.LIND" 2 } } */
343cc1
+/* { dg-final { scan-assembler-times "call\[ \t\]*\.LIND" 2 } } */
343cc1
+/* { dg-final { scan-assembler {\tpause} } } */
343cc1
+/* { dg-final { scan-assembler {\tlfence} } } */
343cc1
+/* { dg-final { scan-assembler-not "__x86_indirect_thunk" } } */
343cc1
+/* { dg-final { scan-assembler-not "pushq\[ \t\]%rax" { target x32 } } } */
343cc1
diff --git a/gcc/testsuite/gcc.target/i386/indirect-thunk-attr-5.c b/gcc/testsuite/gcc.target/i386/indirect-thunk-attr-5.c
343cc1
new file mode 100644
343cc1
index 0000000..0833606
343cc1
--- /dev/null
343cc1
+++ b/gcc/testsuite/gcc.target/i386/indirect-thunk-attr-5.c
343cc1
@@ -0,0 +1,22 @@
343cc1
+/* { dg-do compile } */
343cc1
+/* { dg-options "-O2 -fno-pic" } */
343cc1
+
343cc1
+typedef void (*dispatch_t)(long offset);
343cc1
+
343cc1
+dispatch_t dispatch;
343cc1
+extern int male_indirect_jump (long)
343cc1
+  __attribute__ ((indirect_branch("thunk-extern")));
343cc1
+
343cc1
+int
343cc1
+male_indirect_jump (long offset)
343cc1
+{
343cc1
+  dispatch(offset);
343cc1
+  return 0;
343cc1
+}
343cc1
+
343cc1
+/* { dg-final { scan-assembler "push(?:l|q)\[ \t\]*_?dispatch" { target { ! x32 } } } } */
343cc1
+/* { dg-final { scan-assembler-times "jmp\[ \t\]*\.LIND" 1 { target { ! x32 } } } } */
343cc1
+/* { dg-final { scan-assembler-times "call\[ \t\]*\.LIND" 1 { target { ! x32 } } } } */
343cc1
+/* { dg-final { scan-assembler "jmp\[ \t\]*__x86_indirect_thunk" { target { ! x32 } } } } */
343cc1
+/* { dg-final { scan-assembler "call\[ \t\]*__x86_indirect_thunk_(r|e)ax" { target x32 } } } */
343cc1
+/* { dg-final { scan-assembler-not {\t(lfence|pause)} } } */
343cc1
diff --git a/gcc/testsuite/gcc.target/i386/indirect-thunk-attr-6.c b/gcc/testsuite/gcc.target/i386/indirect-thunk-attr-6.c
343cc1
new file mode 100644
343cc1
index 0000000..2eba0fb
343cc1
--- /dev/null
343cc1
+++ b/gcc/testsuite/gcc.target/i386/indirect-thunk-attr-6.c
343cc1
@@ -0,0 +1,21 @@
343cc1
+/* { dg-do compile } */
343cc1
+/* { dg-options "-O2 -fno-pic" } */
343cc1
+
343cc1
+typedef void (*dispatch_t)(long offset);
343cc1
+
343cc1
+dispatch_t dispatch[256];
343cc1
+
343cc1
+__attribute__ ((indirect_branch("thunk-extern")))
343cc1
+int
343cc1
+male_indirect_jump (long offset)
343cc1
+{
343cc1
+  dispatch[offset](offset);
343cc1
+  return 0;
343cc1
+}
343cc1
+
343cc1
+/* { dg-final { scan-assembler "push(?:l|q)\[ \t\]*_?dispatch" { target { ! x32 } } } } */
343cc1
+/* { dg-final { scan-assembler-times "jmp\[ \t\]*\.LIND" 1 { target { ! x32 } } } } */
343cc1
+/* { dg-final { scan-assembler-times "call\[ \t\]*\.LIND" 1 { target { ! x32 } } } } */
343cc1
+/* { dg-final { scan-assembler "jmp\[ \t\]*__x86_indirect_thunk" { target { ! x32 } } } } */
343cc1
+/* { dg-final { scan-assembler "call\[ \t\]*__x86_indirect_thunk_(r|e)ax" { target x32 } } } */
343cc1
+/* { dg-final { scan-assembler-not {\t(lfence|pause)} } } */
343cc1
diff --git a/gcc/testsuite/gcc.target/i386/indirect-thunk-attr-7.c b/gcc/testsuite/gcc.target/i386/indirect-thunk-attr-7.c
343cc1
new file mode 100644
343cc1
index 0000000..f58427e
343cc1
--- /dev/null
343cc1
+++ b/gcc/testsuite/gcc.target/i386/indirect-thunk-attr-7.c
343cc1
@@ -0,0 +1,44 @@
343cc1
+/* { dg-do compile } */
343cc1
+/* { dg-options "-O2 -fno-pic" } */
343cc1
+
343cc1
+void func0 (void);
343cc1
+void func1 (void);
343cc1
+void func2 (void);
343cc1
+void func3 (void);
343cc1
+void func4 (void);
343cc1
+void func4 (void);
343cc1
+void func5 (void);
343cc1
+
343cc1
+__attribute__ ((indirect_branch("thunk-extern")))
343cc1
+void
343cc1
+bar (int i)
343cc1
+{
343cc1
+  switch (i)
343cc1
+    {
343cc1
+    default:
343cc1
+      func0 ();
343cc1
+      break;
343cc1
+    case 1:
343cc1
+      func1 ();
343cc1
+      break;
343cc1
+    case 2:
343cc1
+      func2 ();
343cc1
+      break;
343cc1
+    case 3:
343cc1
+      func3 ();
343cc1
+      break;
343cc1
+    case 4:
343cc1
+      func4 ();
343cc1
+      break;
343cc1
+    case 5:
343cc1
+      func5 ();
343cc1
+      break;
343cc1
+    }
343cc1
+}
343cc1
+
343cc1
+/* { dg-final { scan-assembler "push(?:l|q)\[ \t\]*\.L\[0-9\]+\\(,%" { target { ! x32 } } } } */
343cc1
+/* { dg-final { scan-assembler "jmp\[ \t\]*__x86_indirect_thunk_(r|e)ax" { target x32 } } } */
343cc1
+/* { dg-final { scan-assembler "jmp\[ \t\]*__x86_indirect_thunk" } } */
343cc1
+/* { dg-final { scan-assembler-not {\t(lfence|pause)} } } */
343cc1
+/* { dg-final { scan-assembler-not "jmp\[ \t\]*\.LIND" } } */
343cc1
+/* { dg-final { scan-assembler-not "call\[ \t\]*\.LIND" } } */
343cc1
diff --git a/gcc/testsuite/gcc.target/i386/indirect-thunk-attr-8.c b/gcc/testsuite/gcc.target/i386/indirect-thunk-attr-8.c
343cc1
new file mode 100644
343cc1
index 0000000..564ed39
343cc1
--- /dev/null
343cc1
+++ b/gcc/testsuite/gcc.target/i386/indirect-thunk-attr-8.c
343cc1
@@ -0,0 +1,42 @@
343cc1
+/* { dg-do compile } */
343cc1
+/* { dg-options "-O2 -mindirect-branch=thunk -fno-pic" } */
343cc1
+
343cc1
+void func0 (void);
343cc1
+void func1 (void);
343cc1
+void func2 (void);
343cc1
+void func3 (void);
343cc1
+void func4 (void);
343cc1
+void func4 (void);
343cc1
+void func5 (void);
343cc1
+
343cc1
+__attribute__ ((indirect_branch("keep")))
343cc1
+void
343cc1
+bar (int i)
343cc1
+{
343cc1
+  switch (i)
343cc1
+    {
343cc1
+    default:
343cc1
+      func0 ();
343cc1
+      break;
343cc1
+    case 1:
343cc1
+      func1 ();
343cc1
+      break;
343cc1
+    case 2:
343cc1
+      func2 ();
343cc1
+      break;
343cc1
+    case 3:
343cc1
+      func3 ();
343cc1
+      break;
343cc1
+    case 4:
343cc1
+      func4 ();
343cc1
+      break;
343cc1
+    case 5:
343cc1
+      func5 ();
343cc1
+      break;
343cc1
+    }
343cc1
+}
343cc1
+
343cc1
+/* { dg-final { scan-assembler-not "__x86_indirect_thunk" } } */
343cc1
+/* { dg-final { scan-assembler-not {\t(lfence|pause)} } } */
343cc1
+/* { dg-final { scan-assembler-not "jmp\[ \t\]*\.LIND" } } */
343cc1
+/* { dg-final { scan-assembler-not "call\[ \t\]*\.LIND" } } */
343cc1
diff --git a/gcc/testsuite/gcc.target/i386/indirect-thunk-extern-1.c b/gcc/testsuite/gcc.target/i386/indirect-thunk-extern-1.c
343cc1
new file mode 100644
343cc1
index 0000000..7fd01d6
343cc1
--- /dev/null
343cc1
+++ b/gcc/testsuite/gcc.target/i386/indirect-thunk-extern-1.c
343cc1
@@ -0,0 +1,21 @@
343cc1
+/* { dg-do compile } */
343cc1
+/* { dg-options "-O2 -mindirect-branch=thunk-extern -fno-pic" } */
343cc1
+
343cc1
+typedef void (*dispatch_t)(long offset);
343cc1
+
343cc1
+dispatch_t dispatch;
343cc1
+
343cc1
+void
343cc1
+male_indirect_jump (long offset)
343cc1
+{
343cc1
+  dispatch(offset);
343cc1
+}
343cc1
+
343cc1
+/* Our gcc-4.8 based compiler is not as aggressive at sibcalls
343cc1
+   where the target is in a MEM.  Thus we have to scan for different
343cc1
+   patterns here than in newer compilers.  */
343cc1
+/* { dg-final { scan-assembler "mov(?:l|q)\[ \t\]*_?dispatch" } } */
343cc1
+/* { dg-final { scan-assembler "jmp\[ \t\]*__x86_indirect_thunk_(r|e)ax" } } */
343cc1
+/* { dg-final { scan-assembler-not {\t(lfence|pause)} } } */
343cc1
+/* { dg-final { scan-assembler-not "jmp\[ \t\]*\.LIND" } } */
343cc1
+/* { dg-final { scan-assembler-not "call\[ \t\]*\.LIND" } } */
343cc1
diff --git a/gcc/testsuite/gcc.target/i386/indirect-thunk-extern-2.c b/gcc/testsuite/gcc.target/i386/indirect-thunk-extern-2.c
343cc1
new file mode 100644
343cc1
index 0000000..825f6b2
343cc1
--- /dev/null
343cc1
+++ b/gcc/testsuite/gcc.target/i386/indirect-thunk-extern-2.c
343cc1
@@ -0,0 +1,21 @@
343cc1
+/* { dg-do compile } */
343cc1
+/* { dg-options "-O2 -mindirect-branch=thunk-extern -fno-pic" } */
343cc1
+
343cc1
+typedef void (*dispatch_t)(long offset);
343cc1
+
343cc1
+dispatch_t dispatch[256];
343cc1
+
343cc1
+void
343cc1
+male_indirect_jump (long offset)
343cc1
+{
343cc1
+  dispatch[offset](offset);
343cc1
+}
343cc1
+
343cc1
+/* Our gcc-4.8 based compiler is not as aggressive at sibcalls
343cc1
+   where the target is in a MEM.  Thus we have to scan for different
343cc1
+   patterns here than in newer compilers.  */
343cc1
+/* { dg-final { scan-assembler "mov(?:l|q)\[ \t\]*_?dispatch" } } */
343cc1
+/* { dg-final { scan-assembler "jmp\[ \t\]*__x86_indirect_thunk_(r|e)ax" } } */
343cc1
+/* { dg-final { scan-assembler-not {\t(lfence|pause)} } } */
343cc1
+/* { dg-final { scan-assembler-not "jmp\[ \t\]*\.LIND" } } */
343cc1
+/* { dg-final { scan-assembler-not "call\[ \t\]*\.LIND" } } */
343cc1
diff --git a/gcc/testsuite/gcc.target/i386/indirect-thunk-extern-3.c b/gcc/testsuite/gcc.target/i386/indirect-thunk-extern-3.c
343cc1
new file mode 100644
343cc1
index 0000000..395634e
343cc1
--- /dev/null
343cc1
+++ b/gcc/testsuite/gcc.target/i386/indirect-thunk-extern-3.c
343cc1
@@ -0,0 +1,20 @@
343cc1
+/* { dg-do compile } */
343cc1
+/* { dg-options "-O2 -mindirect-branch=thunk-extern -fno-pic" } */
343cc1
+
343cc1
+typedef void (*dispatch_t)(long offset);
343cc1
+
343cc1
+dispatch_t dispatch;
343cc1
+
343cc1
+int
343cc1
+male_indirect_jump (long offset)
343cc1
+{
343cc1
+  dispatch(offset);
343cc1
+  return 0;
343cc1
+}
343cc1
+
343cc1
+/* { dg-final { scan-assembler "push(?:l|q)\[ \t\]*_?dispatch" { target { ! x32 } } } } */
343cc1
+/* { dg-final { scan-assembler "jmp\[ \t\]*__x86_indirect_thunk" { target { ! x32 } } } } */
343cc1
+/* { dg-final { scan-assembler-times "jmp\[ \t\]*\.LIND" 1 { target { ! x32 } } } } */
343cc1
+/* { dg-final { scan-assembler-times "call\[ \t\]*\.LIND" 1 { target { ! x32 } } } } */
343cc1
+/* { dg-final { scan-assembler "call\[ \t\]*__x86_indirect_thunk_(r|e)ax" { target x32 } } } */
343cc1
+/* { dg-final { scan-assembler-not {\t(lfence|pause)} } } */
343cc1
diff --git a/gcc/testsuite/gcc.target/i386/indirect-thunk-extern-4.c b/gcc/testsuite/gcc.target/i386/indirect-thunk-extern-4.c
343cc1
new file mode 100644
343cc1
index 0000000..fd3f633
343cc1
--- /dev/null
343cc1
+++ b/gcc/testsuite/gcc.target/i386/indirect-thunk-extern-4.c
343cc1
@@ -0,0 +1,20 @@
343cc1
+/* { dg-do compile } */
343cc1
+/* { dg-options "-O2 -mindirect-branch=thunk-extern -fno-pic" } */
343cc1
+
343cc1
+typedef void (*dispatch_t)(long offset);
343cc1
+
343cc1
+dispatch_t dispatch[256];
343cc1
+
343cc1
+int
343cc1
+male_indirect_jump (long offset)
343cc1
+{
343cc1
+  dispatch[offset](offset);
343cc1
+  return 0;
343cc1
+}
343cc1
+
343cc1
+/* { dg-final { scan-assembler "push(?:l|q)\[ \t\]*_?dispatch" { target { ! x32 } } } } */
343cc1
+/* { dg-final { scan-assembler "jmp\[ \t\]*__x86_indirect_thunk" { target { ! x32 } } } } */
343cc1
+/* { dg-final { scan-assembler-times "jmp\[ \t\]*\.LIND" 1 { target { ! x32 } } } } */
343cc1
+/* { dg-final { scan-assembler-times "call\[ \t\]*\.LIND" 1 { target { ! x32 } } } } */
343cc1
+/* { dg-final { scan-assembler "call\[ \t\]*__x86_indirect_thunk_(r|e)ax" { target x32 } } } */
343cc1
+/* { dg-final { scan-assembler-not {\t(lfence|pause)} } } */
343cc1
diff --git a/gcc/testsuite/gcc.target/i386/indirect-thunk-extern-7.c b/gcc/testsuite/gcc.target/i386/indirect-thunk-extern-7.c
343cc1
new file mode 100644
343cc1
index 0000000..6652523
343cc1
--- /dev/null
343cc1
+++ b/gcc/testsuite/gcc.target/i386/indirect-thunk-extern-7.c
343cc1
@@ -0,0 +1,43 @@
343cc1
+/* { dg-do compile } */
343cc1
+/* { dg-options "-O2 -mindirect-branch=thunk-extern -fno-pic" } */
343cc1
+
343cc1
+void func0 (void);
343cc1
+void func1 (void);
343cc1
+void func2 (void);
343cc1
+void func3 (void);
343cc1
+void func4 (void);
343cc1
+void func4 (void);
343cc1
+void func5 (void);
343cc1
+
343cc1
+void
343cc1
+bar (int i)
343cc1
+{
343cc1
+  switch (i)
343cc1
+    {
343cc1
+    default:
343cc1
+      func0 ();
343cc1
+      break;
343cc1
+    case 1:
343cc1
+      func1 ();
343cc1
+      break;
343cc1
+    case 2:
343cc1
+      func2 ();
343cc1
+      break;
343cc1
+    case 3:
343cc1
+      func3 ();
343cc1
+      break;
343cc1
+    case 4:
343cc1
+      func4 ();
343cc1
+      break;
343cc1
+    case 5:
343cc1
+      func5 ();
343cc1
+      break;
343cc1
+    }
343cc1
+}
343cc1
+
343cc1
+/* { dg-final { scan-assembler "push(?:l|q)\[ \t\]*\.L\[0-9\]+\\(,%" { target { ! x32 } } } } */
343cc1
+/* { dg-final { scan-assembler "jmp\[ \t\]*__x86_indirect_thunk" { target { ! x32 } } } } */
343cc1
+/* { dg-final { scan-assembler "jmp\[ \t\]*__x86_indirect_thunk_(r|e)ax" { target x32 } } } */
343cc1
+/* { dg-final { scan-assembler-not {\t(lfence|pause)} } } */
343cc1
+/* { dg-final { scan-assembler-not "jmp\[ \t\]*\.LIND" } } */
343cc1
+/* { dg-final { scan-assembler-not "call\[ \t\]*\.LIND" } } */
343cc1
diff --git a/gcc/testsuite/gcc.target/i386/indirect-thunk-inline-1.c b/gcc/testsuite/gcc.target/i386/indirect-thunk-inline-1.c
343cc1
new file mode 100644
343cc1
index 0000000..48c4dd4
343cc1
--- /dev/null
343cc1
+++ b/gcc/testsuite/gcc.target/i386/indirect-thunk-inline-1.c
343cc1
@@ -0,0 +1,23 @@
343cc1
+/* { dg-do compile } */
343cc1
+/* { dg-options "-O2 -mindirect-branch=thunk-inline -fno-pic" } */
343cc1
+
343cc1
+typedef void (*dispatch_t)(long offset);
343cc1
+
343cc1
+dispatch_t dispatch;
343cc1
+
343cc1
+void
343cc1
+male_indirect_jump (long offset)
343cc1
+{
343cc1
+  dispatch(offset);
343cc1
+}
343cc1
+
343cc1
+/* Our gcc-4.8 based compiler is not as aggressive at sibcalls
343cc1
+   where the target is in a MEM.  Thus we have to scan for different
343cc1
+   patterns here than in newer compilers.  */
343cc1
+/* { dg-final { scan-assembler "mov(?:l|q)\[ \t\]*_?dispatch" } } */
343cc1
+/* { dg-final { scan-assembler "jmp\[ \t\]*\.LIND" } } */
343cc1
+/* { dg-final { scan-assembler "call\[ \t\]*\.LIND" } } */
343cc1
+/* { dg-final { scan-assembler {\tpause} } } */
343cc1
+/* { dg-final { scan-assembler {\tlfence} } } */
343cc1
+/* { dg-final { scan-assembler-not "__x86_indirect_thunk" } } */
343cc1
+/* { dg-final { scan-assembler-not "pushq\[ \t\]%rax" { target x32 } } } */
343cc1
diff --git a/gcc/testsuite/gcc.target/i386/indirect-thunk-inline-2.c b/gcc/testsuite/gcc.target/i386/indirect-thunk-inline-2.c
343cc1
new file mode 100644
343cc1
index 0000000..355dad5
343cc1
--- /dev/null
343cc1
+++ b/gcc/testsuite/gcc.target/i386/indirect-thunk-inline-2.c
343cc1
@@ -0,0 +1,23 @@
343cc1
+/* { dg-do compile } */
343cc1
+/* { dg-options "-O2 -mindirect-branch=thunk-inline -fno-pic" } */
343cc1
+
343cc1
+typedef void (*dispatch_t)(long offset);
343cc1
+
343cc1
+dispatch_t dispatch[256];
343cc1
+
343cc1
+void
343cc1
+male_indirect_jump (long offset)
343cc1
+{
343cc1
+  dispatch[offset](offset);
343cc1
+}
343cc1
+
343cc1
+/* Our gcc-4.8 based compiler is not as aggressive at sibcalls
343cc1
+   where the target is in a MEM.  Thus we have to scan for different
343cc1
+   patterns here than in newer compilers.  */
343cc1
+/* { dg-final { scan-assembler "mov(?:l|q)\[ \t\]*_?dispatch" } } */
343cc1
+/* { dg-final { scan-assembler "jmp\[ \t\]*\.LIND" } } */
343cc1
+/* { dg-final { scan-assembler "call\[ \t\]*\.LIND" } } */
343cc1
+/* { dg-final { scan-assembler {\tpause} } } */
343cc1
+/* { dg-final { scan-assembler {\tlfence} } } */
343cc1
+/* { dg-final { scan-assembler-not "__x86_indirect_thunk" } } */
343cc1
+/* { dg-final { scan-assembler-not "pushq\[ \t\]%rax" { target x32 } } } */
343cc1
diff --git a/gcc/testsuite/gcc.target/i386/indirect-thunk-inline-3.c b/gcc/testsuite/gcc.target/i386/indirect-thunk-inline-3.c
343cc1
new file mode 100644
343cc1
index 0000000..244fec7
343cc1
--- /dev/null
343cc1
+++ b/gcc/testsuite/gcc.target/i386/indirect-thunk-inline-3.c
343cc1
@@ -0,0 +1,21 @@
343cc1
+/* { dg-do compile } */
343cc1
+/* { dg-options "-O2 -mindirect-branch=thunk-inline -fno-pic" } */
343cc1
+
343cc1
+typedef void (*dispatch_t)(long offset);
343cc1
+
343cc1
+dispatch_t dispatch;
343cc1
+
343cc1
+int
343cc1
+male_indirect_jump (long offset)
343cc1
+{
343cc1
+  dispatch(offset);
343cc1
+  return 0;
343cc1
+}
343cc1
+
343cc1
+/* { dg-final { scan-assembler "push(?:l|q)\[ \t\]*_?dispatch" { target { ! x32 } } } } */
343cc1
+/* { dg-final { scan-assembler-times "jmp\[ \t\]*\.LIND" 2 } } */
343cc1
+/* { dg-final { scan-assembler-times "call\[ \t\]*\.LIND" 2 } } */
343cc1
+/* { dg-final { scan-assembler-times {\tpause} 1 } } */
343cc1
+/* { dg-final { scan-assembler-times {\tlfence} 1 } } */
343cc1
+/* { dg-final { scan-assembler-not "__x86_indirect_thunk" } } */
343cc1
+/* { dg-final { scan-assembler-not "pushq\[ \t\]%rax" { target x32 } } } */
343cc1
diff --git a/gcc/testsuite/gcc.target/i386/indirect-thunk-inline-4.c b/gcc/testsuite/gcc.target/i386/indirect-thunk-inline-4.c
343cc1
new file mode 100644
343cc1
index 0000000..107ebe3
343cc1
--- /dev/null
343cc1
+++ b/gcc/testsuite/gcc.target/i386/indirect-thunk-inline-4.c
343cc1
@@ -0,0 +1,21 @@
343cc1
+/* { dg-do compile } */
343cc1
+/* { dg-options "-O2 -mindirect-branch=thunk-inline -fno-pic" } */
343cc1
+
343cc1
+typedef void (*dispatch_t)(long offset);
343cc1
+
343cc1
+dispatch_t dispatch[256];
343cc1
+
343cc1
+int
343cc1
+male_indirect_jump (long offset)
343cc1
+{
343cc1
+  dispatch[offset](offset);
343cc1
+  return 0;
343cc1
+}
343cc1
+
343cc1
+/* { dg-final { scan-assembler "push(?:l|q)\[ \t\]*_?dispatch" { target { ! x32 } } } } */
343cc1
+/* { dg-final { scan-assembler-times "jmp\[ \t\]*\.LIND" 2 } } */
343cc1
+/* { dg-final { scan-assembler-times "call\[ \t\]*\.LIND" 2 } } */
343cc1
+/* { dg-final { scan-assembler-times {\tpause} 1 } } */
343cc1
+/* { dg-final { scan-assembler-times {\tlfence} 1 } } */
343cc1
+/* { dg-final { scan-assembler-not "__x86_indirect_thunk" } } */
343cc1
+/* { dg-final { scan-assembler-not "pushq\[ \t\]%rax" { target x32 } } } */
343cc1
diff --git a/gcc/testsuite/gcc.target/i386/indirect-thunk-inline-7.c b/gcc/testsuite/gcc.target/i386/indirect-thunk-inline-7.c
343cc1
new file mode 100644
343cc1
index 0000000..d02b1dc
343cc1
--- /dev/null
343cc1
+++ b/gcc/testsuite/gcc.target/i386/indirect-thunk-inline-7.c
343cc1
@@ -0,0 +1,44 @@
343cc1
+/* { dg-do compile } */
343cc1
+/* { dg-options "-O2 -mindirect-branch=thunk-inline -fno-pic" } */
343cc1
+
343cc1
+void func0 (void);
343cc1
+void func1 (void);
343cc1
+void func2 (void);
343cc1
+void func3 (void);
343cc1
+void func4 (void);
343cc1
+void func4 (void);
343cc1
+void func5 (void);
343cc1
+
343cc1
+void
343cc1
+bar (int i)
343cc1
+{
343cc1
+  switch (i)
343cc1
+    {
343cc1
+    default:
343cc1
+      func0 ();
343cc1
+      break;
343cc1
+    case 1:
343cc1
+      func1 ();
343cc1
+      break;
343cc1
+    case 2:
343cc1
+      func2 ();
343cc1
+      break;
343cc1
+    case 3:
343cc1
+      func3 ();
343cc1
+      break;
343cc1
+    case 4:
343cc1
+      func4 ();
343cc1
+      break;
343cc1
+    case 5:
343cc1
+      func5 ();
343cc1
+      break;
343cc1
+    }
343cc1
+}
343cc1
+
343cc1
+/* { dg-final { scan-assembler "push(?:l|q)\[ \t\]*\.L\[0-9\]+\\(,%" { target { ! x32 } } } } */
343cc1
+/* { dg-final { scan-assembler-not "pushq\[ \t\]%rax" { target x32 } } } */
343cc1
+/* { dg-final { scan-assembler "jmp\[ \t\]*\.LIND" } } */
343cc1
+/* { dg-final { scan-assembler "call\[ \t\]*\.LIND" } } */
343cc1
+/* { dg-final { scan-assembler {\tpause} } } */
343cc1
+/* { dg-final { scan-assembler {\tlfence} } } */
343cc1
+/* { dg-final { scan-assembler-not "__x86_indirect_thunk" } } */